The Week Of Monday 16 June 2025 Archives by author

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Starting: Mon Jun 16 00:01:49 PDT 2025
Ending: Sun Jun 22 10:17:18 PDT 2025
Messages: 5386

• [llvm] Issue #32 solution (PR #144834)   A. Jiang via llvm-commits
• [llvm] Issue #32 solution (PR #144834)   A. Jiang via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Aaron Ballman via llvm-commits
• [clang] [llvm] [RISCV] Remove B and Zbc extension from Andes series cpus. (PR #144022)   Aaron Ballman via llvm-commits
• [llvm] fcc10e5 - Remove unnecessary BOM from file; NFC   Aaron Ballman via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Aaron Ballman via llvm-commits
• [clang] [llvm] Dump auto (c++11) type Inferences (Issue #17) (PR #144478)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Aaron Ballman via llvm-commits
• [llvm] [InstCombine] Fold `select(load, val) + store` into `llvm.masked.store` (PR #144298)   Abhishek Kaushik via llvm-commits
• [llvm] [InstCombine][NFC] Pre-commit tests for #125935 (PR #144111)   Abhishek Kaushik via llvm-commits
• [llvm] [InstCombine][NFC] Pre-commit tests for #125935 (PR #144111)   Abhishek Kaushik via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Abhishek Kaushik via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Abhishek Kaushik via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store`` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [X86][NFC] Use std::move to avoid copy (PR #141455)   Abhishek Kaushik via llvm-commits
• [llvm] Revert "[X86][NFC] Use std::move to avoid copy" (PR #145215)   Abhishek Kaushik via llvm-commits
• [llvm] Revert "[X86][NFC] Use std::move to avoid copy" (PR #145215)   Abhishek Kaushik via llvm-commits
• [llvm] [X86][NFC] Use std::move to avoid copy (PR #141455)   Abhishek Kaushik via llvm-commits
• [llvm] [Reland][ValueTracking] Improve Bitcast handling to match SDAG (PR #145223)   Abhishek Kaushik via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [Reland][ValueTracking] Improve Bitcast handling to match SDAG (PR #145223)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Abhishek Kaushik via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Abid Qadeer via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Abid Qadeer via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Abid Qadeer via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Abid Qadeer via llvm-commits
• [llvm] [mlir] [OMPIRBuilder][debug] Don't drop debug info for loop constructs. (PR #144393)   Abid Qadeer via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Don't generate DISubprogram for outlined function. (PR #138149)   Abid Qadeer via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Don't generate DISubprogram for outlined function. (PR #138149)   Abid Qadeer via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Abid Qadeer via llvm-commits
• [llvm] [InstCombine] fold icmp with add/sub instructions having the same operands (PR #143241)   Acthinks Yang via llvm-commits
• [llvm] [InstCombine] fold icmp with add/sub instructions having the same operands (PR #143241)   Acthinks Yang via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Acthinks Yang via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Acthinks Yang via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Acthinks Yang via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Acthinks Yang via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Acthinks Yang via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Acthinks Yang via llvm-commits
• [llvm] [AMDGPU] Fixed llvm-debuginfo-analyzer for AMDGPU. (PR #145125)   Adam Yang via llvm-commits
• [llvm] [AMDGPU] Fixed llvm-debuginfo-analyzer for AMDGPU. (PR #145125)   Adam Yang via llvm-commits
• [clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)   Aditi Medhane via llvm-commits
• [llvm] [InstrRef] Skip clobbered EntryValue register recovery (PR #142478)   Adrian Prantl via llvm-commits
• [llvm] [CodeGen][CodeLayout] Fix segfault on access to deleted block in MBP. (PR #142357)   Afanasyev Ivan via llvm-commits
• [llvm] [CodeGen][CodeLayout] Fix segfault on access to deleted block in MBP. (PR #142357)   Afanasyev Ivan via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Aiden Grossman via llvm-commits
• [llvm] [CMake] Options to control generation of reproducers (PR #143037)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "snippet crashed while running: Segmentation fault" for Load Instructions (PR #142552)   Aiden Grossman via llvm-commits
• [llvm] Reapply "[CI] Migrate to runtimes build" (#143612) (PR #144033)   Aiden Grossman via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Aiden Grossman via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Aiden Grossman via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Aiden Grossman via llvm-commits
• [llvm] Reapply "[CI] Migrate to runtimes build" (#143612) (PR #144033)   Aiden Grossman via llvm-commits
• [llvm] [CI] Refactor out some early exits in compute_projects (PR #143478)   Aiden Grossman via llvm-commits
• [llvm] [CI] Refactor out some early exits in compute_projects (PR #143478)   Aiden Grossman via llvm-commits
• [llvm] [CI] Cleanup buildkite test report script (PR #143480)   Aiden Grossman via llvm-commits
• [llvm] [CI] Test all projects when CI scripts change (PR #144034)   Aiden Grossman via llvm-commits
• [llvm] [CI] Test all projects when CI scripts change (PR #144034)   Aiden Grossman via llvm-commits
• [llvm] [CI] Cleanup buildkite test report script (PR #143480)   Aiden Grossman via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Akash Dutta via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Akash Dutta via llvm-commits
• [llvm] [NPM] Fix pass registry entry (PR #144643)   Akshat Oke via llvm-commits
• [llvm] [NPM] Fix pass registry entry (PR #144643)   Akshat Oke via llvm-commits
• [llvm] [NPM] Fix pass registry entry (PR #144643)   Akshat Oke via llvm-commits
• [llvm] [NPM] Fix pass registry entry (PR #144643)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Akshat Oke via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   Akshat Oke via llvm-commits
• [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)   Akshay Kumar Shiva Kumar via llvm-commits
• [llvm] llvm/include/llvm/DebugInfo/CodeView/TypeHashing.h: 2 * pointless copy (#94385) (PR #94410)   Akshay Kumar Shiva Kumar via llvm-commits
• [llvm] llvm/include/llvm/CodeGenTypes/LowLevelType.h: 2 * pointless copy (#94378) (PR #94412)   Akshay Kumar Shiva Kumar via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] Revert "[llvm-cov] Export decision coverage to output json" (PR #144783)   Alan Phipps via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   Alan Phipps via llvm-commits
• [llvm] [AMDGPU] Add GFX12 wave register names with WAVE_ prefix (PR #144352)   Aleksandar Spasojevic via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Reuse previously generated GlobalVariable for memset_pattern16 when possible (PR #144677)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Alex Bradbury via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup ld/st lowering (PR #143936)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add NVPTXIncreaseAligmentPass to improve vectorization (PR #144958)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add NVPTXIncreaseAligmentPass to improve vectorization (PR #144958)   Alex MacLean via llvm-commits
• [lld] [LLD][SPARC] Implement enough functionality to run non-trivial 64-bit programs (PR #137919)   Alex Rønne Petersen via llvm-commits
• [llvm] [Triple][CodeGen] Fix `Triple::isTargetEHABICompatible()` for NetBSD (PR #143549)   Alex Rønne Petersen via llvm-commits
• [llvm] [NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (PR #144106)   Alex Sepkowski via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   Alexander Kornienko via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   Alexander Kornienko via llvm-commits
• [llvm] [runtimes] Allow use of external llvm-lit on standalone builds (PR #144347)   Alexander Richardson via llvm-commits
• [llvm] [runtimes] Allow use of external llvm-lit on standalone builds (PR #144347)   Alexander Richardson via llvm-commits
• [llvm] [runtimes] Allow use of external llvm-lit on standalone builds (PR #144347)   Alexander Richardson via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Alexandros Lamprineas via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Alexandros Lamprineas via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Alexandros Lamprineas via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Alexey Bader via llvm-commits
• [llvm] [SLP] Fix isCommutative to check uses of the original instruction instead of the converted instruction. (PR #143094)   Alexey Bataev via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Alexey Bataev via llvm-commits
• [llvm] 0108a59 - [SLP]Fix a crash on an subvector size calculation for non-power-of-2 vector   Alexey Bataev via llvm-commits
• [llvm] [LAA] Add initial support for non-power-of-2 store-load forwarding distance (PR #137873)   Alexey Bataev via llvm-commits
• [llvm] [LAA] Add initial support for non-power-of-2 store-load forwarding distance (PR #137873)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Alexey Bataev via llvm-commits
• [llvm] [SLP] NFC: Simplify CandidateVFs initialization (PR #144882)   Alexey Bataev via llvm-commits
• [llvm] [SLP] NFC: Simplify CandidateVFs initialization (PR #144882)   Alexey Bataev via llvm-commits
• [llvm] [SLP] NFC: Simplify CandidateVFs initialization (PR #144882)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Alexey Bataev via llvm-commits
• [llvm] Hexagon v87 v89 elf flags (PR #144584)   Alexey Karyakin via llvm-commits
• [llvm] Hexagon v87 v89 elf flags (PR #144584)   Alexey Karyakin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Alexey Lapshin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Alexey Lapshin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Alexey Lapshin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Alexey Lapshin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Alexey Lapshin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Alexey Lapshin via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Alexey Moksyakov via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Alexey Sachkov via llvm-commits
• [llvm] [CodeGen] Limit number of analyzed predecessors (PR #142584)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Limit number of analyzed predecessors (PR #142584)   Alexis Engelke via llvm-commits
• [llvm] [GVN] MemorySSA for GVN: embed the memory state in symbolic expressions (PR #123218)   Alina Sbirlea via llvm-commits
• [llvm] [GVN] MemorySSA for GVN: embed the memory state in symbolic expressions (PR #123218)   Alina Sbirlea via llvm-commits
• [llvm] [AArch64][GlobalISel] Allow selecting FPR index loads. (PR #143835)   Amara Emerson via llvm-commits
• [llvm] [BOLT][NFCI] Simplify DataAggregator using traces (PR #143289)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFCI] Simplify DataAggregator using traces (PR #143289)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Explicitly check for returns when extending call continuation profile (PR #143295)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Support pre-aggregated returns (PR #143296)   Amir Ayupov via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Amir Ayupov via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Amir Ayupov via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Amir Ayupov via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Amir Ayupov via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Amir Ayupov via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][Linux] Fix linux_banner lookup (PR #144962)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Support pre-aggregated returns (PR #143296)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Support pre-aggregated returns (PR #143296)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Support pre-aggregated returns (PR #143296)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][test] Update X86/perf2bolt-spe.test (PR #145061)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][test] Update X86/perf2bolt-spe.test (PR #145061)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Simplify doTrace in BAT mode (PR #143233)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFCI] Use FileSymbols for local symbol disambiguation (PR #89088)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Set call to continuation count in pre-aggregated profile in BAT mode (PR #115334)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][test] Add pseudo-probe-split-func.test (PR #139305)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Synchronize BBHashMap and YamlBBs in BAT mode (PR #145124)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Create marker for source changes in nfc-mode testing. (PR #142931)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Create marker for source changes in nfc-mode testing. (PR #142931)   Amir Ayupov via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Separate UnwindTable from DebugFrame into a different type (PR #142521)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Separate UnwindTable from DebugFrame into a different type (PR #142521)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Separate UnwindTable from DebugFrame into a different type (PR #142521)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Separate UnwindTable from DebugFrame into a different type (PR #142521)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   AmirHossein PashaeeHir via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Non-contiguous strided update (PR #144635)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Non-contiguous strided update (PR #144635)   Amit Tiwari via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns - part 1 (PR #141733)   Amy Kwan via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Ana Mihajlovic via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)   Anatoly Trosinenko via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [flang] [llvm] [flang] Restructure runtime to avoid recursion (relanding) (PR #143993)   Andre Kuhlenschmidt via llvm-commits
• [llvm] [InstCombine] Add cast support in simplifyUsingControlFlow (PR #142263)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Add cast support in simplifyUsingControlFlow (PR #142263)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Add cast support in simplifyUsingControlFlow (PR #142263)   Andreas Jonson via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Interrupt/Exception/Debug Options. (PR #143820)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [llvm] annotate interfaces in XRay for DLL export (PR #143765)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in Passes for DLL export (PR #143794)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ObjectYAML for DLL export (PR #143763)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   Andrew Rogers via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   Andrew Rogers via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   Andrew Rogers via llvm-commits
• [llvm] Llvm abi gnu attribute (PR #144418)   Andrew Rogers via llvm-commits
• [llvm] [llvm] updates to LLVM_ABI export macro definitions (PR #144418)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [llvm] [llvm] updates to LLVM_ABI export macro definitions (PR #144418)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   Andrew Rogers via llvm-commits
• [llvm] [llvm] re-order LLVM_ABI and extern on NoKernelInfoEndLTO decl (PR #144601)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   Andrew Rogers via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Andrew Rogers via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Andrew Rogers via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Andrew Rogers via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Andrew Rogers via llvm-commits
• [llvm] [llvm] include GenericLoopInfoImpl for full implementation (PR #144621)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   Andrew Rogers via llvm-commits
• [llvm] [llvm] include GenericLoopInfoImpl for full implementation (PR #144621)   Andrew Rogers via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Andrew Rogers via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   Andrew Rogers via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Andrew Rogers via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Andrew Rogers via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Andrew Rogers via llvm-commits
• [llvm] [llvm] explicitly link llvm-jitlink-executor with ExecutionEngine (PR #144778)   Andrew Rogers via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   Andrew Rogers via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   Andrew Rogers via llvm-commits
• [llvm] [llvm] include GenericLoopInfoImpl for full implementation (PR #144621)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [llvm] [llvm] explicitly link llvm-jitlink-executor with ExecutionEngine (PR #144778)   Andrew Rogers via llvm-commits
• [llvm] [llvm] explicitly link llvm-jitlink-executor with ExecutionEngine (PR #144778)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Andrew Rogers via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[InstCombine] Iterative replacement in PtrReplacer" (PR #144394)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[InstCombine] Iterative replacement in PtrReplacer" (PR #144394)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #144626)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #144626)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer, reland (PR #144626)   Anshil Gandhi via llvm-commits
• [llvm] [Reland][InstCombine] Iterative replacement in PtrReplacer (PR #144626)   Anshil Gandhi via llvm-commits
• [llvm] [Reland][InstCombine] Iterative replacement in PtrReplacer (PR #144626)   Anshil Gandhi via llvm-commits
• [llvm] [Reland][InstCombine] Iterative replacement in PtrReplacer (PR #144626)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[Reland][InstCombine] Iterative replacement in PtrReplacer" (PR #145137)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[Reland][InstCombine] Iterative replacement in PtrReplacer" (PR #145137)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Antonio Frighetto via llvm-commits
• [llvm] [SCEV] Better preserve wrapping info in SimplifyICmpOperands for UGE. (PR #144404)   Antonio Frighetto via llvm-commits
• [llvm] [SCEV] Better preserve wrapping info in SimplifyICmpOperands for UGE. (PR #144404)   Antonio Frighetto via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Add optimization for switches of powers of two (PR #70977)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Add optimization for switches of powers of two (PR #70977)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Antonio Frighetto via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Arjun Patel via llvm-commits
• [llvm] [NVPTX] Attach Range attr to setmaxnreg and fence intrinsics (PR #144120)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Attach Range attr to setmaxnreg and fence intrinsics (PR #144120)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Attach Range attr to setmaxnreg and fence intrinsics (PR #144120)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Artem Belevich via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Artem Belevich via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Artem Belevich via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Artem Belevich via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   Arthur Eubanks via llvm-commits
• [compiler-rt] Revert "lsan: Support free_sized and free_aligned_sized from C23" (PR #144575)   Arthur Eubanks via llvm-commits
• [compiler-rt] Revert "lsan: Support free_sized and free_aligned_sized from C23" (PR #144575)   Arthur Eubanks via llvm-commits
• [llvm] 49bf8d3 - [gn build] Manually port b4e39e4f   Arthur Eubanks via llvm-commits
• [llvm] a871b91 - [gn build] Port 9e0186d925f0   Arthur Eubanks via llvm-commits
• [llvm] 5352914 - [gn build] Port 9ec75a50bc48   Arthur Eubanks via llvm-commits
• [llvm] 6652961 - [gn build] Manually port 556e69b7   Arthur Eubanks via llvm-commits
• [llvm] b164d36 - [gn build] Port 628274dadf92   Arthur Eubanks via llvm-commits
• [llvm] Revert "[VPlan] Remove unnecessary DomTreeUpdater flush (NFC)." (PR #144758)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[VPlan] Remove unnecessary DomTreeUpdater flush (NFC)." (PR #144758)   Arthur Eubanks via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[ValueTracking] Improve `Bitcast` handling to match SDAG" (PR #145191)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[ValueTracking] Improve `Bitcast` handling to match SDAG" (PR #145191)   Arthur Eubanks via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Arthur Eubanks via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Arvind Sudarsanam via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Arvind Sudarsanam via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Arvind Sudarsanam via llvm-commits
• [llvm] [BOLT] Ensure remember and restore CFIs are in the same list (PR #144348)   Ash Dobrescu via llvm-commits
• [llvm] [BOLT] Ensure remember and restore CFIs are in the same list (PR #144348)   Ash Dobrescu via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Update code object metadata for kernarg preload (PR #134666)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Update code object metadata for kernarg preload (PR #134666)   Austin Kerbow via llvm-commits
• [clang-tools-extra] [llvm] [clang-tools-extra] Add clang-omp-pr-desc wrapper for OpenMP PR summarization (PR #144935)   Aviral Singh via llvm-commits
• [clang-tools-extra] [llvm] [clang-tools-extra] Add clang-omp-pr-desc wrapper for OpenMP PR summarization (PR #144935)   Aviral Singh via llvm-commits
• [clang-tools-extra] [llvm] [clang-tools-extra] Add clang-omp-pr-desc wrapper for OpenMP PR summarization (PR #144935)   Aviral Singh via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   Balázs Kéri via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   Ben Kimock via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   Ben Kimock via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   Ben Kimock via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Ben Shi via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Ben Shi via llvm-commits
• [clang] [llvm] Define pointer layout for AVR program address space (PR #134254)   Ben Shi via llvm-commits
• [llvm] [AVR] Don't apply post-indexing on mismatched pointers (PR #145224)   Ben Shi via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Move incorrectly placed assert (PR #144318)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Move incorrectly placed assert (PR #144318)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Benjamin Maxwell via llvm-commits
• [llvm] AArch64: Fix hardcoding calling convention of sincos_stret (PR #144336)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV] Fold (add (srl x, n), (srl x, n)) into (srl x, n-1) (PR #144507)   Björn Pettersson via llvm-commits
• [llvm] [RISCV] Fold (add (srl x, n), (srl x, n)) into (srl x, n-1) (PR #144507)   Björn Pettersson via llvm-commits
• [llvm] [SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (PR #143232)   Brad Smith via llvm-commits
• [compiler-rt] [compiler-rt][Mips] Fix stat size check on mips64 musl (PR #143301)   Brad Smith via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   Brad Smith via llvm-commits
• [llvm] [gtest] Fix building on OpenBSD/sparc64 (PR #145225)   Brad Smith via llvm-commits
• [llvm] [Mips][ASM] Optimize SW+ADDIU (PR #144997)   Brad Smith via llvm-commits
• [compiler-rt] [sanitizer_common] Drop support for Android 5 (PR #145227)   Brad Smith via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Brox Chen via llvm-commits
• [llvm] keep src mod and clamp for v_s_xxx_f16 lowering (PR #144781)   Brox Chen via llvm-commits
• [llvm] keep src mod and clamp for v_s_xxx_f16 lowering (PR #144781)   Brox Chen via llvm-commits
• [llvm] keep src mod and clamp for v_s_xxx_f16 lowering (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod from v_s_xxx_f16 when moved to VALU (PR #144781)   Brox Chen via llvm-commits
• [llvm] support -O0 flow intrue16 (PR #144819)   Brox Chen via llvm-commits
• [llvm] support -O0 flow intrue16 (PR #144819)   Brox Chen via llvm-commits
• [llvm] support -O0 flow intrue16 (PR #144819)   Brox Chen via llvm-commits
• [llvm] support -O0 flow intrue16 (PR #144819)   Brox Chen via llvm-commits
• [llvm] fix a bracket error (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in fpimm with vgpr16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Brox Chen via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Carlos Alberto Enciso via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   Changpeng Fang via llvm-commits
• [llvm] AMDGPU: Fold frame indexes into s_or_b32 and s_and_b32 (PR #102345)   Changpeng Fang via llvm-commits
• [llvm] [TableGen][Docs] Fix empty list syntax in TableGen doc. (PR #145041)   Chenguang Wang via llvm-commits
• [llvm] [TableGen][Docs] Fix empty list syntax in TableGen doc. (PR #145041)   Chenguang Wang via llvm-commits
• [llvm] [CMake] Add BINARY_DIR argument for add_lit_testsuites (PR #144431)   Chris B via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   Chris Jackson via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   Chris Jackson via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   Chris Jackson via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   Chris Jackson via llvm-commits
• [compiler-rt] [scudo] Make block storage in TransferBatch trailing objects (PR #144204)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Make block storage in TransferBatch trailing objects (PR #144204)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Make block storage in TransferBatch trailing objects (PR #144204)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Make report pointers const. (PR #144624)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Make report pointers const. (PR #144624)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Make report pointers const. (PR #144624)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Make report pointers const. (PR #144624)   Christopher Ferris via llvm-commits
• [llvm] [NPM] Fix pass registry entry (PR #144643)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (PR #144985)   Christudasan Devadasan via llvm-commits
• [llvm] AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (PR #144986)   Christudasan Devadasan via llvm-commits
• [clang] [llvm] [Transforms] Add LifetimeMovePass (PR #144319)   Chuanqi Xu via llvm-commits
• [llvm] [RISCV][TTI] Refine reverse shuffle costing for high LMUL (PR #144155)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (PR #144007)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Refine reverse shuffle costing for high LMUL (PR #144155)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Refine reverse shuffle costing for high LMUL (PR #144155)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (PR #144007)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (PR #144007)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (PR #144007)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Check type-legalization for both src and dst when calculating cost of cast instructions. (PR #143843)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (PR #144401)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (PR #144401)   Craig Topper via llvm-commits
• [llvm] [NFCI][TableGen][DecoderEmitter] Cull `TryDecode` handling when possible (PR #142974)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move RISCVIndirectBranchTracking before Branch Relaxation (PR #139993)   Craig Topper via llvm-commits
• [llvm] [TargetParser] Increase MAX_SUBTARGET_FEATURES to 384 (PR #144326)   Craig Topper via llvm-commits
• [llvm] [NFCI][TableGen][DecoderEmitter] Cull Op handling when possible (PR #142974)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use `StringRef` for CodeGenInstruction::AsmString (PR #144440)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (add (srl x, n), (srl x, n)) into (srl x, n-1) (PR #144507)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (add (srl x, n), (srl x, n)) into (srl x, n-1) (PR #144507)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (add (srl x, n), (srl x, n)) into (srl x, n-1) (PR #144507)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [RISCV] Consolidate both copies of getLMUL1VT [nfc] (PR #144568)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Craig Topper via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Craig Topper via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Craig Topper via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Craig Topper via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [GlobalOpt] Use cast instead of dyn_cast. NFC (PR #144634)   Craig Topper via llvm-commits
• [llvm] [GlobalOpt] Preven widenDestArray from shrinking an alloca. (PR #144641)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   Craig Topper via llvm-commits
• [llvm] [X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (PR #142734)   Craig Topper via llvm-commits
• [llvm] [GlobalOpt] Prevent widenDestArray from shrinking an alloca. (PR #144641)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   Craig Topper via llvm-commits
• [llvm] [GlobalOpt] Use cast instead of dyn_cast. NFC (PR #144634)   Craig Topper via llvm-commits
• [llvm] [RISCV][WIP] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Craig Topper via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Craig Topper via llvm-commits
• [llvm] [RISCV][WIP] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Craig Topper via llvm-commits
• [llvm] [GlobalOpt] Prevent widenDestArray from shrinking an alloca. (PR #144641)   Craig Topper via llvm-commits
• [llvm] [RISCV][WIP] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Craig Topper via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Craig Topper via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Craig Topper via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Craig Topper via llvm-commits
• [llvm] [ConstantFold] Special case atan +/-0.0 (PR #143962)   Craig Topper via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Craig Topper via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Craig Topper via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Craig Topper via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Craig Topper via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   Craig Topper via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   Craig Topper via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Preserve nneg flag when folding (trunc (zext X))->(zext X). (PR #144807)   Craig Topper via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Support of RISCV Zibimm Experimental Extension (PR #127463)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Support of RISCV Zibimm Experimental Extension (PR #127463)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Support of RISCV Zibimm Experimental Extension (PR #127463)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Support of RISCV Zibimm Experimental Extension (PR #127463)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove -mattr=+no-rvc-hints (PR #145138)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix HasStdExtCOrZcfOrZce Syntax (PR #145141)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Remove hasStdExtCOrZca (PR #145139)   Craig Topper via llvm-commits
• [llvm] [RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (PR #145112)   Craig Topper via llvm-commits
• [llvm] [RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (PR #145112)   Craig Topper via llvm-commits
• [llvm] fc36e47 - Revert "[RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (#145112)"   Craig Topper via llvm-commits
• [llvm] 0c47628 - Re-commit "[RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (#145112)"   Craig Topper via llvm-commits
• [llvm] [X86][NFC] Use std::move to avoid copy (PR #141455)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Add support for splitting vp.splice (PR #145184)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Add support for splitting vp.splice (PR #145184)   Craig Topper via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (PR #145120)   Craig Topper via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Craig Topper via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   Cristian Assaiante via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   Cristian Assaiante via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   Cristian Assaiante via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [llvm] [AArch64] Use `ZIP1/2` over `INS` for vector concat (PR #142427)   Csanád Hajdú via llvm-commits
• [llvm] [GlobalISel] Create a common register_vector_matchinfo (PR #144306)   Cullen Rhodes via llvm-commits
• [llvm] WebAssembly: Stop directly using RuntimeLibcalls.def (PR #143054)   Dan Gohman via llvm-commits
• [flang] [llvm] [flang][runtime] Allow INQUIRE(IOLENGTH=) in the presence of defined I/O (PR #144541)   Daniel Chen via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Daniel Paoliello via llvm-commits
• [llvm] RuntimeLibcalls: Pass in ABI name from MCOptions (PR #144894)   Daniel Paoliello via llvm-commits
• [clang] [lld] Use the Windows SDK arguments over the environment (PR #144805)   Daniel Paoliello via llvm-commits
• [llvm] RuntimeLibcalls: Pass in ABI name from MCOptions (PR #144894)   Daniel Paoliello via llvm-commits
• [lld] [lld] check cache in loadDylib before real_path (PR #143595)   Daniel Rodríguez Troitiño via llvm-commits
• [llvm] [objcopy][MachO] Revert special handling of encryptable binaries (PR #144058)   Daniel Rodríguez Troitiño via llvm-commits
• [llvm] [X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (PR #142734)   Daniel Thornburgh via llvm-commits
• [llvm] MachineScheduler: Improve instruction clustering (PR #137784)   Daniel Thornburgh via llvm-commits
• [llvm] [X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (PR #142734)   Daniel Thornburgh via llvm-commits
• [llvm] [X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (PR #142734)   Daniel Thornburgh via llvm-commits
• [lld] [lld][test][PAC] Do not rely on concrete offsets in LTO tests (PR #143358)   Daniil Kovalev via llvm-commits
• [lld] [lld][test][PAC] Do not rely on concrete offsets in LTO tests (PR #143358)   Daniil Kovalev via llvm-commits
• [lld] [lld][test][PAC] Do not rely on concrete offsets in LTO tests (PR #143358)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Daniil Kovalev via llvm-commits
• [llvm] [AMDGPU] Fold fmed3 when inputs include infinity (PR #144824)   Darren Wihandi via llvm-commits
• [llvm] [AMDGPU] Fold fmed3 when inputs include infinity (PR #144824)   Darren Wihandi via llvm-commits
• [llvm] [GlobalOpt] Update debug info when changing CC to Fast (PR #144303)   David Blaikie via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   David Blaikie via llvm-commits
• [clang] [llvm] Non constant size and offset in DWARF (PR #141106)   David Blaikie via llvm-commits
• [llvm] [GlobalOpt] Update debug info when changing CC to Fast (PR #144303)   David Blaikie via llvm-commits
• [llvm] llvm-c: Introduce 'LLVMDISubprogramReplaceType' (PR #143461)   David Blaikie via llvm-commits
• [clang] [llvm] [DebugInfo] Place local ODR-uniqued types in decl DISubprograms (PR #142166)   David Blaikie via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   David Blaikie via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   David Blaikie via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix crash with WebAssembly dead code (PR #141616)   David Blaikie via llvm-commits
• [lldb] [llvm] [NFC] Separate high-level-dependent portions of DWARFExpression (revised) (PR #143170)   David Blaikie via llvm-commits
• [llvm] [NFC] Extract Printing portions of DWARFCFIProgram to new files (PR #143762)   David Blaikie via llvm-commits
• [lldb] [llvm] [NFC] Separate high-level-dependent portions of DWARFExpression (revised) (PR #143170)   David Blaikie via llvm-commits
• [clang] [llvm] [DebugInfo] Place local ODR-uniqued types in decl DISubprograms (PR #142166)   David Blaikie via llvm-commits
• [clang] [llvm] [DebugInfo] Place local ODR-uniqued types in decl DISubprograms (PR #142166)   David Blaikie via llvm-commits
• [clang] [llvm] Non constant size and offset in DWARF (PR #141106)   David Blaikie via llvm-commits
• [clang] [llvm] Non constant size and offset in DWARF (PR #141106)   David Blaikie via llvm-commits
• [clang] [llvm] Non constant size and offset in DWARF (PR #141106)   David Blaikie via llvm-commits
• [clang] [llvm] Non constant size and offset in DWARF (PR #141106)   David Blaikie via llvm-commits
• [llvm] [GlobalISel] Create a common register_vector_matchinfo (PR #144306)   David Green via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   David Green via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Widen more small vectors. (PR #144311)   David Green via llvm-commits
• [llvm] [AArch64][Machine-Combiner] Split loads into lanes of neon vectors into multiple vectors when possible (PR #142941)   David Green via llvm-commits
• [llvm] [AArch64][Machine-Combiner] Split loads into lanes of neon vectors into multiple vectors when possible (PR #142941)   David Green via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   David Green via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   David Green via llvm-commits
• [llvm] [DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (PR #115150)   David Green via llvm-commits
• [llvm] [AArch64] Enable other cost kinds for getCmpSelInstrCost. (PR #144375)   David Green via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   David Green via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   David Green via llvm-commits
• [llvm] [AArch64] Create set.fpmr intrinsic and assembly lowering (PR #114248)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   David Green via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   David Green via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   David Green via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   David Green via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   David Green via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   David Green via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   David Green via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   David Green via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Allow selecting FPR index loads. (PR #143835)   David Green via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   David Green via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   David Green via llvm-commits
• [llvm] [CostModel] Add a DstTy to getShuffleCost (PR #141634)   David Green via llvm-commits
• [llvm] [CostModel] Add a DstTy to getShuffleCost (PR #141634)   David Green via llvm-commits
• [llvm] [CostModel] Add a DstTy to getShuffleCost (PR #141634)   David Green via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   David Green via llvm-commits
• [llvm] 8583882 - [AArch64] Remove unnecessary DL variable. NFC   David Green via llvm-commits
• [llvm] 078475d - [ARM] Add test coverage for #144845 and regenerate tests. NFC   David Green via llvm-commits
• [llvm] [ARM] Return the correct chain when expanding READ_REGISTER (PR #145237)   David Green via llvm-commits
• [compiler-rt] Augment `uncaught-exception.test` fuzzer test to be msvc-compatible (PR #125924)   David Justo via llvm-commits
• [compiler-rt] [ASan][Windows] Honor asan config flags on windows when set through the user function (PR #122990)   David Justo via llvm-commits
• [llvm] [LV] Use vscale for tuning when updating profile information (PR #143690)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   David Sherwood via llvm-commits
• [llvm] [LV] Change getSmallBestKnownTC to return an ElementCount (NFC) (PR #141793)   David Sherwood via llvm-commits
• [llvm] [LV] Use vscale for tuning to improve branch weight estimates (PR #144733)   David Sherwood via llvm-commits
• [llvm] [LV] Use vscale for tuning to improve branch weight estimates (PR #144733)   David Sherwood via llvm-commits
• [llvm] [AArch64] Lower jump table cases threshold to 10 (PR #143632)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   David Sherwood via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   David Sherwood via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   David Sherwood via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   David Sherwood via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   David Sherwood via llvm-commits
• [llvm] [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (PR #143204)   David Sherwood via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   David Sherwood via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   David Sherwood via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   David Sherwood via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   David Sherwood via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   David Sherwood via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   David Sherwood via llvm-commits
• [llvm] [WIP][LoopIdiomVectorize] Recognize and transform minidx pattern (PR #144987)   David Sherwood via llvm-commits
• [llvm] [WIP][LoopIdiomVectorize] Recognize and transform minidx pattern (PR #144987)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   David Sherwood via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   David Sherwood via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   David Sherwood via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   David Sherwood via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   David Sherwood via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   David Sherwood via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   David Sherwood via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   David Sherwood via llvm-commits
• [llvm] [DOCS][BUILDBOT] Bump recommended worker version (PR #144853)   David Spickett via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   David Truby via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   David Truby via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   David Truby via llvm-commits
• [compiler-rt] [ASan] Recognize WASI platform in sanitizer_platform.h (PR #139017)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Derek Schuff via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Don't limit visitGetElementPtrInst to global ptrs (PR #144959)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Deric C. via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Plug-in serialization and add full sample testcase (PR #144769)   Deric C. via llvm-commits
• [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   Dhruv Srivastava via llvm-commits
• [llvm] [AMDGPU] Ignore inactive VGPRs in .vgpr_count (PR #144855)   Diana Picus via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Dipesh Sharma via llvm-commits
• [lld] Support --unresolved-symbols=@<file> option in LLD for ELF (PR #142917)   Dmitry Nechitaev via llvm-commits
• [llvm] d57b867 - Revert "AArch64: Move AArch64MCExpr functions to AArch64MCAsmInfo"   Douglas Yung via llvm-commits
• [lld] 757c80d - Add `REQUIRES: x86` to test added in 141197 to skip when x86 target is not present.   Douglas Yung via llvm-commits
• [clang] [lld] [llvm] Conditionalize use of POSIX features missing on WASI/WebAssembly (PR #92677)   Duncan Ogilvie via llvm-commits
• [llvm] [NVPTX] Attach Range attr to setmaxnreg and fence intrinsics (PR #144120)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Attach Range attr to setmaxnreg and fence intrinsics (PR #144120)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Rearrange the TMA-S2G intrinsics (PR #144903)   Durgadoss R via llvm-commits
• [llvm] [aarch64] Fix Arm64EC libcall lowering after recent refactoring. (PR #143977)   Eli Friedman via llvm-commits
• [llvm] AArch64: Add arm64ec libcall tests for __arm_sc_* functions (PR #144356)   Eli Friedman via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Eli Friedman via llvm-commits
• [llvm] [PowerPC][AIX] Specify pointer info and alignment for stack store (PR #144526)   Eli Friedman via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   Eli Friedman via llvm-commits
• [llvm] [PowerPC][AIX] Specify pointer info and alignment for stack store (PR #144526)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Specify correct ABI alignment for double (PR #144673)   Eli Friedman via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Eli Friedman via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Eli Friedman via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Eli Friedman via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Eli Friedman via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Eli Friedman via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Eli Friedman via llvm-commits
• [llvm] ARM: Avoid using isTarget wrappers around Triple predicates (PR #144705)   Eli Friedman via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   Eli Friedman via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   Ellis Hoag via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   Ellis Hoag via llvm-commits
• [llvm] [RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (PR #143655)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Check type-legalization for both src and dst when calculating cost of cast instructions. (PR #143843)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Check type-legalization for both src and dst when calculating cost of cast instructions. (PR #143843)   Elvis Wang via llvm-commits
• [flang] [llvm] [flang] Restructure runtime to avoid recursion (relanding) (PR #143993)   Eugene Epshteyn via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Alderlake and later hybrid processors (PR #144662)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Evgenii Kudriashov via llvm-commits
• [clang] [lld] Use the Windows SDK arguments over the environment (PR #144805)   Fabrice de Gans via llvm-commits
• [clang] [lld] Use the Windows SDK arguments over the environment (PR #144805)   Fabrice de Gans via llvm-commits
• [clang] [lld] Use the Windows SDK arguments over the environment (PR #144805)   Fabrice de Gans via llvm-commits
• [clang] [lld] Use the Windows SDK arguments over the environment (PR #144805)   Fabrice de Gans via llvm-commits
• [llvm] 0bb4d9c - ARM: Migrate to the new relocation specifier representation   Fangrui Song via llvm-commits
• [llvm] ee2d7a6 - MIPS: Remove unneeded printImpl   Fangrui Song via llvm-commits
• [llvm] 5acdd8d - AVR: Rename AVRMCExpr::VK_ to AVR::S_   Fangrui Song via llvm-commits
• [llvm] 20a1b35 - AArch64: Move AArch64MCExpr functions to AArch64MCAsmInfo   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Fangrui Song via llvm-commits
• [llvm] 30350af - MCSpecifierExpr: Remove unused virtual functions   Fangrui Song via llvm-commits
• [llvm] 9ec75a5 - MIPS: Replace MipsMCExpr with MCSpecifierExpr   Fangrui Song via llvm-commits
• [llvm] 4e884dd - SPARC: Remove SparcMCExpr.h   Fangrui Song via llvm-commits
• [llvm] AArch64: Replace AArch64MCExpr with MCSpecifierExpr (PR #144632)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Fangrui Song via llvm-commits
• [llvm] AArch64: Replace AArch64MCExpr with MCSpecifierExpr (PR #144632)   Fangrui Song via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [llvm] [llvm][yaml2obj] Modify section header overriding timing (PR #130942)   Fangrui Song via llvm-commits
• [llvm] [yaml2obj] Report error when the input filename does not exist (PR #144835)   Fangrui Song via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Fangrui Song via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Fangrui Song via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Fangrui Song via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Fangrui Song via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Fangrui Song via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [llvm] [SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (PR #143232)   Fangrui Song via llvm-commits
• [llvm] [yaml2obj] Report error when the input filename does not exist (PR #144835)   Fangrui Song via llvm-commits
• [llvm] AArch64: Replace AArch64MCExpr with MCSpecifierExpr (PR #144632)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Fangrui Song via llvm-commits
• [lld] [LLD][ELF] Include offset when adding Thunk symbols (PR #144995)   Fangrui Song via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Parse Amazon Linux triple and handle RuntimeLibcalls (PR #136114)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Parse Amazon Linux triple and handle RuntimeLibcalls (PR #136114)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Fangrui Song via llvm-commits
• [llvm] AArch64: Replace AArch64MCExpr with MCSpecifierExpr (PR #144632)   Fangrui Song via llvm-commits
• [llvm] Move relocation specifier constants to AArch64:: (PR #144633)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Fangrui Song via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   Fangrui Song via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   Fangrui Song via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   Fangrui Song via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Fangrui Song via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Fangrui Song via llvm-commits
• [llvm] [DirectX] Fix bug where Flatten arrays was only using last index (PR #144146)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Fix bug where Flatten arrays was only using last index (PR #144146)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Don't limit visitGetElementPtrInst to global ptrs (PR #144959)   Farzon Lotfi via llvm-commits
• [llvm] Feature/issue 140321 (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (PR #144106)   Finn Plummer via llvm-commits
• [llvm] [NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (PR #144106)   Finn Plummer via llvm-commits
• [llvm] [NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (PR #144106)   Finn Plummer via llvm-commits
• [llvm] [HLSL][RootSignature] Implement `ResourceRange` as an `IntervalMap` (PR #140957)   Finn Plummer via llvm-commits
• [clang] [llvm] Reland "[HLSL][RootSignature] Implement serialization of RootConstants and RootFlags" (PR #143019)   Finn Plummer via llvm-commits
• [llvm] [HLSL][RootSignature] Implement serialization of remaining Root Elements (PR #143198)   Finn Plummer via llvm-commits
• [llvm] [HLSL][RootSignature] Implement `ResourceRange` as an `IntervalMap` (PR #140957)   Finn Plummer via llvm-commits
• [llvm] [HLSL][RootSignature] Implement serialization of remaining Root Elements (PR #143198)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Finn Plummer via llvm-commits
• [llvm] [HLSL][RootSignature] Implement serialization of remaining Root Elements (PR #143198)   Finn Plummer via llvm-commits
• [clang] [llvm] [NFC][HLSL][DXIL] Move D3D12.h enums and flags to DXILABI (PR #143041)   Finn Plummer via llvm-commits
• [clang] [llvm] [NFC][HLSL][DXIL] Move D3D12.h enums and flags to DXILABI (PR #143041)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Plug-in serialization and add full sample testcase (PR #144769)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (PR #141676)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement `memcpy` in DXIL CBuffer Access pass (PR #144436)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL] Emit a version in the dx.rootsignatures metadata (PR #145113)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Finn Plummer via llvm-commits
• [llvm] [LV] Strip unnecessary make_{pair, optional} (NFC) (PR #141924)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Florian Hahn via llvm-commits
• [llvm] c7d8581 - [IndVars] Add tests showing missed simplifications.   Florian Hahn via llvm-commits
• [llvm] [SCEV] Better preserve wrapping info in SimplifyICmpOperands for UGE. (PR #144404)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Hoist IRBuilder<> out of Visit* functions. NFC (PR #144369)   Florian Hahn via llvm-commits
• [llvm] 30b16ec - [VPlan] Simplify trivial VPFirstOrderRecurrencePHI recipes.   Florian Hahn via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Florian Hahn via llvm-commits
• [llvm] Check Affine AR only. (PR #144550)   Florian Hahn via llvm-commits
• [llvm] [Remarks] Remove yaml-strtab format (PR #144527)   Florian Hahn via llvm-commits
• [llvm] [LICM] Support hoisting of non-argmemonly readonly calls (PR #144497)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Support last iteration peeling of min/max intrinsics (PR #143598)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Vectorize fixed-order recurrence with vscale x 1. (PR #142772)   Florian Hahn via llvm-commits
• [llvm] [LV] Change getSmallBestKnownTC to return an ElementCount (NFC) (PR #141793)   Florian Hahn via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   Florian Hahn via llvm-commits
• [llvm] Revert [LoopPeel] Remove known trip count restriction when peeling last. #140792 (PR #142943)   Florian Hahn via llvm-commits
• [clang] [llvm] [LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (PR #143532)   Florian Hahn via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Florian Hahn via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Florian Hahn via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Florian Hahn via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Florian Hahn via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize selecting last IV of min/max element. (PR #141431)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect (MemRuntime|SCEV)Check blocks as VPlan transform (NFC). (PR #143879)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add ReductionStartVector VPInstruction. (PR #142290)   Florian Hahn via llvm-commits
• [llvm] Check Affine AR only. (PR #144550)   Florian Hahn via llvm-commits
• [llvm] [AsmPrinter] Fix crash when remarks section is unsupported (PR #144724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve trunc nuw/nsw in VPRecipeWithIRFlags (PR #144700)   Florian Hahn via llvm-commits
• [llvm] Revert "[VPlan] Remove unnecessary DomTreeUpdater flush (NFC)." (PR #144758)   Florian Hahn via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Add branch weight test showing incorrect behaviour (PR #144682)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (PR #142310)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (PR #142310)   Florian Hahn via llvm-commits
• [llvm] [TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (PR #142310)   Florian Hahn via llvm-commits
• [llvm] 23b8f11 - [VPlan] Remove redundant VPWidenRecipe constructors (NFC)   Florian Hahn via llvm-commits
• [clang] [llvm] [LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (PR #143532)   Florian Hahn via llvm-commits
• [clang] [llvm] [LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (PR #143532)   Florian Hahn via llvm-commits
• [llvm] Vplan caniv defined by region (PR #144803)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make CanIV part of region. (PR #144803)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add ReductionStartVector VPInstruction. (PR #142290)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] [LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (PR #128061)   Florian Hahn via llvm-commits
• [llvm] 0816bb3 - [Matrix] Fix heap-use-after-free after 0fa373c77ded203eddb.   Florian Hahn via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Florian Hahn via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Florian Hahn via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Florian Hahn via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Florian Hahn via llvm-commits
• [llvm] 74ec1c2 - [LV] Add tests interleaving extended and multiply/accumulate reductions.   Florian Hahn via llvm-commits
• [llvm] [LV] Introduce and use VPBuilder::createScalarZExtOrTrunc [nfc] (PR #144946)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Florian Hahn via llvm-commits
• [llvm] [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (PR #143204)   Florian Hahn via llvm-commits
• [llvm] [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (PR #143204)   Florian Hahn via llvm-commits
• [llvm] Revert "[VPlan] Remove unnecessary DomTreeUpdater flush (NFC)." (PR #144758)   Florian Hahn via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Florian Hahn via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Florian Hahn via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Florian Hahn via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Refine return types in VPBuilder (NFC) (PR #108858)   Florian Hahn via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Florian Hahn via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Florian Hahn via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Florian Hahn via llvm-commits
• [llvm] e8be733 - [VPlan] Remove redundant ExtractLastElement from vector-to-scalar VPI.   Florian Hahn via llvm-commits
• [llvm] [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (PR #143204)   Florian Hahn via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Florian Hahn via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Florian Hahn via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Florian Hahn via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Pass NumUnrolledElems as operand to VPWidenPointerInductionRecipe. NFC (PR #119859)   Florian Hahn via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Florian Hahn via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (NFC) (PR #137138)   Florian Hahn via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Scalarize extracts of ZExt if profitable. (PR #142976)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Scalarize extracts of ZExt if profitable. (PR #142976)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInst::getNumOperandsForOpcode, use to verify in ctor (NFC) (PR #142284)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInst::getNumOperandsForOpcode, use to verify in ctor (NFC) (PR #142284)   Florian Hahn via llvm-commits
• [llvm] 7f74a37 - [LV] Regenerate uniform_across_vf* check lines.   Florian Hahn via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize constant vector trip counts before final opts. (PR #142309)   Florian Hahn via llvm-commits
• [llvm] f8ffb4e - [VPlan] Simplify ExtractLastElement(Broadcast(A)) -> A.   Florian Hahn via llvm-commits
• [llvm] 2f5d965 - [VPlan] Use EMIT-SCALAR when printing casts.   Florian Hahn via llvm-commits
• [llvm] [IA] Remove recursive [de]interleaving support (PR #143875)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInst::getNumOperandsForOpcode, use to verify in ctor (NFC) (PR #142284)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInst::getNumOperandsForOpcode, use to verify in ctor (NFC) (PR #142284)   Florian Hahn via llvm-commits
• [llvm] [GlobalOpt] Revert global widening transform (PR #144652)   Florian Hahn via llvm-commits
• [llvm] [PredicateInfo] Cache ssa.copy declarations (NFC) (PR #145020)   Florian Hahn via llvm-commits
• [llvm] 60d1276 - [VPlan] Pass operand index to canNarrowLoad. (NFC)   Florian Hahn via llvm-commits
• [llvm] [PredicateInfo] Don't store Def in ValueDFS (NFC) (PR #145022)   Florian Hahn via llvm-commits
• [llvm] 9f7a155 - [VPlan] Update packScalarIntoVector to take and return wide value (NFC)   Florian Hahn via llvm-commits
• [llvm] c455f4a - [LV] Add more tests for narrowing interleave groups with live-ins.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll by VF with Pack/Unpack. (PR #145188)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   Florian Hahn via llvm-commits
• [llvm] 58b939a - [VPlan] Support matching constants in narrowInterleaveGroups.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unroll by VF with Pack/Unpack. (PR #145188)   Florian Hahn via llvm-commits
• [llvm] 0dc0aeb - [LV] Add additional tests for replicating calls returning structs.   Florian Hahn via llvm-commits
• [llvm] LowerTypeTests: Use jump table entry type as value type of jump table alias. (PR #144462)   Florian Mayer via llvm-commits
• [compiler-rt] [MSan] Fix wrong unpoison size in SignalAction (PR #144071)   Florian Mayer via llvm-commits
• [compiler-rt] [MSan] Fix wrong unpoison size in SignalAction (PR #144071)   Florian Mayer via llvm-commits
• [compiler-rt] Conditionalise the addition of Aarch64 function Multi versioning support on aarch64 target (PR #143749)   Garvit Gupta via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [Analysis] Use the addCost() helper across InlineCost.cpp (PR #141901)   Gleb Popov via llvm-commits
• [llvm] TargetLibraryInfo: Bring FreeBSD function list up to date (PR #144846)   Gleb Popov via llvm-commits
• [llvm] TargetLibraryInfo: Bring FreeBSD function list up to date (PR #144846)   Gleb Popov via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Graham Hunter via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Match indexed forms of fmul/fmla/fmls (PR #144892)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   Graham Hunter via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Guillaume Chatelet via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Guillaume Chatelet via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Guillaume Chatelet via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Guillaume Chatelet via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Guillaume Chatelet via llvm-commits
• [llvm] [AArch64] Lower jump table cases threshold to 10 (PR #143632)   Guy David via llvm-commits
• [llvm] [SimplifyCFG] Transform switch to select when common bits uniquely identify one case (PR #145233)   Gábor Spaits via llvm-commits
• [llvm] [SLP] Fix isCommutative to check uses of the original instruction instead of the converted instruction. (PR #143094)   Han-Kuan Chen via llvm-commits
• [lld] [lld] check cache in loadDylib before real_path (PR #143595)   Hans Wennborg via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   Haohai Wen via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Add D16 test for multiple fptrunc image sample (PR #141771)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit TBUFFER load/store instruction (PR #145078)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   Harrison Hao via llvm-commits
• [clang] [llvm] [WPD]: Apply speculative WPD in non-lto mode. (PR #145031)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [WPD]: Apply speculative WPD in non-lto mode. (PR #145031)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC] Extract Printing portions of DWARFCFIProgram to new files (PR #143762)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [NFC] Remove UnwindTable dependency on CIE, and FDE (PR #142520)   Igor Kudrin via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [ConstraintElim] Simplify `sadd_with_overflow` if A and B have different signs (PR #135784)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Generate better code for `std::bit_floor` from libstdc++ (PR #144842)   Iris Shi via llvm-commits
• [compiler-rt] [RISCV] Implement Feature Bit for Q (PR #145001)   Iris Shi via llvm-commits
• [compiler-rt] [RISCV] Implement Feature Bit for Q (PR #145001)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Iris Shi via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Iris Shi via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Iris Shi via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Iris Shi via llvm-commits
• [llvm] Issue #32 solution (PR #144834)   Ishan Gupta via llvm-commits
• [llvm] Issue #32 solution (PR #144834)   Ishan Gupta via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   J. Ryan Stinnett via llvm-commits
• [llvm] [AArch64] Fix #94909: Optimize vector fmul(sitofp(x), 0.5) -> scvtf(x, 2) (PR #141480)   JP Hafer via llvm-commits
• [llvm] [AArch64] Fix #94909: Optimize vector fmul(sitofp(x), 0.5) -> scvtf(x, 2) (PR #141480)   JP Hafer via llvm-commits
• [llvm] [AArch64] Fix #94909: Optimize vector fmul(sitofp(x), 0.5) -> scvtf(x, 2) (PR #141480)   JP Hafer via llvm-commits
• [llvm] [AArch64] Fix #94909: Optimize vector fmul(sitofp(x), 0.5) -> scvtf(x, 2) (PR #141480)   JP Hafer via llvm-commits
• [llvm] [AArch64] Fix #94909: Optimize vector fmul(sitofp(x), 0.5) -> scvtf(x, 2) (PR #141480)   JP Hafer via llvm-commits
• [compiler-rt] [asan][sanitizer_common] Enable build and testing of asan+sanitizer_common on AIX (PR #137186)   Jake Egan via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Jake Egan via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: address descriptions (PR #138891)   Jake Egan via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: address descriptions (PR #138891)   Jake Egan via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [llvm] [mlir] Revert "[mlir][spirv] Fix int type declaration duplication when serializing" and follow up commits (PR #144773)   Jakub Kuderski via llvm-commits
• [llvm] [mlir] Revert "[mlir][spirv] Fix int type declaration duplication when serializing" and follow up commits (PR #144773)   Jakub Kuderski via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Jakub Kuderski via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove an extraneous variable (NFC) (PR #144937)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Use "= delete" to delete constructors (NFC) (PR #144938)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Migrate away from ArrayRef(std::nullopt) (NFC) (PR #144967)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Jakub Kuderski via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   James Henderson via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   James Henderson via llvm-commits
• [llvm] [yaml2obj] Report error when the input filename does not exist (PR #144835)   James Henderson via llvm-commits
• [llvm] [NFC][CodingStandard] Prefer ``[[maybe_unused]]`` over C-style void cast for unused variables (PR #142850)   James Henderson via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   James Henderson via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   Jameson Nash via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   Jameson Nash via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Jameson Nash via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Jameson Nash via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Jameson Nash via llvm-commits
• [llvm] [MemCpyOpt] fix incorrect handling of lifetime markers (PR #143782)   Jameson Nash via llvm-commits
• [llvm] [MemCpyOpt] fix incorrect handling of lifetime markers (PR #143782)   Jameson Nash via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Jameson Nash via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Jameson Nash via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Jameson Nash via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Jameson Nash via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Jan Leyonberg via llvm-commits
• [llvm] [Offload][libc] Add cmake cache AMDGPU buildbot (PR #144500)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)   Jannick Kremer via llvm-commits
• [clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)   Jannick Kremer via llvm-commits
• [clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)   Jannick Kremer via llvm-commits
• [clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)   Jannick Kremer via llvm-commits
• [clang] [llvm] [clang][python][test] Move python binding tests to lit framework (PR #142948)   Jannick Kremer via llvm-commits
• [clang] [llvm] Test 142948 (PR #144873)   Jannick Kremer via llvm-commits
• [clang] [llvm] Test 142948 (PR #144873)   Jannick Kremer via llvm-commits
• [clang] [llvm] Test 142948 (PR #144873)   Jannick Kremer via llvm-commits
• [clang] [llvm] Test 142948 (PR #144873)   Jannick Kremer via llvm-commits
• [clang] [llvm] Test 142948, please ignore (PR #144873)   Jannick Kremer via llvm-commits
• [clang] [llvm] Test 142948, please ignore (PR #144873)   Jannick Kremer via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Jason Eckhardt via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix ODR violation in llvm::logicalview::LVObject (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix ODR violation in llvm::logicalview::LVObject (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix ODR violation in llvm::logicalview::LVObject (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix ODR violation in llvm::logicalview::LVObject (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Reduce size of `LVProperties` where possible (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Reduce size of `LVProperties` where possible (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (PR #144399)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   Javier Lopez-Gomez via llvm-commits
• [llvm] [MC] Use StringTable to reduce dynamic relocations (PR #144202)   Jay Foad via llvm-commits
• [llvm] Partition MUBUF load/store offsets into vector and scalar parts (PR #142328)   Jay Foad via llvm-commits
• [llvm] Partition MUBUF load/store offsets into vector and scalar parts (PR #142328)   Jay Foad via llvm-commits
• [llvm] Partition MUBUF load/store offsets into vector and scalar parts (PR #142328)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Jay Foad via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] fdiv to fmul transform (PR #144305)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Jay Foad via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Jay Foad via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Jay Foad via llvm-commits
• [llvm] [TableGen] Use default member initializers. NFC. (PR #144349)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove EXP_POS_ACCESS, EXP_PARAM_ACCESS. NFC. (PR #144361)   Jay Foad via llvm-commits
• [llvm] [TableGen] Use default member initializers. NFC. (PR #144349)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove EXP_POS_ACCESS, EXP_PARAM_ACCESS. NFC. (PR #144361)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove EXP_POS_ACCESS, EXP_PARAM_ACCESS. NFC. (PR #144361)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for v_lshl_add_u64 pattern. NFC. (PR #144544)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for v_lshl_add_u64 pattern. NFC. (PR #144544)   Jay Foad via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize rotate instruction selection patterns (PR #143551)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize rotate instruction selection patterns (PR #143551)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize rotate instruction selection patterns (PR #143551)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (PR #145048)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (PR #145048)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (PR #145048)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add another test showing unwanted VALU codegen (PR #145062)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add another test showing unwanted VALU codegen (PR #145062)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] gfx1250 SOPP MC tests. NFC. (PR #145082)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (PR #145084)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Jeffrey Byrnes via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Jeffrey Byrnes via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Jeffrey Byrnes via llvm-commits
• [llvm] [InstCombine] Extend bitmask mul combine to handle independent operands (PR #142503)   Jeffrey Byrnes via llvm-commits
• [compiler-rt] [compiler-rt][Mips] Fix stat size check on mips64 musl (PR #143301)   Jens Reidel via llvm-commits
• [compiler-rt] [compiler-rt][Mips] Fix stat size check on mips64 musl (PR #143301)   Jens Reidel via llvm-commits
• [llvm] [DLCov 1/5] Add CMake option to enable enhanced line number coverage tracking (PR #107278)   Jeremy Morse via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Add config options (PR #143590)   Jeremy Morse via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   Jeremy Morse via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   Jeremy Morse via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Skip clobbered EntryValue register recovery (PR #142478)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Skip clobbered EntryValue register recovery (PR #142478)   Jeremy Morse via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   Jeremy Morse via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   Jeremy Morse via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   Jeremy Morse via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   Jeremy Morse via llvm-commits
• [llvm] 1428624 - Follow up to 9eb0020555, squelch unused variable warning   Jeremy Morse via llvm-commits
• [llvm] [NFC] Shift ZOS libcall declarations to llvm/include (PR #144672)   Jeremy Morse via llvm-commits
• [llvm] [NFC] Shift ZOS libcall declarations to llvm/include (PR #144672)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Skip clobbered EntryValue register recovery (PR #142478)   Jeremy Morse via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   Jeremy Morse via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Jessica Clarke via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Jiachen Wang via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Jim Lin via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Jim Lin via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion Product) extension (PR #144320)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension (PR #144320)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension (PR #144320)   Jim Lin via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension (PR #144320)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch and gp-related instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch and gp-related instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch and gp-related instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [TargetParser][cmake] Be Smarter about TableGen Deps (PR #144848)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Jim Lin via llvm-commits
• [llvm] [TargetParser][cmake] Be Smarter about TableGen Deps (PR #144848)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Jim Lin via llvm-commits
• [llvm] [RISCV] Fix HasStdExtCOrZcfOrZce Syntax (PR #145141)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Jim Lin via llvm-commits
• [llvm] f78819a - Revert "Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (#144402)"   Jim Lin via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   Jim Lin via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (PR #144574)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   Joe Nash via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [LoopPeel] Fix branch weights' effect on block frequencies (PR #128785)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Joel E. Denny via llvm-commits
• [llvm] [LSR] Make canHoistIVInc allow non-integer types (PR #143707)   John Brawn via llvm-commits
• [llvm] [AArch64] Add ISel for postindex ld1/st1 in big-endian (PR #144387)   John Brawn via llvm-commits
• [llvm] [AArch64] Add ISel for postindex ld1/st1 in big-endian (PR #144387)   John Brawn via llvm-commits
• [llvm] [AArch64] Fix build failure with -Werror (PR #144749)   John Brawn via llvm-commits
• [llvm] [AArch64] Add ISel for postindex ld1/st1 in big-endian (PR #144387)   John Brawn via llvm-commits
• [llvm] [AArch64] Fix build failure with -Werror (PR #144749)   John Brawn via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   John McCall via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   Jon Chesterfield via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Lower vector reductions using shape info (PR #142055)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Hoist IRBuilder<> out of Visit* functions. NFC (PR #144369)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Hoist IRBuilder<> out of Visit* functions. NFC (PR #144369)   Jon Roelofs via llvm-commits
• [llvm] [Remarks] Remove yaml-strtab format (PR #144527)   Jon Roelofs via llvm-commits
• [llvm] [Remarks] Elaborate on called intrinsics (PR #143985)   Jon Roelofs via llvm-commits
• [llvm] [Remarks] Elaborate on called intrinsics (PR #143985)   Jon Roelofs via llvm-commits
• [llvm] 4943e74 - fixup! [Remarks] Elaborate on called intrinsics (#143985)   Jon Roelofs via llvm-commits
• [llvm] [Remarks] Elaborate on called intrinsics (PR #143985)   Jon Roelofs via llvm-commits
• [llvm] 1f10c6a - [Matrix] Hoist more IRBuilder<>'s. NFC   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [AsmPrinter] Fix crash when remarks section is unsupported (PR #144724)   Jon Roelofs via llvm-commits
• [llvm] [AsmPrinter] Fix crash when remarks section is unsupported (PR #144724)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Propagate shape information through PHI insts (PR #141681)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Hoist finalizeLowering into caller. NFC (PR #143038)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   Jon Roelofs via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Jonas Devlieghere via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64][Machine-Combiner] Split loads into lanes of neon vectors into multiple vectors when possible (PR #142941)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64][Machine-Combiner] Split loads into lanes of neon vectors into multiple vectors when possible (PR #142941)   Jonathan Cohen via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Jonathan Thackray via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add olGetKernelMaxGroupSize (PR #142950)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add `MAX_WORK_GROUP_SIZE` device info query (PR #143718)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Joseph Huber via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Joseph Huber via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Joseph Huber via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Joseph Huber via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Joseph Huber via llvm-commits
• [llvm] [llvm] Add a new `Triple::str(N)` method (PR #145150)   Joseph Huber via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Joseph Huber via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [CMake] Add BINARY_DIR argument for add_lit_testsuites (PR #144431)   Joshua Batista via llvm-commits
• [llvm] [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (PR #143783)   Joshua Batista via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (PR #143982)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (PR #143982)   Jun Wang via llvm-commits
• [clang] [llvm] [HLSL] Use hidden visibility for external linkage. (PR #140292)   Justin Bogner via llvm-commits
• [llvm] [CMake] Add BINARY_DIR argument for add_lit_testsuites (PR #144431)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (PR #140962)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Justin Bogner via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Justin Bogner via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Justin Bogner via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] Emit a version in the dx.rootsignatures metadata (PR #145113)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] Emit a version in the dx.rootsignatures metadata (PR #145113)   Justin Bogner via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   Justin Bogner via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Fixup NVPTXPrologEpilogPass for opt-bisect-limit (PR #144136)   Justin Fargnoli via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   Justin King via llvm-commits
• [compiler-rt] Revert "lsan: Support free_sized and free_aligned_sized from C23" (PR #144575)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   Justin King via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Justin King via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Justin King via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Justin King via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Justin King via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Justin King via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Justin King via llvm-commits
• [compiler-rt] rtsan: Support free_sized and free_aligned_sized from C23 (PR #145085)   Justin King via llvm-commits
• [compiler-rt] asan: refactor interceptor allocation/deallocation functions (PR #145087)   Justin King via llvm-commits
• [compiler-rt] asan: refactor interceptor allocation/deallocation functions (PR #145087)   Justin King via llvm-commits
• [clang] [llvm] KISHAN KUMAR S D, HRUTHIK K K , KIRAN V-R V COLLEGE OF ENGINEERING(CSE 6TH SEM)-Implement Clang identifiers to retrieve the mangled name and the fully qualified name of functions #5 (PR #145042)   KISHAN KUMAR S D via llvm-commits
• [clang] [llvm] KISHAN KUMAR S D, HRUTHIK K K , KIRAN V-R V COLLEGE OF ENGINEERING(CSE 6TH SEM)-Implement Clang identifiers to retrieve the mangled name and the fully qualified name of functions #5 (PR #145042)   KISHAN KUMAR S D via llvm-commits
• [clang] [llvm] Add function scope identifier (PR #145074)   KUSHAL R U via llvm-commits
• [clang] [llvm] Add function scope identifier (PR #145074)   KUSHAL R U via llvm-commits
• [llvm] [GOFF] Introduce GOFFWriter class (PR #131216)   Kai Nacke via llvm-commits
• [llvm] [HLSL][RootSignature] Implement serialization of remaining Root Elements (PR #143198)   Kaitlin Peng via llvm-commits
• [llvm] [mlir] [Utils][mlir] Fix interaction between CodeExtractor and OpenMPIRBuilder (PR #145051)   Kajetan Puchalski via llvm-commits
• [llvm] [mlir] [Utils][mlir] Fix interaction between CodeExtractor and OpenMPIRBuilder (PR #145051)   Kajetan Puchalski via llvm-commits
• [llvm] [mlir] [Utils][mlir] Fix interaction between CodeExtractor and OpenMPIRBuilder (PR #145051)   Kajetan Puchalski via llvm-commits
• [llvm] Annotate potentially unused variables introduced in #133499 (PR #144379)   Karlo Basioli via llvm-commits
• [llvm] Annotate potentially unused variables introduced in #133499 (PR #144379)   Karlo Basioli via llvm-commits
• [llvm] Port #143108 to bazel (PR #144538)   Karlo Basioli via llvm-commits
• [llvm] Port #143108 to bazel (PR #144538)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build for #142771 (PR #144659)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build for #142771 (PR #144659)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build issue caused by 142986 (PR #144721)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build issue caused by 142986 (PR #144721)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build issue caused by #142986 second attempt (#144721 didnt… (PR #144743)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build issue caused by #142986 second attempt (#144721 didnt… (PR #144743)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build after #144594 (PR #144904)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build after #144594 (PR #144904)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build after #144594, mark variable as potentially unused (PR #144910)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build after #144594, mark variable as potentially unused (PR #144910)   Karlo Basioli via llvm-commits
• [llvm] 2dd50bf - [OpenMP] Fix warnings   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144293)   Kazu Hirata via llvm-commits
• [llvm] [nfc][jt] Drop `std::optional` pointers (PR #144548)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Remove an extraneous variable (NFC) (PR #144937)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use "= delete" to delete constructors (NFC) (PR #144938)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144941)   Kazu Hirata via llvm-commits
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• [llvm] [ADT] Remove an extraneous variable (NFC) (PR #144937)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use "= delete" to delete constructors (NFC) (PR #144938)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove an extraneous cast (NFC) (PR #144955)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144941)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Remove an extraneous cast (NFC) (PR #144955)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Migrate away from ArrayRef(std::nullopt) (NFC) (PR #144967)   Kazu Hirata via llvm-commits
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• [llvm] [TableGen] Remove redundant control flow statements (NFC) (PR #145143)   Kazu Hirata via llvm-commits
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• [llvm] [BOLT] Remove a redundant call to std::unique_ptr<T>::get (NFC) (PR #145211)   Kazu Hirata via llvm-commits
• [llvm] [Instrumentation] Drop "const" from a return type (NFC) (PR #145208)   Kazu Hirata via llvm-commits
• [lld] [lld] Use llvm::partition_point (NFC) (PR #145209)   Kazu Hirata via llvm-commits
• [compiler-rt] Conditionalise the addition of Aarch64 function Multi versioning support on aarch64 target (PR #143749)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Consider StreamingSVE in shouldExpandGetActiveLaneMask (PR #144722)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Consider StreamingSVE in shouldExpandGetActiveLaneMask (PR #144722)   Kerry McLaughlin via llvm-commits
• [clang] [flang] [llvm] Fix and reapply IR PGO support for Flang (PR #142892)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   Kiran Chandramohan via llvm-commits
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• [llvm] [BOLT] Gadget scanner: detect authentication oracles (PR #135663)   Kristof Beyls via llvm-commits
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• [llvm] [IPO] Added attributor for identifying invariant loads (PR #141800)   Krzysztof Drewniak via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] propagate const offset through GEP chains (PR #143470)   Krzysztof Drewniak via llvm-commits
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• [clang] [llvm] [OpenMP] Add directive spellings introduced in spec v6.0 (PR #141772)   Krzysztof Parzyszek via llvm-commits
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• [flang] [llvm] [mlir] [flang][OpenMP] Enable tiling (PR #143715)   Krzysztof Parzyszek via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
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• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Kseniya Tikhomirova via llvm-commits
• [compiler-rt] [MSan] Fix wrong unpoison size in SignalAction (PR #144071)   Kunqiu Chen via llvm-commits
• [compiler-rt] [MSan] Fix wrong unpoison size in SignalAction (PR #144071)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Kunqiu Chen via llvm-commits
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• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Kunqiu Chen via llvm-commits
• [llvm] [TSan] Fix missing inst cleanup (PR #144067)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Clarify and enforce shadow end alignment (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Clarify and enforce shadow end alignment (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Clarify and enforce shadow end alignment (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Clarify and enforce shadow end alignment (PR #144648)   Kunqiu Chen via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Kunqiu Chen via llvm-commits
• [llvm] [RISCV] Change input register type for QC_SWM and QC_SWMI (PR #144294)   LLVM Continuous Integration via llvm-commits
• [llvm] [aarch64] Fix Arm64EC libcall lowering after recent refactoring. (PR #143977)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp slt X, 0 (#142593) (PR #143846)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144293)   LLVM Continuous Integration via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[llvm][StackProtector] Add noreturn to __stack_chk_fail call" (PR #144452)   LLVM Continuous Integration via llvm-commits
• [llvm] [TargetParser] Increase MAX_SUBTARGET_FEATURES to 384 (PR #144326)   LLVM Continuous Integration via llvm-commits
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• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   LLVM Continuous Integration via llvm-commits
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• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   LLVM Continuous Integration via llvm-commits
• [llvm] [Remarks] Elaborate on called intrinsics (PR #143985)   LLVM Continuous Integration via llvm-commits
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• [llvm] [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (PR #141758)   LLVM Continuous Integration via llvm-commits
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• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   LLVM Continuous Integration via llvm-commits
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• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
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• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
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• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
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• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   LLVM Continuous Integration via llvm-commits
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• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   LLVM Continuous Integration via llvm-commits
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• [llvm] [AArch64] Lower jump table cases threshold to 10 (PR #143632)   LLVM Continuous Integration via llvm-commits
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• [llvm] [SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (PR #145120)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (PR #145120)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   LLVM Continuous Integration via llvm-commits
• [llvm] 090f409 - [gn build] Port 0f302f38b001   LLVM GN Syncbot via llvm-commits
• [llvm] 238abf8 - [gn build] Port f75973949b0e   LLVM GN Syncbot via llvm-commits
• [llvm] 7897191 - [gn build] Port 9524bfb27020   LLVM GN Syncbot via llvm-commits
• [llvm] 369e840 - [gn build] Port 1bb2328fd3ad   LLVM GN Syncbot via llvm-commits
• [llvm] 550ed9e - [gn build] Port e7dd223ec451   LLVM GN Syncbot via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Add support for Load Instructions in subprocess execution mode (PR #144895)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Add support for Load Instructions in subprocess execution mode (PR #144895)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Add support for Load Instructions in subprocess execution mode (PR #144895)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)   Lakshay Kumar via llvm-commits
• [llvm] Added clarifying comment to 'LLVMLinkInMCJIT' and 'LLVMLinkInInterpreter' (PR #92467)   Lang Hames via llvm-commits
• [llvm] Added clarifying comment to 'LLVMLinkInMCJIT' and 'LLVMLinkInInterpreter' (PR #92467)   Lang Hames via llvm-commits
• [llvm] Added clarifying comment to 'LLVMLinkInMCJIT' and 'LLVMLinkInInterpreter' (PR #92467)   Lang Hames via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   Lang Hames via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   Lang Hames via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   Lang Hames via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   Lang Hames via llvm-commits
• [llvm] [Orc] Fix error handling in `ORCPlatformSupport::initialize` (PR #144637)   Lang Hames via llvm-commits
• [llvm] [ORC] Apply MachO::CPU_SUBTYPE_MASK to comparison in getDylibInterfac… (PR #145154)   Lang Hames via llvm-commits
• [llvm] [ORC] Apply MachO::CPU_SUBTYPE_MASK to comparison in getDylibInterfac… (PR #145154)   Lang Hames via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Larry Meadows via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Larry Meadows via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Larry Meadows via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Larry Meadows via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Larry Meadows via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Larry Meadows via llvm-commits
• [compiler-rt] [compiler-rt] [Fuzzer] Fix ARMv7 test link failure by linking unwinder (PR #144495)   Leandro Lupori via llvm-commits
• [llvm] [ConstantFold] Special case atan +/-0.0 (PR #143962)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix ppc-reduce-cr-ops mishandling of subregister uses (PR #144405)   Lei Huang via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Add code to spill and restore DMRp registers (PR #142443)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Add code to spill and restore DMRp registers (PR #142443)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix ppc-reduce-cr-ops mishandling of subregister uses (PR #144405)   Lei Huang via llvm-commits
• [llvm] [Matrix] Hoist finalizeLowering into caller. NFC (PR #143038)   Lei Huang via llvm-commits
• [llvm] [Matrix] Hoist finalizeLowering into caller. NFC (PR #143038)   Lei Huang via llvm-commits
• [llvm] [ConstantFold] Special case atan +/-0.0 (PR #143962)   Lei Huang via llvm-commits
• [llvm] [ConstantFold] Special case atan +/-0.0 (PR #143962)   Lei Huang via llvm-commits
• [llvm] Fix a modules-enabled build CI failure (PR #144460)   Lei Wang via llvm-commits
• [llvm] [NFC] Simplify checks using isDebugOrPseudoInstr API (PR #145127)   Lei Wang via llvm-commits
• [llvm] [NFC] Simplify checks using isDebugOrPseudoInstr API (PR #145127)   Lei Wang via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Leon Clark via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Leon Clark via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Leon Clark via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Leon Clark via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] e14f327 - [RISCV] Pre-test for #144461   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Liao Chunyu via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Louis Dionne via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Louis Dionne via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Louis Dionne via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   Louis Dionne via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Louis Dionne via llvm-commits
• [llvm] [runtimes] Allow use of external llvm-lit on standalone builds (PR #144347)   Lucas Duarte Prates via llvm-commits
• [llvm] [runtimes] Allow use of external llvm-lit on standalone builds (PR #144347)   Lucas Duarte Prates via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (PR #140036)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Lucas Ramirez via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Luke Lau via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Luke Lau via llvm-commits
• [llvm] [TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (PR #144007)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (PR #144401)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (PR #118638)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   Luke Lau via llvm-commits
• [llvm] [VPlan] Preserve trunc nuw/nsw in VPRecipeWithIRFlags (PR #144700)   Luke Lau via llvm-commits
• [llvm] [VPlan] Preserve trunc nuw/nsw in VPRecipeWithIRFlags (PR #144700)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Luke Lau via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   Luke Lau via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Luke Lau via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Luke Lau via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Luke Lau via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   Luke Lau via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Luke Lau via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Luke Lau via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Luke Lau via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move performCombineVMergeAndVOps to RISCVVectorPeephole (PR #144076)   Luke Lau via llvm-commits
• [llvm] [VPlan] Pass VF as operand to VPWidenPointerInductionRecipe (PR #119859)   Luke Lau via llvm-commits
• [llvm] [VPlan] Pass VF as operand to VPWidenPointerInductionRecipe (PR #119859)   Luke Lau via llvm-commits
• [llvm] [VPlan] Pass NumUnrolledElems as operand to VPWidenPointerInductionRecipe. NFC (PR #119859)   Luke Lau via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Luke Lau via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Luke Lau via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Luke Lau via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Luke Lau via llvm-commits
• [llvm] [VPlan] Pass NumUnrolledElems as operand to VPWidenPointerInductionRecipe. NFC (PR #119859)   Luke Lau via llvm-commits
• [llvm] [VPlan] Pass NumUnrolledElems as operand to VPWidenPointerInductionRecipe. NFC (PR #119859)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Luke Lau via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Luke Lau via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Luke Lau via llvm-commits
• [llvm] [IA] Remove recursive [de]interleaving support (PR #143875)   Luke Lau via llvm-commits
• [llvm] [IA] Remove recursive [de]interleaving support (PR #143875)   Luke Lau via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Luke Lau via llvm-commits
• [llvm] 521adc9 - [VPlan] Use createScalarZExtOrTrunc when expanding expandVPWidenIntOrFpInduction   Luke Lau via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] [Backend] Draft pull request for #129441 (PR #145108)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Macsen Casaus via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Macsen Casaus via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Macsen Casaus via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Macsen Casaus via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Macsen Casaus via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   Madhur Amilkanthwar via llvm-commits
• [llvm] [WIP][LoopIdiomVectorize] Recognize and transform minidx pattern (PR #144987)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   Madhur Amilkanthwar via llvm-commits
• [llvm] [WIP][LoopIdiomVectorize] Recognize and transform minidx pattern (PR #144987)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopVectorize] Add test case for minloc reduction (PR #141556)   Madhur Amilkanthwar via llvm-commits
• [llvm] [BOLT][Linux] Fix linux_banner lookup (PR #144962)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][Linux] Fix linux_banner lookup (PR #144962)   Maksim Panchenko via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Marco Elver via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Marco Elver via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Marco Elver via llvm-commits
• [llvm] [TLI] Add support for pvalloc() (PR #144949)   Marco Elver via llvm-commits
• [llvm] [RISCV] Update SpacemiT X60 scheduling latencies based on hardware measurements (PR #144730)   Mark Zhuang via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Martin Storsjö via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Martin Storsjö via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Martin Storsjö via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Martin Storsjö via llvm-commits
• [llvm] [Reland][ValueTracking] Improve Bitcast handling to match SDAG (PR #145223)   Martin Storsjö via llvm-commits
• [clang] [llvm] [AArch64][VecLib] Add libmvec support for AArch64 targets (PR #143696)   Mary Kassayova via llvm-commits
• [clang] [llvm] [AArch64][VecLib] Add libmvec support for AArch64 targets (PR #143696)   Mary Kassayova via llvm-commits
• [clang] [llvm] [AArch64][VecLib] Add libmvec support for AArch64 targets (PR #143696)   Mary Kassayova via llvm-commits
• [clang] [llvm] [AArch64][VecLib] Add libmvec support for AArch64 targets (PR #143696)   Mary Kassayova via llvm-commits
• [llvm] DAG: Check libcall function is supported before emission (PR #144314)   Matt Arsenault via llvm-commits
• [llvm] DAG: Check libcall function is supported before emission (PR #144314)   Matt Arsenault via llvm-commits
• [llvm] DAG: Check libcall function is supported before emission (PR #144314)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix hardcoding calling convention of sincos_stret (PR #144336)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix hardcoding calling convention of sincos_stret (PR #144336)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix hardcoding calling convention of sincos_stret (PR #144336)   Matt Arsenault via llvm-commits
• [llvm] DAG: Move soft float predicate management into RuntimeLibcalls (PR #142905)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   Matt Arsenault via llvm-commits
• [llvm] ARM: Stop using setCmpLibcallCC in MachO case (PR #142710)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix hardcoding calling convention of sincos_stret (PR #144336)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Use default member initializers. NFC. (PR #144349)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Add arm64ec libcall tests for __arm_sc_* functions (PR #144356)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Add arm64ec libcall tests for __arm_sc_* functions (PR #144356)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Add arm64ec libcall tests for __arm_sc_* functions (PR #144356)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (PR #141903)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (PR #141903)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] llvm-tli-checker: Remove TLINameList helper struct (PR #142535)   Matt Arsenault via llvm-commits
• [llvm] llvm-tli-checker: Remove TLINameList helper struct (PR #142535)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Cleanup sincos predicate functions (PR #143081)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Use array initializers for default values (PR #143082)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix outline atomic libcall names for arm64ec (PR #144378)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix outline atomic libcall names for arm64ec (PR #144378)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Fix outline atomic libcall names for arm64ec (PR #144378)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Stop reporting memcpy as an alias of memmove on AIX (PR #143836)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Add arm64ec libcall tests for __arm_sc_* functions (PR #144356)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (PR #141903)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for v_lshl_add_u64 pattern. NFC. (PR #144544)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (PR #141903)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add cost model tests for minimumnum/maximumnum (PR #141904)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add cost model tests for minimumnum/maximumnum (PR #141904)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add cost model tests for minimumnum/maximumnum (PR #141904)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC][AIX] Specify pointer info and alignment for stack store (PR #144526)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add cost model tests for minimumnum/maximumnum (PR #141904)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add cost model tests for minimumnum/maximumnum (PR #141904)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add cost model tests for minimumnum/maximumnum (PR #141904)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix cost model for 16-bit operations on gfx8 (PR #141943)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix cost model for 16-bit operations on gfx8 (PR #141943)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix cost model for 16-bit operations on gfx8 (PR #141943)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix cost model for 16-bit operations on gfx8 (PR #141943)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix cost model for 16-bit operations on gfx8 (PR #141943)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Reduce cost of f64 copysign (PR #141944)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Reduce cost of f64 copysign (PR #141944)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Reduce cost of f64 copysign (PR #141944)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cost model for minimumnum/maximumnum (PR #141946)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cost model for minimumnum/maximumnum (PR #141946)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cost model for minimumnum/maximumnum (PR #141946)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Cost model for minimumnum/maximumnum (PR #141946)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline cost model tests for special argument intrinsics (PR #141947)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline cost model tests for special argument intrinsics (PR #141947)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline cost model tests for special argument intrinsics (PR #141947)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Report special input intrinsics as free (PR #141948)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Report special input intrinsics as free (PR #141948)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Report special input intrinsics as free (PR #141948)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   Matt Arsenault via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Add D16 test for multiple fptrunc image sample (PR #141771)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix tracking subreg defs when folding through reg_sequence (PR #140608)   Matt Arsenault via llvm-commits
• [llvm] WebAssembly: Stop directly using RuntimeLibcalls.def (PR #143054)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Fix using long double libm functions for f128 intrinsics (PR #144382)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Fix using long double libm functions for f128 intrinsics (PR #144382)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Fix using long double libm functions for f128 intrinsics (PR #144382)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][CodeLayout] Fix segfault on access to deleted block in MBP. (PR #142357)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][CodeLayout] Fix segfault on access to deleted block in MBP. (PR #142357)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][CodeLayout] Fix segfault on access to deleted block in MBP. (PR #142357)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][CodeLayout] Fix segfault on access to deleted block in MBP. (PR #142357)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Move ABI option enums to support (PR #142912)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Move ABI option enums to support (PR #142912)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Move ABI option enums to support (PR #142912)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] [NPM] Fix pass registry entry (PR #144643)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI enum from TargetMachine to TargetParser (PR #144725)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI enum from TargetMachine to TargetParser (PR #144725)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI enum from TargetMachine to TargetParser (PR #144725)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move declaration of supportSplitCSR to be public (PR #144679)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move declaration of supportSplitCSR to be public (PR #144679)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move declaration of supportSplitCSR to be public (PR #144679)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI helpers from Subtarget to TargetMachine (PR #144680)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI helpers from Subtarget to TargetMachine (PR #144680)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI helpers from Subtarget to TargetMachine (PR #144680)   Matt Arsenault via llvm-commits
• [llvm] ARM: Move ABI enum from TargetMachine to TargetParser (PR #144725)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Matt Arsenault via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   Matt Arsenault via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold fmed3 when inputs include infinity (PR #144824)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Matt Arsenault via llvm-commits
• [llvm] MC: Move ExceptionHandling enum to Support (PR #144692)   Matt Arsenault via llvm-commits
• [llvm] ARM: Avoid using isTarget wrappers around Triple predicates (PR #144705)   Matt Arsenault via llvm-commits
• [llvm] MC: Move ExceptionHandling enum to Support (PR #144692)   Matt Arsenault via llvm-commits
• [llvm] MC: Move ExceptionHandling enum to Support (PR #144692)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in exception handling type (PR #144696)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in exception handling type (PR #144696)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in exception handling type (PR #144696)   Matt Arsenault via llvm-commits
• [llvm] ARM: Avoid using isTarget wrappers around Triple predicates (PR #144705)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize rotate instruction selection patterns (PR #143551)   Matt Arsenault via llvm-commits
• [llvm] WebAssembly: Stop directly using RuntimeLibcalls.def (PR #143054)   Matt Arsenault via llvm-commits
• [llvm] ARM: Avoid using isTarget wrappers around Triple predicates (PR #144705)   Matt Arsenault via llvm-commits
• [llvm] WebAssembly: Stop directly using RuntimeLibcalls.def (PR #143054)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Pass in ABI name from MCOptions (PR #144894)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Migrate away from ArrayRef(std::nullopt) (NFC) (PR #144967)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Stop reporting memcpy as an alias of memmove on AIX (PR #143836)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove AMDGPUInstrInfo class (PR #144984)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove AMDGPUInstrInfo class (PR #144984)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove AMDGPUInstrInfo class (PR #144984)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (PR #144985)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (PR #144985)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (PR #144985)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (PR #144986)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (PR #144986)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (PR #144986)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (PR #144986)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (PR #144985)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove AMDGPUInstrInfo class (PR #144984)   Matt Arsenault via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (PR #143982)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline tests for VGPR MFMA rewriting pass (PR #145023)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline tests for VGPR MFMA rewriting pass (PR #145023)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline tests for VGPR MFMA rewriting pass (PR #145023)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fold frame indexes into s_or_b32 and s_and_b32 (PR #102345)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Simplify checks using isDebugOrPseudoInstr API (PR #145127)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix tracking subreg defs when folding through reg_sequence (PR #140608)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (PR #145130)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (PR #145130)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (PR #145130)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerBufferFatPointers (PR #145132)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerBufferFatPointers (PR #145132)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerBufferFatPointers (PR #145132)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (PR #145130)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerBufferFatPointers (PR #145132)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for unsupported ds_ordered_count (PR #145172)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for unsupported ds_ordered_count (PR #145172)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (PR #145173)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (PR #145173)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (PR #145173)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (PR #145173)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for unsupported ds_ordered_count (PR #145172)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/MC: Try harder to evaluate absolute MC expressions (PR #145146)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error in image intrinsic lowering (PR #145201)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error in image intrinsic lowering (PR #145201)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error in image intrinsic lowering (PR #145201)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error on ds ordered intrinsics (PR #145202)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error on ds ordered intrinsics (PR #145202)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error on ds ordered intrinsics (PR #145202)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   Matthew Devereau via llvm-commits
• [llvm] [LV] Add support for partial reductions without a binary op (PR #133922)   Matthew Devereau via llvm-commits
• [llvm] [LV] Add support for partial reductions without a binary op (PR #133922)   Matthew Devereau via llvm-commits
• [llvm] [LV] Add support for partial reductions without a binary op (PR #133922)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   Matthew Devereau via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Matthew Devereau via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Matthew Devereau via llvm-commits
• [clang] [llvm] [AArch64TargetParser]Fix reconstructFromParsedFeatures ignoring negative features (PR #142236)   Matthias Braun via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Matthias Braun via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Matthias Braun via llvm-commits
• [llvm] [GlobalOpt] Update debug info when changing CC to Fast (PR #144303)   Maurice Heumann via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LoopVectorize] Vectorize fixed-order recurrence with vscale x 1. (PR #142772)   Mel Chen via llvm-commits
• [llvm] [LoopVectorize] Vectorize fixed-order recurrence with vscale x 1. (PR #142772)   Mel Chen via llvm-commits
• [llvm] [LoopVectorize] Vectorize fixed-order recurrence with vscale x 1. (PR #142772)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Mel Chen via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   Mel Chen via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Mel Chen via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Mel Chen via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Mel Chen via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Mel Chen via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Mel Chen via llvm-commits
• [llvm] [llvm][DebugInfo] Encode DW_AT_object_pointer on method declarations with DW_FORM_implicit_const (PR #124790)   Michael Buch via llvm-commits
• [clang] [llvm] Revert "[lit][clang] Avoid realpath on Windows due to MAX_PATH limitations" (PR #139739)   Michael Jabbour via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Michael Jones via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [llvm] [BPF] Support wrapping BPF map structs into nested, single field structs (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Support wrapping BPF map structs into nested, single field structs (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Michal Rostecki via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Michał Górny via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Michał Górny via llvm-commits
• [llvm] c16dc63 - [OMPIRBuilder] Fix gcc -Wparentheses warning [NFC]   Mikael Holmen via llvm-commits
• [llvm] [SLP] Fix isCommutative to check uses of the original instruction instead of the converted instruction. (PR #143094)   Mikael Holmén via llvm-commits
• [llvm] [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (PR #143204)   Mikael Holmén via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Mikhail R. Gadelha via llvm-commits
• [llvm] [RISCV] Update SpacemiT X60 scheduling latencies based on hardware measurements (PR #144730)   Mikhail R. Gadelha via llvm-commits
• [llvm] [RISCV] Update SpacemiT X60 scheduling latencies based on hardware measurements (PR #144730)   Mikhail R. Gadelha via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Mikhail R. Gadelha via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion Product) extension (PR #144320)   Min-Yih Hsu via llvm-commits
• [llvm] [TargetParser] Increase MAX_SUBTARGET_FEATURES to 384 (PR #144326)   Min-Yih Hsu via llvm-commits
• [llvm] [TargetParser] Increase MAX_SUBTARGET_FEATURES to 384 (PR #144326)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Factor out common SiFive7 scheduling model into an abstraction layer (PR #144442)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add SiFive X390 scheduling model (PR #143938)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update SpacemiT X60 scheduling latencies based on hardware measurements (PR #144730)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update SpacemiT X60 scheduling latencies based on hardware measurements (PR #144730)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen][Docs] Fix empty list syntax in TableGen doc. (PR #145041)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add SiFive X390 scheduling model (PR #143938)   Min-Yih Hsu via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Min-Yih Hsu via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Min-Yih Hsu via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Min-Yih Hsu via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Min-Yih Hsu via llvm-commits
• [llvm] [SDPatternMatch] Add m_Poison matcher (PR #144860)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [SDPatternMatch] Add m_Poison matcher (PR #144860)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Ming Yan via llvm-commits
• [lld] [LLD][ELF][RISCV][Zicfilp][Zicfiss] Support `-z <zicfilp-unlabeled|zicfilp-func-sig|zicfiss>-report-dynamic=<none|warning|error>` options (PR #144304)   Ming-Yi Lai via llvm-commits
• [lld] [LLD][ELF][RISCV][Zicfilp][Zicfiss] Support `-z <zicfilp-unlabeled|zicfilp-func-sig|zicfiss>-report-dynamic=<none|warning|error>` options (PR #144304)   Ming-Yi Lai via llvm-commits
• [lld] [LLD][ELF][RISCV][Zicfilp][Zicfiss] Support `-z <zicfilp-unlabeled|zicfilp-func-sig|zicfiss>-report-dynamic=<none|warning|error>` options (PR #144304)   Ming-Yi Lai via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Mircea Trofin via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Mircea Trofin via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Mircea Trofin via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Mircea Trofin via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Mircea Trofin via llvm-commits
• [llvm] [LoopPeel] Fix branch weights' effect on block frequencies (PR #128785)   Mircea Trofin via llvm-commits
• [llvm] [nfc][jt] Drop std::optional<pointer>. (PR #144548)   Mircea Trofin via llvm-commits
• [llvm] [nfc][jt] Drop std::optional<pointer>. (PR #144548)   Mircea Trofin via llvm-commits
• [llvm] [nfc][jt] Drop `std::optional` pointers (PR #144548)   Mircea Trofin via llvm-commits
• [llvm] [nfc][jt] Drop `std::optional` pointers (PR #144548)   Mircea Trofin via llvm-commits
• [llvm] [nfc][jt] Drop `std::optional` pointers (PR #144548)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count (iFDO cases (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [nfc][jt] Drop `std::optional` pointers (PR #144548)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Mircea Trofin via llvm-commits
• [llvm] AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (PR #141903)   Mirko Brkušanin via llvm-commits
• [llvm] AMDGPU: Combine nnan fminimum/fmaximum to fminnum_ieee/fmaxnum_ieee (PR #142217)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][NFCI] Add IEEEMinimumMaximumInsts SubtargetFeature (PR #141081)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][NFCI] Add IEEEMinimumMaximumInsts SubtargetFeature (PR #141081)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][NFCI] Add IEEEMinimumMaximumInsts SubtargetFeature (PR #141081)   Mirko Brkušanin via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   NAKAMURA Takumi via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   NAKAMURA Takumi via llvm-commits
• [llvm] [AArch64][Codegen]Transform saturating smull to sqdmulh (PR #143671)   Nashe Mncube via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   Nathan Chancellor via llvm-commits
• [clang] [llvm] [HLSL] Use hidden visibility for external linkage. (PR #140292)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Allow __spirv_SpecConstant in Vulkan shaders (PR #143543)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Allow __spirv_SpecConstant in Vulkan shaders (PR #143543)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL] Use hidden visibility for external linkage. (PR #140292)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Fix LinkageAttribute emission for BuiltIn (PR #144701)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Nathan Gauër via llvm-commits
• [llvm] [PowerPC] Fix ppc-reduce-cr-ops mishandling of subregister uses (PR #144405)   Nemanja Ivanovic via llvm-commits
• [llvm] [PowerPC] Fix ppc-reduce-cr-ops mishandling of subregister uses (PR #144405)   Nemanja Ivanovic via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   Nemanja Ivanovic via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   Nicholas Guy via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   Nicholas Guy via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   Nicholas Guy via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Fix s_barrier_signal_isfirst for single-wave workgroups (PR #143634)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Fix s_barrier_signal_isfirst for single-wave workgroups (PR #143634)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Fix s_barrier_signal_isfirst for single-wave workgroups (PR #143634)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/GFX12: Fix s_barrier_signal_isfirst for single-wave workgroups (PR #143634)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/MC: Try harder to evaluate absolute MC expressions (PR #145146)   Nicolai Hähnle via llvm-commits
• [llvm] [InstCombine] Fold `select(load, val) + store` into `llvm.masked.store` (PR #144298)   Nikita Popov via llvm-commits
• [llvm] InstCombine: improve optimizations for ceiling division with no overflow (PR #142869)   Nikita Popov via llvm-commits
• [llvm] InstCombine: improve optimizations for ceiling division with no overflow (PR #142869)   Nikita Popov via llvm-commits
• [llvm] InstCombine: improve optimizations for ceiling division with no overflow (PR #142869)   Nikita Popov via llvm-commits
• [llvm] InstCombine: improve optimizations for ceiling division with no overflow (PR #142869)   Nikita Popov via llvm-commits
• [llvm] InstCombine: improve optimizations for ceiling division with no overflow (PR #142869)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Fix poison propagation in `matchFastFloatClamp` (PR #144215)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp slt X, 0 (#142593) (PR #143846)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold icmp with add/sub instructions having the same operands (PR #143241)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold icmp with add/sub instructions having the same operands (PR #143241)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold icmp with add/sub instructions having the same operands (PR #143241)   Nikita Popov via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Nikita Popov via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Nikita Popov via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Nikita Popov via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Nikita Popov via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `select(load, val) + store` into `llvm.masked.store` (PR #144298)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Nikita Popov via llvm-commits
• [llvm] 3824a2d - [MemoryBuiltins] Support allocas in getInitialValueOfAllocation (NFC)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Bail out when reading padding of type (PR #144330)   Nikita Popov via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   Nikita Popov via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   Nikita Popov via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold rotate patterns with ZExt/Trunc at different Points (PR #142578)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold rotate patterns with ZExt/Trunc at different Points (PR #142578)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold rotate patterns with ZExt/Trunc at different Points (PR #142578)   Nikita Popov via llvm-commits
• [clang] [llvm] [KeyInstr] Add docs (PR #137991)   Nikita Popov via llvm-commits
• [clang] [llvm] [KeyInstr] Add docs (PR #137991)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Bail out when reading padding of type (PR #144330)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Bail out when reading padding of type (PR #144330)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Range of cmp intrinsics are -1, 0, and 1 (PR #144365)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Handle reading from type padding (PR #144330)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Handle reading from type padding (PR #144330)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold icmp with add/sub instructions having the same operands (PR #143241)   Nikita Popov via llvm-commits
• [llvm] [LoopInterchange] Enable it by default (PR #124911)   Nikita Popov via llvm-commits
• [llvm] [instcombine] Delete dead transform for rev(binop splat, rev(x)) (PR #143967)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   Nikita Popov via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Nikita Popov via llvm-commits
• [llvm] 308b97a - [LICM] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] 49c6235 - [PowerPC] Regenerate MIR test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] 3451cd5 - [PowerPC] Regenerate MIR test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] 76ea1db - [PowerPC] Split test into assembly and MIR variants (NFC)   Nikita Popov via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] propagate const offset through GEP chains (PR #143470)   Nikita Popov via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Nikita Popov via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Use cast instead of dyn_cast. NFC (PR #144634)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Prevent widenDestArray from shrinking an alloca. (PR #144641)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Prevent widenDestArray from shrinking an alloca. (PR #144641)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Revert global widening transform (PR #144652)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Prevent widenDestArray from shrinking an alloca. (PR #144641)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Revert global widening transform (PR #144652)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][AIX] Specify pointer info and alignment for stack store (PR #144526)   Nikita Popov via llvm-commits
• [llvm] [TSan] Fix missing inst cleanup (PR #144067)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][AIX] Specify pointer info and alignment for stack store (PR #144526)   Nikita Popov via llvm-commits
• [llvm] [Hexagon/LoopIdiom] Protect test against O2 changes (PR #144734)   Nikita Popov via llvm-commits
• [llvm] [HashRecognize] Fix the analysis result (PR #144742)   Nikita Popov via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   Nikita Popov via llvm-commits
• [llvm] [HashRecognize] Don't const-qualify Values in result (PR #144752)   Nikita Popov via llvm-commits
• [llvm] [Hexagon/LoopIdiom] Protect test against O2 changes (PR #144734)   Nikita Popov via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Nikita Popov via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Revert global widening transform (PR #144652)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] remove dead loads, such as memcpy from undef (PR #143958)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Preserve nneg flag when folding (trunc (zext X))->(zext X). (PR #144807)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Nikita Popov via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Nikita Popov via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Nikita Popov via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Nikita Popov via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Nikita Popov via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Nikita Popov via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Optimize sub(sext(add(x, y)), sext(add(x, z))). (PR #144174)   Nikita Popov via llvm-commits
• [llvm] [SCCP] Simplify [us]cmp(X, Y) into X - Y (PR #144717)   Nikita Popov via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Reuse previously generated GlobalVariable for memset_pattern16 when possible (PR #144677)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Nikita Popov via llvm-commits
• [llvm] [FlattenCFG] Fixup Phi nodes during CFG flattening (PR #143766)   Nikita Popov via llvm-commits
• [llvm] [FlattenCFG] Fixup Phi nodes during CFG flattening (PR #143766)   Nikita Popov via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Remove unnecessary EdgeUsesOnly set (NFC) (PR #144912)   Nikita Popov via llvm-commits
• [llvm] f4db142 - [SCCP] Move logic for removing ssa.copy into Solver (NFC)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Remove unnecessary EdgeUsesOnly set (NFC) (PR #144912)   Nikita Popov via llvm-commits
• [llvm] cbb5e24 - [PredicateInfo] Remove redundant EdgeOnly member (NFC)   Nikita Popov via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Nikita Popov via llvm-commits
• [llvm] 8973be4 - [PredicateInfo] Avoid duplicate stack in scope check (NFC)   Nikita Popov via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Nikita Popov via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Nikita Popov via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Nikita Popov via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Nikita Popov via llvm-commits
• [llvm] b85387d - [SCCP] Check instruction type before querying PredicateInfo (NFC)   Nikita Popov via llvm-commits
• [llvm] PowerPC: Stop reporting memcpy as an alias of memmove on AIX (PR #143836)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Don't use depth first walk (NFCI) (PR #145016)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Cache ssa.copy declarations (NFC) (PR #145020)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Don't store Def in ValueDFS (NFC) (PR #145022)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Cache ssa.copy declarations (NFC) (PR #145020)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Nikita Popov via llvm-commits
• [llvm] [Passes] Remove LoopInterchange from O1 pipeline (PR #145071)   Nikita Popov via llvm-commits
• [llvm] [LoopInterchange] Enable it by default (PR #124911)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   Nikita Popov via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   Nikita Popov via llvm-commits
• [llvm] [Passes] Remove LoopInterchange from O1 pipeline (PR #145071)   Nikita Popov via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   Nikita Popov via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   Nikita Popov via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   Nikita Popov via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Nikita Popov via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Don't use depth first walk (NFCI) (PR #145016)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Nikita Popov via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Nikita Popov via llvm-commits
• [llvm] [Reland][ValueTracking] Improve Bitcast handling to match SDAG (PR #145223)   Nikita Popov via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   Nikita Popov via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   Nikolas Klauser via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [compiler-rt] [libcxxabi] [libunwind] [runtimes][PAC] Harden unwinding when possible (#138571) (PR #143230)   Oliver Hunt via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Oliver Stannard via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   Oliver Stöneberg via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   Oliver Stöneberg via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Omkar Mohanty via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Omkar Mohanty via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Omkar Mohanty via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Omkar Mohanty via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Omkar Mohanty via llvm-commits
• [clang] [llvm] [KeyInstr] Add docs (PR #137991)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] [KeyInstr] Add docs (PR #137991)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [KeyInstr] Enable Key Instructions support in LLVM (PR #144324)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] llvm-c: Introduce 'LLVMDISubprogramReplaceType' (PR #143461)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (PR #144702)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic handling code from AssignmentTrackingAnalysis (PR #144674)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Resolve RemoveRedundantDbgInstrs fwd scan FIXME (PR #144718)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (PR #144702)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] [BOLT] Fix LLVM_APPEND_VC_REV support (PR #142410)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][NFC] Using target_triple in lit config (PR #144078)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][NFC] Using target_triple in lit config (PR #144078)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][NFCI] Simplify DataAggregator using traces (PR #143289)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Paschalis Mpeis via llvm-commits
• [llvm] [DOCS][BUILDBOT] Bump recommended worker version (PR #144853)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][test] Update X86/perf2bolt-spe.test (PR #145061)   Paschalis Mpeis via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Don't apply post-indexing on mismatched pointers (PR #145224)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Don't apply post-indexing on mismatched pointers (PR #145224)   Patryk Wychowaniec via llvm-commits
• [llvm] [AVR] Don't apply post-indexing on mismatched pointers (PR #145224)   Patryk Wychowaniec via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Paul Osmialowski via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   Paul Osmialowski via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   Paul Osmialowski via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Paul Osmialowski via llvm-commits
• [llvm] [TargetParser] Parse Amazon Linux triple and handle RuntimeLibcalls (PR #136114)   Paul Osmialowski via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Paul Osmialowski via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Paul Osmialowski via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Paul Osmialowski via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Paul Osmialowski via llvm-commits
• [clang] [llvm] [AArch64][VecLib] Add libmvec support for AArch64 targets (PR #143696)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (PR #144395)   Paul Walker via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't legalise splat constants until required. (PR #143571)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (PR #143532)   Paul Walker via llvm-commits
• [llvm] [LV] Change getSmallBestKnownTC to return an ElementCount (NFC) (PR #141793)   Paul Walker via llvm-commits
• [llvm] [LV][TTI] Calculate cost of extracting last index in a scalable vector (PR #144086)   Paul Walker via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Paul Walker via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (PR #143540)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (PR #143532)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (PR #143540)   Paul Walker via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Paul Walker via llvm-commits
• [llvm] c3929fb - [NFC][LLVM] Reorder SVE_SME codegen predicate classes.   Paul Walker via llvm-commits
• [llvm] [AArch64] Match indexed forms of fmul/fmla/fmls (PR #144892)   Paul Walker via llvm-commits
• [llvm] [AArch64] Match indexed forms of fmul/fmla/fmls (PR #144892)   Paul Walker via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Paul Walker via llvm-commits
• [llvm] Fix SPIR-V function ordering violation in linker (PR #145039)   Paulius Velesko via llvm-commits
• [llvm] Fix SPIR-V function ordering violation in linker (PR #145039)   Paulius Velesko via llvm-commits
• [llvm] Fix SPIR-V function ordering violation in linker (PR #145039)   Paulius Velesko via llvm-commits
• [llvm] Fix SPIR-V function ordering violation in linker (PR #145039)   Paulius Velesko via llvm-commits
• [llvm] [TargetParser] Increase MAX_SUBTARGET_FEATURES to 384 (PR #144326)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Factor out common SiFive7 scheduling model into an abstraction layer (PR #144442)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Factor out common SiFive7 scheduling model into an abstraction layer (PR #144442)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Factor out common SiFive7 scheduling model into an abstraction layer (PR #144442)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add SiFive X390 scheduling model (PR #143938)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add SiFive X390 scheduling model (PR #143938)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Pengcheng Wang via llvm-commits
• [llvm] [SDPatternMatch] Add m_Poison matcher (PR #144860)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   Pengcheng Wang via llvm-commits
• [llvm] [TableGen][Docs] Fix empty list syntax in TableGen doc. (PR #145041)   Pengcheng Wang via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   Pengying Xu via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add tests for missing readanylane combines (PR #142788)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add tests for missing readanylane combines (PR #142788)   Petar Avramovic via llvm-commits
• [llvm] LowerTypeTests: Use jump table entry type as value type of jump table alias. (PR #144462)   Peter Collingbourne via llvm-commits
• [llvm] LowerTypeTests: Use jump table entry type as value type of jump table alias. (PR #144462)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] 491b82a - ELF: Add branch-to-branch optimization.   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [flang] [llvm] [flang][runtime] Check SOURCE= conformability on ALLOCATE (PR #144113)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Restructure runtime to avoid recursion (relanding) (PR #143993)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Check SOURCE= conformability on ALLOCATE (PR #144113)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Allow INQUIRE(IOLENGTH=) in the presence of defined I/O (PR #144541)   Peter Klausler via llvm-commits
• [llvm] [BOLT][AArch64] Fix PREL Relocs on RHEL8 (PR #144505)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   Peter Smith via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Peter Smith via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Peter Smith via llvm-commits
• [llvm] RuntimeLibcalls: Pass in FloatABI and EABI type (PR #144691)   Peter Smith via llvm-commits
• [llvm] AArch64: Replace AArch64MCExpr with MCSpecifierExpr (PR #144632)   Peter Smith via llvm-commits
• [lld] [LLD][ELF] Include offset when adding Thunk symbols (PR #144995)   Peter Smith via llvm-commits
• [lld] [LLD][ELF] Include offset when adding Thunk symbols (PR #144995)   Peter Smith via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   Petr Hosek via llvm-commits
• [llvm] [RISCV][TTI] Refine reverse shuffle costing for high LMUL (PR #144155)   Philip Reames via llvm-commits
• [llvm] [InstSimplify] Add basic simplifications for vp.reverse (PR #144112)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Refine reverse shuffle costing for high LMUL (PR #144155)   Philip Reames via llvm-commits
• [llvm] [InstSimplify] Add basic simplifications for vp.reverse (PR #144112)   Philip Reames via llvm-commits
• [llvm] [InstSimplify] Add basic simplifications for vp.reverse (PR #144112)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Refine reverse shuffle costing for high LMUL (PR #144155)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (PR #144401)   Philip Reames via llvm-commits
• [llvm] [instcombine] Delete dead transform for rev(binop splat, rev(x)) (PR #143967)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [instcombine] Delete dead transform for reverse of binop (PR #143967)   Philip Reames via llvm-commits
• [llvm] [instcombine] Delete dead transform for reverse of binop (PR #143967)   Philip Reames via llvm-commits
• [llvm] [instcombine] Delete dead transform for reverse of binop (PR #143967)   Philip Reames via llvm-commits
• [llvm] [LICM] Support hoisting of non-argmemonly readonly calls (PR #144497)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Philip Reames via llvm-commits
• [llvm] [RISCV] Consolidate both copies of getLMUL1VT [nfc] (PR #144568)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   Philip Reames via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Philip Reames via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Philip Reames via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Support last iteration peeling of min/max intrinsics (PR #143598)   Philip Reames via llvm-commits
• [llvm] [RISCV] Consolidate both copies of getLMUL1VT [nfc] (PR #144568)   Philip Reames via llvm-commits
• [llvm] [RISCV] Consolidate both copies of getLMUL1VT [nfc] (PR #144568)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Avoid unprofitable last iteration peeling with equalities (PR #143588)   Philip Reames via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   Philip Reames via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Philip Reames via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   Philip Reames via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Philip Reames via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Philip Reames via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Philip Reames via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   Philip Reames via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   Philip Reames via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   Philip Reames via llvm-commits
• [llvm] [LV] Introduce and use VPBuilder::createScalarZExtOrTrunc [nfc] (PR #144946)   Philip Reames via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   Philip Reames via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   Philip Reames via llvm-commits
• [llvm] [LV] Introduce and use VPBuilder::createScalarZExtOrTrunc [nfc] (PR #144946)   Philip Reames via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   Philip Reames via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   Philip Reames via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Philip Reames via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Philip Reames via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [IA] Remove recursive [de]interleaving support (PR #143875)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (PR #144666)   Philip Reames via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LangRef] Require that vscale be a power of two (PR #145098)   Philip Reames via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   Philip Reames via llvm-commits
• [llvm] [LangRef] Require that vscale be a power of two (PR #145098)   Philip Reames via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   Philip Reames via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Phoebe Wang via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Phoebe Wang via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Phoebe Wang via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Phoebe Wang via llvm-commits
• [llvm] Fixed a bug in `-fsanitize-kcfi-arity` (PR #142867)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Alderlake and later hybrid processors (PR #144662)   Phoebe Wang via llvm-commits
• [llvm] Fixed a bug in `-fsanitize-kcfi-arity` (PR #142867)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Alderlake and later hybrid processors (PR #144662)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Arrowlake and later hybrid processors (PR #144833)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Arrowlake and later hybrid processors (PR #144833)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Arrowlake and later hybrid processors (PR #144833)   Phoebe Wang via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Phoebe Wang via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Phoebe Wang via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Phoebe Wang via llvm-commits
• [llvm] [X86] Truncate i64 add to i32 when upper 33 bits are zeros (PR #144066)   Phoebe Wang via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Phoebe Wang via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Handle all 32/64 bit pointer types for B32/B64 rule (PR #142560)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Handle all 32/64 bit pointer types for B32/B64 rule (PR #142560)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Handle all 32/64 bit pointer types for B32/B64 rule (PR #142560)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Handle all 32/64 bit pointer types for B32/B64 rule (PR #142560)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBanKSelect: Add S128 types (PR #142601)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBanKSelect: Add S128 types (PR #142601)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBanKSelect: Add S128 types (PR #142601)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128 (PR #142602)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128 (PR #142602)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128 (PR #142602)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128 (PR #142602)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT (PR #142603)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT (PR #142603)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT (PR #142603)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT (PR #142603)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT` and `G_INTTOPTR` (PR #142604)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT` and `G_INTTOPTR` (PR #142604)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT` and `G_INTTOPTR` (PR #142604)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT` and `G_INTTOPTR` (PR #142604)   Pierre van Houtryve via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Fix big-endian CRC tables (PR #144754)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Don't const-qualify Values in result (PR #144752)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)   Piyou Chen via llvm-commits
• [llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)   Piyou Chen via llvm-commits
• [llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)   Piyou Chen via llvm-commits
• [llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)   Piyou Chen via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] - Make offloading input data persist for deferred target tasks (PR #133499)   Pranav Bhandarkar via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] - Make offloading input data persist for deferred target tasks (PR #133499)   Pranav Bhandarkar via llvm-commits
• [llvm] [mlir] [OMPIRBuilder][debug] Don't drop debug info for loop constructs. (PR #144393)   Pranav Bhandarkar via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] add combiner rule for final packed op in reduction (PR #143943)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] add combiner rule for final packed op in reduction (PR #143943)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Made unnecessary comment (PR #144631)   Priyansh Rajiv Dhotar via llvm-commits
• [llvm] Made unnecessary comment (PR #144631)   Priyansh Rajiv Dhotar via llvm-commits
• [llvm] [mlir] Revert "[mlir][spirv] Fix int type declaration duplication when serializing" and follow up commits (PR #144773)   Quinn Dawkins via llvm-commits
• [llvm] [BOLT][NFCI] Simplify DataAggregator using traces (PR #143289)   Rafael Auler via llvm-commits
• [llvm] [BOLT][NFCI] Use FileSymbols for local symbol disambiguation (PR #89088)   Rafael Auler via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Encode and decode callsite offsets in a newly-introduced SHT_LLVM_BB_ADDR_MAP version. (PR #144426)   Rahman Lavaee via llvm-commits
• [llvm] [NFCI][TableGen][DecoderEmitter] Cull `TryDecode` handling when possible (PR #142974)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Use default member initializers. NFC. (PR #144349)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CodeGenInstruction (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CodeGenInstruction (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CodeGenInstruction (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CodeGenInstruction (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CodeGenInstruction (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CGIOperandList (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CGIOperandList (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][TableGen][DecoderEmitter] Cull `TryDecode` handling when possible (PR #142974)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Minor cleanup in CGIOperandList (PR #142721)   Rahul Joshi via llvm-commits
• [llvm] [NFCI][TableGen][DecoderEmitter] Cull `TryDecode` handling when possible (PR #142974)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use `StringRef` for CodeGenInstruction::AsmString (PR #144440)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use `StringRef` for CodeGenInstruction::AsmString (PR #144440)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Deprecate use of void casts to suppress warnings (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Deprecate use of void casts to suppress warnings (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Deprecate use of void casts to suppress warnings (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Deprecate use of void casts to suppress warnings (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Prefer ``[[maybe_unused]]`` over C-style void cast for unused variables (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen][DecoderEmitter] Use structured binding in range for loop (PR #144890)   Rahul Joshi via llvm-commits
• [clang] [llvm] [LLVM][Clang] Add and enable strict mode for `getTrailingObjects` (PR #144930)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen][DecoderEmitter] Use structured binding in range for loop (PR #144890)   Rahul Joshi via llvm-commits
• [clang] [llvm] [LLVM][Clang] Add and enable strict mode for `getTrailingObjects` (PR #144930)   Rahul Joshi via llvm-commits
• [clang] [llvm] [LLVM][Clang] Add and enable strict mode for `getTrailingObjects` (PR #144930)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Prefer ``[[maybe_unused]]`` over C-style void cast for unused variables (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Prefer ``[[maybe_unused]]`` over C-style void cast for unused variables (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Prefer ``[[maybe_unused]]`` over C-style void cast for unused variables (PR #142850)   Rahul Joshi via llvm-commits
• [clang] [llvm] [LLVM][Clang] Add and enable strict mode for `getTrailingObjects` (PR #144930)   Rahul Joshi via llvm-commits
• [clang] [llvm] [LLVM][Clang] Add and enable strict mode for `getTrailingObjects` (PR #144930)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Remove redundant control flow statements (NFC) (PR #145143)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Require``[[maybe_unused]]`` over C-style void cast for unused variables (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Require``[[maybe_unused]]`` over C-style void cast for unused variables in asserts (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Require``[[maybe_unused]]`` for unused variables in asserts (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Require``[[maybe_unused]]`` for unused variables in asserts (PR #142850)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use funcion table in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use function table in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use function table in decodeToMCInst (PR #144814)   Rahul Joshi via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add family-specific architectures support (PR #141899)   Rajat Bajpai via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [LV] Strip unnecessary make_{pair, optional} (NFC) (PR #141924)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Hexagon/LoopIdiom] Protect test against O2 changes (PR #144734)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix the analysis result (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix the analysis result (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Don't const-qualify Values in result (PR #144752)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix big-endian CRC tables (PR #144754)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Don't const-qualify Values in result (PR #144752)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix the analysis result (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix big-endian CRC tables (PR #144754)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Hoist setting condition for RT-checks (PR #128045)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Rewrite arePHIsIntertwined (PR #144878)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Check TC against bitwidth of LHSAux (PR #144881)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Refine return types in VPBuilder (NFC) (PR #108858)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Refine return types in VPBuilder (NFC) (PR #108858)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Extend FindLastIV to unsigned case (PR #141752)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Refine return types in VPBuilder (NFC) (PR #108858)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IndVars] Fix high-cost-expand check in LFTR (PR #125828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IndVars] Fix high-cost-expand check in LFTR (PR #125828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFC) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFC) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (NFC) (PR #137138)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (NFC) (PR #137138)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Refine return types in VPBuilder (NFC) (PR #108858)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Reuse IRBuilder with InsertPointGuard (NFC) (PR #141236)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Clean up APInt-overflow related code (NFC) (PR #140048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Clean up APInt-overflow related code (NFC) (PR #140048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Clean up APInt-overflow related code (NFC) (PR #140048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Move isPredicatedInst into LVLegality (PR #134261)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Move isPredicatedInst into LVLegality (PR #134261)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Move isPredicatedInst into LVLegality (NFC) (PR #134261)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Move isPredicatedInst into LVLegality (NFC) (PR #134261)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Move isPredicatedInst into LVLegality (NFC) (PR #134261)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VectorCombine] Scalarize extracts of ZExt if profitable. (PR #142976)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VectorCombine] Scalarize extracts of ZExt if profitable. (PR #142976)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VectorCombine] Scalarize extracts of ZExt if profitable. (PR #142976)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   Reid Kleckner via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   Reid Kleckner via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   Reid Kleckner via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   Reid Kleckner via llvm-commits
• [llvm] [MC] Use StringTable to reduce dynamic relocations (PR #144202)   Reid Kleckner via llvm-commits
• [llvm] [MC] Use StringTable to reduce dynamic relocations (PR #144202)   Reid Kleckner via llvm-commits
• [llvm] [ValueTracking] Remove opcode whitelist from matchSimpleRecurrence. (PR #144031)   Ricardo Jesus via llvm-commits
• [llvm] [ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (PR #144316)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (PR #144316)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Ricardo Jesus via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Robert Imschweiler via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Robert Imschweiler via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   Robert Imschweiler via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   Robert Imschweiler via llvm-commits
• [llvm] Revert "[GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements" (PR #144650)   Robert Imschweiler via llvm-commits
• [llvm] Revert "[GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements" (PR #144650)   Robert Imschweiler via llvm-commits
• [llvm] [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #133335)   Robert Imschweiler via llvm-commits
• [llvm] Reland: [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #144661)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [AArch64][SelectionDAG] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64][SelectionDAG] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64][SelectionDAG] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64][SelectionDAG] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)   Rodolfo Wottrich via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] A couple of grammar fixes (PR #144368)   Roman A via llvm-commits
• [llvm] [llvm-cov] Add FileID to MCDC records of the json code coverage export (PR #145236)   Roman Beliaev via llvm-commits
• [llvm] [Offload] Implement `olShutDown` and remove global reference counting (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` and remove global reference counting (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add `MAX_WORK_GROUP_SIZE` device info query (PR #143718)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add `MAX_WORK_GROUP_SIZE` device info query (PR #143718)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olGetKernelMaxGroupSize (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olLaunchKernelSuggestedGroupSize (PR #142130)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add olGetKernelMaxGroupSize (PR #142950)   Ross Brunton via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Ross Brunton via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Ross Brunton via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Ross Brunton via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add an `unloadBinary` interface to PluginInterface (PR #143873)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   Ross Brunton via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Ross Brunton via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Ross Brunton via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   Ross Brunton via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   Ross Brunton via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Ross Kirsling via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Ross Kirsling via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Ross Kirsling via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Ross Kirsling via llvm-commits
• [llvm] [llvm][yaml2obj] Modify section header overriding timing (PR #130942)   Ruoyu Qiu via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Enable it by default (PR #124911)   Ryotaro Kasuga via llvm-commits
• [llvm] [Passes] Remove LoopInterchange from O1 pipeline (PR #145071)   Ryotaro Kasuga via llvm-commits
• [llvm] [Passes] Remove LoopInterchange from O1 pipeline (PR #145071)   Ryotaro Kasuga via llvm-commits
• [llvm] [IR2Vec] Consider only reachable BBs and non-debug instructions (PR #143476)   S. VenkataKeerthy via llvm-commits
• [llvm] [IR2Vec] Consider only reachable BBs and non-debug instructions (PR #143476)   S. VenkataKeerthy via llvm-commits
• [llvm] [MLGO][IR2Vec] Integrating IR2Vec with MLInliner (PR #143479)   S. VenkataKeerthy via llvm-commits
• [llvm] [MLGO][IR2Vec] Integrating IR2Vec with MLInliner (PR #143479)   S. VenkataKeerthy via llvm-commits
• [llvm] [MLGO][IR2Vec] Integrating IR2Vec with MLInliner (PR #143479)   S. VenkataKeerthy via llvm-commits
• [clang] [llvm] Dump auto (c++11) type Inferences (Issue #17) (PR #144478)   SHRINIDHI I via llvm-commits
• [llvm] [llvm] annotate interfaces in Passes for DLL export (PR #143794)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] annotate interfaces in XRay for DLL export (PR #143765)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ObjectYAML for DLL export (PR #143763)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] include Compiler.h in a few headers where it was missed (PR #144464)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] include Compiler.h in a few headers where it was missed (PR #144464)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] re-order LLVM_ABI and extern on NoKernelInfoEndLTO decl (PR #144601)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] re-order LLVM_ABI and extern on NoKernelInfoEndLTO decl (PR #144601)   Saleem Abdulrasool via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   Saleem Abdulrasool via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   Saleem Abdulrasool via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] include GenericLoopInfoImpl for full implementation (PR #144621)   Saleem Abdulrasool via llvm-commits
• [clang] [lld] Use the Windows SDK arguments over the environment (PR #144805)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [ASan] Recognize WASI platform in sanitizer_platform.h (PR #139017)   Sam Clegg via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Sam Clegg via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Sam Clegg via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Sam Clegg via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [lld] [llvm] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   Sam Clegg via llvm-commits
• [clang] [llvm] [RISCV] Update Xqci to v0.13.0 (PR #144398)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Xqccmp v0.3 (PR #137854)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sam Elliott via llvm-commits
• [llvm] Hexagon v87 v89 elf flags (PR #144584)   Sam Elliott via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Save vector registers in interrupt handler. (PR #143808)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Don't prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (PR #144837)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   Sam Elliott via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   Sam Elliott via llvm-commits
• [llvm] [TargetParser][cmake] Be Smarter about TableGen Deps (PR #144848)   Sam Elliott via llvm-commits
• [llvm] [TargetParser][cmake] Be Smarter about TableGen Deps (PR #144848)   Sam Elliott via llvm-commits
• [llvm] [TargetParser][cmake] Be Smarter about TableGen Deps (PR #144848)   Sam Elliott via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add symbol parsing support for XAndesPerf branch instructions (PR #137748)   Sam Elliott via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Sam Elliott via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Sam Elliott via llvm-commits
• [llvm] [NFC][TableGen][DecoderEmitter] Use structured binding in range for loop (PR #144890)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Sam Elliott via llvm-commits
• [compiler-rt] [RISCV] Implement Feature Bit for Q (PR #145001)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Sam Elliott via llvm-commits
• [llvm] [TargetParser][cmake] Be Smarter about TableGen Deps (PR #144848)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Refactor Vendor Reloc Declarations (PR #138226)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Refactor Vendor Reloc Declarations (PR #138226)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Refactor Vendor Reloc Declarations (PR #138226)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   Sam Elliott via llvm-commits
• [llvm] [SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (PR #145120)   Sam Elliott via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (PR #145112)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Remove hasStdExtCOrZca (PR #145139)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove -mattr=+no-rvc-hints (PR #145138)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fix HasStdExtCOrZcfOrZce Syntax (PR #145141)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fix HasStdExtCOrZcfOrZce Syntax (PR #145141)   Sam Elliott via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Align bulk-memory thresholds (PR #134816)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Align bulk-memory thresholds (PR #134816)   Sam Parker via llvm-commits
• [llvm] [LV] Fix MVE regression from #132190 (PR #141736)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][SelectionDAG] Enable new partial reduction lowering by default (PR #143565)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Bundle partial reductions inside VPMulAccumulateReductionRecipe (PR #136173)   Sam Tebbs via llvm-commits
• [llvm] [VPlan] Add VPBundleRecipe, replacing extended reduction recipes. (PR #144281)   Sam Tebbs via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sam Tebbs via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sam Tebbs via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Optimize LDS DMA soft waitcnt (PR #138802)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] Fixed a bug in `-fsanitize-kcfi-arity` (PR #142867)   Sami Tolvanen via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (PR #143371)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Sander de Smalen via llvm-commits
• [llvm] [SLP] NFC: Simplify CandidateVFs initialization (PR #144882)   Sander de Smalen via llvm-commits
• [llvm] [SLP] NFC: Simplify CandidateVFs initialization (PR #144882)   Sander de Smalen via llvm-commits
• [llvm] [SLP] NFC: Simplify CandidateVFs initialization (PR #144882)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Use indexed dup for 128b segmented splat (PR #144688)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial reductions without a binary op (PR #133922)   Sander de Smalen via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Emit a version in the dx.rootsignatures metadata (PR #145113)   Sarah Spall via llvm-commits
• [llvm] Fixed a bug in `-fsanitize-kcfi-arity` (PR #142867)   Scott Constable via llvm-commits
• [llvm] [Object][AMDGPU] Support REL relocations (PR #143966)   Scott Linder via llvm-commits
• [llvm] [Object][AMDGPU] Support REL relocations (PR #143966)   Scott Linder via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   Scott Manley via llvm-commits
• [llvm] Fixed a bug in `-fsanitize-kcfi-arity` (PR #142867)   Sebastian Österlund via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   Sergei Barannikov via llvm-commits
• [llvm] [LSR] Make canHoistIVInc allow non-integer types (PR #143707)   Sergey Kachkov via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [vectorization] Change vectorized to custom coefficients in … (PR #138709)   Serval MARTINOT-LAGARDE via llvm-commits
• [llvm] [vectorization] More flexibility for VFxIC (PR #138709)   Serval MARTINOT-LAGARDE via llvm-commits
• [llvm] [vectorization] More flexibility for VFxIC (PR #138709)   Serval MARTINOT-LAGARDE via llvm-commits
• [llvm] [vectorization] More flexibility for VFxIC (PR #138709)   Serval MARTINOT-LAGARDE via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] Revert "[AMDGPU] Extended vector promotion to aggregate types." (PR #144366)   Shilei Tian via llvm-commits
• [llvm] Revert "[AMDGPU] Extended vector promotion to aggregate types." (PR #144366)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   Shilei Tian via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   Shilei Tian via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Shilei Tian via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [offload][SYCL] Add Module splitting by categories. (PR #131347)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #144626)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Shilei Tian via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Shilei Tian via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   Shilei Tian via llvm-commits
• [llvm] [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (PR #144911)   Shilei Tian via llvm-commits
• [llvm] [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (PR #144911)   Shilei Tian via llvm-commits
• [llvm] [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (PR #144911)   Shilei Tian via llvm-commits
• [llvm] [llvm] Remove an extraneous cast (NFC) (PR #144955)   Shilei Tian via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144941)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Shilei Tian via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Shilei Tian via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (PR #145048)   Shilei Tian via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Shilei Tian via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (PR #145048)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add another test showing unwanted VALU codegen (PR #145062)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Shilei Tian via llvm-commits
• [llvm] [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (PR #144911)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (PR #145130)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Shilei Tian via llvm-commits
• [llvm] [CodeGen] Remove extraneous casts to VariableID (NFC) (PR #145144)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (PR #145173)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for unsupported ds_ordered_count (PR #145172)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Shilei Tian via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_setprio_inc_wg gfx1250 instruction (PR #145152)   Shilei Tian via llvm-commits
• [llvm] Fix incorrect debug attribution for inlined allocas (PR #144345)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Shivam Kunwar via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (PR #141476)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (PR #144269)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (PR #141476)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL (PR #144338)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][RFC][X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL (PR #144338)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][RFC][X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL (PR #144338)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (PR #144342)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][RFC][X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL (PR #144338)   Simon Pilgrim via llvm-commits
• [llvm] 329dfa1 - [X86] fixup-blend.ll - add commuted load test coverage   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (PR #141476)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][RFC][X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL (PR #144338)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (PR #141476)   Simon Pilgrim via llvm-commits
• [llvm] 6f1b5ed - [X86] LowerCONCAT_VECTORS - pull out repeated SDLoc(). NFC.   Simon Pilgrim via llvm-commits
• [llvm] c564ebb - [X86] combineEXTRACT_SUBVECTOR - move AVX1 ANDNP comment and fold back together. NFC.   Simon Pilgrim via llvm-commits
• [llvm] 71f72f4 - [DAG] Move foldMaskedMerge before visitAND. NFC.   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineLogicBlendIntoConditionalNegate - convert to SDPatternMatch matching. NFC. (PR #144536)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchLogicBlend - convert to SDPatternMatch matching. NFC. (PR #144546)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineLogicBlendIntoConditionalNegate - convert to SDPatternMatch matching. NFC. (PR #144536)   Simon Pilgrim via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchLogicBlend - convert to SDPatternMatch matching. NFC. (PR #144546)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (PR #142734)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] 896e187 - [X86] combineAndMaskToShift - pull out repeated SDLoc(). NFC.   Simon Pilgrim via llvm-commits
• [llvm] dac94f2 - [X86] combineAndNotOrIntoAndNotAnd - pull out repeated SDLoc(). NFC.   Simon Pilgrim via llvm-commits
• [llvm] 0875bee - [X86] combineAndNotIntoANDNP - pull out repeated SDLoc(). NFC.   Simon Pilgrim via llvm-commits
• [llvm] 44b7152 - [PhaseOrdering][X86] Copy FMUL+ADDSUB/FMADDSUB build vector patterns from codegen tests   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (PR #144342)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][RISCV] Preserve nneg flag when folding (trunc (zext X))->(zext X). (PR #144807)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine][NFC] Pre-commit tests for #125935 (PR #144111)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine][NFC] Pre-commit tests for #125935 (PR #144111)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Simon Pilgrim via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] a5fa5bd - [X86] ptest.ll - add test coverage for #144861 load chains   Simon Pilgrim via llvm-commits
• [llvm] 4ec6d12 - [X86] movmsk-cmp.ll - regenerate VPTERNLOG asm comments   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (PR #145036)   Simon Pilgrim via llvm-commits
• [llvm] 225768d - [X86] combineConcatVectorOps - add tests showing v4i64 shift-by-32 with unnecessary concatenation   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (PR #145043)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (PR #145036)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Pull extract through broadcast (PR #143380)   Simon Pilgrim via llvm-commits
• [llvm] c734377 - [DAG] foldMaskedMerge - fix Wparentheses operator precedence warning. NFC.   Simon Pilgrim via llvm-commits
• [llvm] 151ee0f - [X86] SimplifyDemandedVectorEltsForTargetNode - ensure X86ISD::VPERMILPV node use v2f64/v4f32 types   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (PR #145043)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (PR #145043)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - directly fold to X86ISD::SUBV_BROADCAST_LOAD to prevent vector split infinite loop (PR #145077)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   Simon Pilgrim via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   Sirish Pande via llvm-commits
• [llvm] [LoopInterchange] Enable it by default (PR #124911)   Sjoerd Meijer via llvm-commits
• [llvm] [VPlan] Add ReductionStartVector VPInstruction. (PR #142290)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Enable it by default (PR #124911)   Sjoerd Meijer via llvm-commits
• [llvm] [Passes] Remove LoopInterchange from O1 pipeline (PR #145071)   Sjoerd Meijer via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   Slava Zakharin via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   Slava Zakharin via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   Slava Zakharin via llvm-commits
• [llvm] [InstCombine] Optimize sub(sext(add(x, y)), sext(add(x, z))). (PR #144174)   Slava Zakharin via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   Slava Zakharin via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   Slava Zakharin via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   Slava Zakharin via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   Slava Zakharin via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Slava Zakharin via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Slava Zakharin via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Slava Zakharin via llvm-commits
• [llvm] [llvm] Lower latency bonus threshold in function specialization. (PR #143954)   Slava Zakharin via llvm-commits
• [llvm] [InstCombine] Optimize sub(sext(add(x, y)), sext(add(x, z))). (PR #144174)   Slava Zakharin via llvm-commits
• [llvm] [InstCombine] Optimize sub(sext(add(x, y)), sext(add(x, z))). (PR #144174)   Slava Zakharin via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   Slava Zakharin via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   Slava Zakharin via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   Snehasish Kumar via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   Snehasish Kumar via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   Snehasish Kumar via llvm-commits
• [llvm] [AMDGPU] Replace tablegen field is_gfx940_xdl with is_sgemm. NFC. (PR #143865)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (PR #144574)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (PR #144574)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (PR #144574)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (PR #144574)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Add baseline tests for VGPR MFMA rewriting pass (PR #145023)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 SOPP MC tests. NFC. (PR #145082)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 SOPP MC tests. NFC. (PR #145082)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 SOPP MC tests. NFC. (PR #145082)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (PR #145084)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (PR #145084)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (PR #145084)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add s_wait_xcnt gfx1250 instruction (PR #145086)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add s_wait_xcnt gfx1250 instruction (PR #145086)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add s_wait_xcnt gfx1250 instruction (PR #145086)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] gfx1250 SOPP MC tests. NFC. (PR #145082)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (PR #145084)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_setprio_inc_wg gfx1250 instruction (PR #145152)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_setprio_inc_wg gfx1250 instruction (PR #145152)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_setprio_inc_wg gfx1250 instruction (PR #145152)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_setprio_inc_wg gfx1250 instruction (PR #145152)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_setprio_inc_wg gfx1250 instruction (PR #145152)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [examples] Fix invalid #ifndef LLVM_*_LINK_INTO_TOOLS (PR #144340)   Stefan Gränitz via llvm-commits
• [llvm] [examples] Fix invalid #ifndef LLVM_*_LINK_INTO_TOOLS (PR #144340)   Stefan Gränitz via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Stephen Senran Zhang via llvm-commits
• [libcxxabi] [llvm] Fix C++ demangling for _BitInt type (PR #143466)   Stephen Senran Zhang via llvm-commits
• [llvm] [SystemZ] Treat FAKE_USE instructions as instructions without a size (PR #144390)   Stephen Tozer via llvm-commits
• [llvm] [SelectionDAG] Enable softening of FAKE_USE float operands (PR #144392)   Stephen Tozer via llvm-commits
• [llvm] [SelectionDAG] Enable softening of FAKE_USE float operands (PR #144392)   Stephen Tozer via llvm-commits
• [llvm] [SelectionDAG] Enable softening of FAKE_USE float operands (PR #144392)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Stephen Tozer via llvm-commits
• [llvm] [SystemZ] Treat FAKE_USE instructions as instructions without a size (PR #144390)   Stephen Tozer via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   Stephen Tozer via llvm-commits
• [llvm] [DLCov] Origin-Tracking: Enable collecting and symbolizing stack traces (PR #143591)   Stephen Tozer via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Use hidden visibility for external linkage. (PR #140292)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Allow __spirv_SpecConstant in Vulkan shaders (PR #143543)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Fix LinkageAttribute emission for BuiltIn (PR #144701)   Steven Perron via llvm-commits
• [clang] [llvm] signed buffer (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPRIV] Handle signed RWBuffer correctly (PR #144774)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Handle GEP on i8 with const offset in legalize ptr cast (PR #145045)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Handle GEP on i8 with const offset in legalize ptr cast (PR #145045)   Steven Perron via llvm-commits
• [llvm] [RISCV] Rename Relocation QC_E_JUMP_PLT to QC_E_CALL_PLT (PR #143998)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [RISCV] Update Xqci to v0.13.0 (PR #144398)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [RISCV] Xqccmp v0.3 (PR #137854)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Dont prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (PR #144837)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Don't prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (PR #144837)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Don't prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (PR #144837)   Sudharsan Veeravalli via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Tamir Duberstein via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Tamir Duberstein via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Tamir Duberstein via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   Tamir Duberstein via llvm-commits
• [clang] [flang] [llvm] Fix and reapply IR PGO support for Flang (PR #142892)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][AArch64] Always link compiler-rt to flang after libgcc (PR #144710)   Tarun Prabhu via llvm-commits
• [llvm] [llvm-lto2] Replace std::atomic_init with brace initiation. NFC (PR #143274)   Teresa Johnson via llvm-commits
• [clang] [llvm] Pass TargetMachine from from Clang to `BitcodeWriter`and `ThinLTOBitcodeWriter` pass for thin and fat LTO respectively. (PR #143692)   Teresa Johnson via llvm-commits
• [clang] [llvm] Pass TargetMachine from from Clang to `BitcodeWriter`and `ThinLTOBitcodeWriter` pass for thin and fat LTO respectively. (PR #143692)   Teresa Johnson via llvm-commits
• [clang] [llvm] Pass TargetMachine from from Clang to `BitcodeWriter`and `ThinLTOBitcodeWriter` pass for thin and fat LTO respectively. (PR #143692)   Teresa Johnson via llvm-commits
• [clang] [llvm] Pass TargetMachine from from Clang to `BitcodeWriter`and `ThinLTOBitcodeWriter` pass for thin and fat LTO respectively. (PR #143692)   Teresa Johnson via llvm-commits
• [clang] [llvm] Pass TargetMachine from from Clang to `BitcodeWriter`and `ThinLTOBitcodeWriter` pass for thin and fat LTO respectively. (PR #143692)   Teresa Johnson via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Teresa Johnson via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up devirt (PR #143468)   Teresa Johnson via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Teresa Johnson via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Teresa Johnson via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Teresa Johnson via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Teresa Johnson via llvm-commits
• [llvm] [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (PR #144287)   Teresa Johnson via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Teresa Johnson via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Teresa Johnson via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Teresa Johnson via llvm-commits
• [llvm] [TRE] Adjust function entry count when using instrumented profiles (PR #143987)   Teresa Johnson via llvm-commits
• [llvm] [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (PR #144911)   Teresa Johnson via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   Thomas Lively via llvm-commits
• [llvm] [InstCombine] Fold rotate patterns with ZExt/Trunc at different Points (PR #142578)   Thomas Saller via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   Thurston Dang via llvm-commits
• [compiler-rt] TSan: Support relaxed accesses and fences (PR #142579)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [llvm] [msan] Add off-by-default flag to fix false negatives from partially undefined constant fixed-length vectors (PR #143837)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   Thurston Dang via llvm-commits
• [compiler-rt] [TSan] Clarify and enforce shadow end alignment (PR #144648)   Thurston Dang via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Tianle Liu via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Tianle Liu via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Tianle Liu via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Tianle Liu via llvm-commits
• [llvm] [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (PR #143468)   Tianle Liu via llvm-commits
• [llvm] [AArch64] Add Cortex-A320 scheduling model (PR #144385)   Ties Stuij via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144293)   Tim Gymnich via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Tim Gymnich via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   Tim Gymnich via llvm-commits
• [llvm] [ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (PR #144316)   Tim Gymnich via llvm-commits
• [llvm] [llvm][GISel] Use computeKnownFPClass (PR #141484)   Tim Gymnich via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor allocatePreloadKernArgSGPRs (PR #139753)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU: Remove AMDGPUInstrInfo class (PR #144984)   Tim Gymnich via llvm-commits
• [lld] [lld] Use llvm::partition_point (NFC) (PR #145209)   Tim Gymnich via llvm-commits
• [llvm] [Instrumentation] Drop "const" from a return type (NFC) (PR #145208)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error on ds ordered intrinsics (PR #145202)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   Tim Gymnich via llvm-commits
• [llvm] [LTO] Fix System library path in LTO tests on macOS (PR #144203)   Tobias Hieta via llvm-commits
• [llvm] [AsmPrinter] Fix crash when remarks section is unsupported (PR #144724)   Tobias Stadler via llvm-commits
• [llvm] [Remarks] Auto-detect remark parser format (PR #144554)   Tobias Stadler via llvm-commits
• [llvm] [AsmPrinter] Fix crash when remarks section is unsupported (PR #144724)   Tobias Stadler via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Tobias Stadler via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Tobias Stadler via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   Tobias Stadler via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Tobias Stadler via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Tobias Stadler via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   Tobias Stadler via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   Tom Stellard via llvm-commits
• [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)   Tom Stellard via llvm-commits
• [llvm] [PowerPC] Fix handling of undefs in the PPC::isSplatShuffleMask query (PR #145149)   Tom Stellard via llvm-commits
• [clang] [llvm] Non constant size and offset in DWARF (PR #141106)   Tom Tromey via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Adapt getPostIndexedAddressParts() and getPreIndexedAddressParts (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AVR] Fix incorrect selection of post indexed addresses (PR #145040)   Tom Vijlbrief via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] improve zero-cycle regmov test (PR #143680)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)   Tomer Shafir via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns - part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns - part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns for v4i32 type- part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns for v4i32 type- part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns of v4i32 operands- part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns of v4i32 operands- part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Exploit xxeval instruction for ternary patterns of v4i32 operands- part 1 (PR #141733)   Tony Varghese via llvm-commits
• [llvm] [SystemZ] Treat FAKE_USE instructions as instructions without a size (PR #144390)   Ulrich Weigand via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   Umang Yadav via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   Umang Yadav via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   Umang Yadav via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Target for DLL export (PR #143615)   Vassil Vassilev via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Vassil Vassilev via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   Vassil Vassilev via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   Vassil Vassilev via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   Vigneshwar Jayakumar via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Vitaly Buka via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   Vitaly Buka via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Vitaly Buka via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Vitaly Buka via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   Vitaly Buka via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   Vitaly Buka via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   Vitaly Buka via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Vitaly Buka via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   Vitaly Buka via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   Vitaly Buka via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   Vitaly Buka via llvm-commits
• [compiler-rt] Augment `uncaught-exception.test` fuzzer test to be msvc-compatible (PR #125924)   Vitaly Buka via llvm-commits
• [compiler-rt] Augment `uncaught-exception.test` fuzzer test to be msvc-compatible (PR #125924)   Vitaly Buka via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Vitaly Buka via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Vitaly Buka via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   Vitaly Buka via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   Vitaly Buka via llvm-commits
• [llvm] [msan] Add off-by-default flag to fix false negatives from partially undefined constant fixed-length vectors (PR #143837)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   Vitaly Buka via llvm-commits
• [clang] [llvm] [DebugInfo] Place local ODR-uniqued types in decl DISubprograms (PR #142166)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Place local ODR-uniqued types in decl DISubprograms (PR #142166)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [BOLT] [PowerPC] Port (PR #140894)   Vladislav Khmelevsky via llvm-commits
• [llvm] [PowerPC] Fix handling of undefs in the PPC::isSplatShuffleMask query (PR #145149)   Wael Yehia via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Wei Xiao via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [LLVM][Coro] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [Transforms] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [Transforms] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [Transforms] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [clang] [llvm] [Transforms] Add LifetimeMovePass (PR #144319)   Weibo He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Wenju He via llvm-commits
• [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Wenju He via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Wenju He via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Wenju He via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Wenju He via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Wenju He via llvm-commits
• [clang] [llvm] [ValueTracking] Return true for AddrSpaceCast in canCreateUndefOrPoison (PR #144686)   Wenju He via llvm-commits
• [llvm] [RS4GC] Fix some test comments that got clobbered (PR #145186)   Wren [Undefined] via llvm-commits
• [llvm] [DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (PR #141476)   Xu Zhang via llvm-commits
• [clang] [llvm] Dump auto (c++11) type Inferences (Issue #17) (PR #144478)   Yanzuo Liu via llvm-commits
• [clang] [llvm] Dump auto (c++11) type Inferences (Issue #17) (PR #144478)   Yanzuo Liu via llvm-commits
• [clang] [llvm] Dump auto (c++11) type Inferences (Issue #17) (PR #144478)   Yanzuo Liu via llvm-commits
• [llvm] Issue #32 solution (PR #144834)   Yanzuo Liu via llvm-commits
• [llvm] Enumerate all passes being invoked in each optimization level with comprehensive script code to generate the comparison report between optimization level O2 and O3. (PR #144921)   Yanzuo Liu via llvm-commits
• [clang-tools-extra] [llvm] [clang-tools-extra] Add clang-omp-pr-desc wrapper for OpenMP PR summarization (PR #144935)   Yanzuo Liu via llvm-commits
• [clang] [llvm] Add function scope identifier (PR #145074)   Yanzuo Liu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Yaxun Liu via llvm-commits
• [clang] [llvm] [Clang][Driver] Add jobserver support for --offload-jobs (PR #145131)   Yaxun Liu via llvm-commits
• [llvm] [InstCombine] Fold `select(load, val) + store` into `llvm.masked.store` (PR #144298)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine][Docs] Update InstCombine contributor guide (PR #144228)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Yingwei Zheng via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Bail out when reading padding of type (PR #144330)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Bail out when reading padding of type (PR #144330)   Yingwei Zheng via llvm-commits
• [llvm] [SCCP] Simplify [us]cmp(X, Y) into X - Y (PR #144717)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Preserve trunc nuw/nsw in VPRecipeWithIRFlags (PR #144700)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Updated early exit in `CanRedirectPredsOfEmptyBBToSucc` (PR #142582)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Optimize sub(sext(add(x, y)), sext(add(x, z))). (PR #144174)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Don't folder select to or if value argument is user of invalid addrspacecast inst (PR #144686)   Yingwei Zheng via llvm-commits
• [llvm] [SCCP] Simplify [us]cmp(X, Y) into X - Y (PR #144717)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine interleaved PHI reduction chains. (PR #143878)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Extend bitmask mul combine to handle independent operands (PR #142503)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Remove unnecessary EdgeUsesOnly set (NFC) (PR #144912)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Cache ssa.copy declarations (NFC) (PR #145020)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Cache ssa.copy declarations (NFC) (PR #145020)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Don't use depth first walk (NFCI) (PR #145016)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Don't use depth first walk (NFCI) (PR #145016)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Don't store Def in ValueDFS (NFC) (PR #145022)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Don't use depth first walk (NFCI) (PR #145016)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Yingwei Zheng via llvm-commits
• [llvm] [PredicateInfo] Don't store Def in ValueDFS (NFC) (PR #145022)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   Yingwei Zheng via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Yonah Goldberg via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Yonah Goldberg via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Yonah Goldberg via llvm-commits
• [llvm] Add Dead Block Elimination to NVVMReflect (PR #144171)   Yonah Goldberg via llvm-commits
• [compiler-rt] [ASan] Recognize WASI platform in sanitizer_platform.h (PR #139017)   Yuta Saito via llvm-commits
• [compiler-rt] [ASan] Recognize WASI as a platform with 64-bit off_t (PR #144441)   Yuta Saito via llvm-commits
• [compiler-rt] [ASan][cmake] Exclude .so build when building for WASI by default (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Add option to control shared library builds (PR #139042)   Yuta Saito via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Zhaoxin Yang via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Zhaoxin Yang via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Zhaoxin Yang via llvm-commits
• [lld] [lld][LoongArch] Support TLSDESC GD/LD to IE/LE (PR #123715)   Zhaoxin Yang via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Ádám Kallai via llvm-commits
• [llvm] [GlobalISel] Create a common register_vector_matchinfo (PR #144306)   via llvm-commits
• [llvm] 222ab28 - [aarch64] Fix Arm64EC libcall lowering after recent refactoring. (#143977)   via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   via llvm-commits
• [llvm] [GlobalISel] Widen vector loads from aligned ptrs (PR #144309)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (PR #142563)   via llvm-commits
• [llvm] 4e0dd00 - [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp slt X, 0 (#142593) (#143846)   via llvm-commits
• [llvm] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp slt X, 0 (#142593) (PR #143846)   via llvm-commits
• [llvm] fbade95 - [LV] Strip unnecessary make_{pair, optional} (NFC) (#141924)   via llvm-commits
• [llvm] cca454b - [ValueTracking] Remove opcode whitelist from matchSimpleRecurrence. (#144031)   via llvm-commits
• [lld] [LLD][ELF][RISCV][Zicfilp][Zicfiss] Support `-z <zicfilp-unlabeled|zicfilp-func-sig|zicfiss>-report-dynamic=<none|warning|error>` options (PR #144304)   via llvm-commits
• [llvm] DAG: Check libcall function is supported before emission (PR #144314)   via llvm-commits
• [llvm] [SimplifyCFG] Updated early exit in `CanRedirectPredsOfEmptyBBToSucc` (PR #142582)   via llvm-commits
• [llvm] [ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (PR #144316)   via llvm-commits
• [llvm] 383b326 - [llvm-debuginfo-analyzer] Fix ODR violation in llvm::logicalview::LVObject (#140265)   via llvm-commits
• [llvm] [AArch64][SVE] Move incorrectly placed assert (PR #144318)   via llvm-commits
• [llvm] [AArch64][SVE] Move incorrectly placed assert (PR #144318)   via llvm-commits
• [llvm] f12dd8f - [ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (#144316)   via llvm-commits
• [llvm] 3dd61c1 - [LV] Fix MVE regression from #132190 (#141736)   via llvm-commits
• [llvm] a75e062 - [LV] Use vscale for tuning when updating profile information (#143690)   via llvm-commits
• [llvm] [Offload] Implement `olShutDown` (PR #144055)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion Product) extension (PR #144320)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion Product) extension (PR #144320)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion Product) extension (PR #144320)   via llvm-commits
• [llvm] b2bf017 - [X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)   via llvm-commits
• [clang] [llvm] [clang] [OpenMP] New OpenMP 6.0 self_maps clause - CodeGen (PR #134131)   via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   via llvm-commits
• [llvm] 299a55a - [InstCombine][Docs] Update InstCombine contributor guide (#144228)   via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] [ConstantFolding] Bail out when reading padding of type (PR #144330)   via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   via llvm-commits
• [llvm] AArch64: Fix hardcoding calling convention of sincos_stret (PR #144336)   via llvm-commits
• [llvm] [WIP][RFC][X86] Remove MOVSS/D -> BLENDPS/D conversions from DAG/ISEL (PR #144338)   via llvm-commits
• [llvm] [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (PR #144342)   via llvm-commits
• [llvm] [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (PR #144342)   via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   via llvm-commits
• [llvm] [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (PR #144343)   via llvm-commits
• [llvm] [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (PR #144342)   via llvm-commits
• [llvm] [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (PR #144342)   via llvm-commits
• [llvm] Fix incorrect debug attribution for inlined allocas (PR #144345)   via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   via llvm-commits
• [llvm] [BOLT] Ensure remember and restore CFIs are in the same list (PR #144348)   via llvm-commits
• [llvm] [BOLT] Ensure remember and restore CFIs are in the same list (PR #144348)   via llvm-commits
• [llvm] [TableGen] Use default member initializers. NFC. (PR #144349)   via llvm-commits
• [llvm] [BOLT] Ensure remember and restore CFIs are in the same list (PR #144348)   via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   via llvm-commits
• [llvm] [AMDGPU] Add GFX12 wave register names with WAVE_ prefix (PR #144352)   via llvm-commits
• [llvm] [AMDGPU] Add GFX12 wave register names with WAVE_ prefix (PR #144352)   via llvm-commits
• [llvm] [InstCombine] Pull extract through broadcast (PR #143380)   via llvm-commits
• [llvm] AArch64: Add arm64ec libcall tests for __arm_sc_* functions (PR #144356)   via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #142637)   via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   via llvm-commits
• [llvm] a54712c - [LSR] Make canHoistIVInc allow non-integer types (#143707)   via llvm-commits
• [llvm] [AMDGPU] Remove EXP_POS_ACCESS, EXP_PARAM_ACCESS. NFC. (PR #144361)   via llvm-commits
• [llvm] 39ad315 - [TableGen] Use default member initializers. NFC. (#144349)   via llvm-commits
• [llvm] [AArch64] Report icmp as free if it can be folded into ands (PR #143286)   via llvm-commits
• [llvm] [BOLT] [PowerPC] Port (PR #140894)   via llvm-commits
• [compiler-rt] [scudo] Add `__scudo_get_info` symbol to export stats to a buffer. (PR #130273)   via llvm-commits
• [compiler-rt] [scudo] Add `__scudo_get_info` symbol to export stats to a buffer. (PR #130273)   via llvm-commits
• [compiler-rt] [scudo] Add `__scudo_get_info` symbol to export stats to a buffer. (PR #130273)   via llvm-commits
• [compiler-rt] [scudo] Add `__scudo_get_info` symbol to export stats to a buffer. (PR #130273)   via llvm-commits
• [compiler-rt] [scudo] Add `__scudo_get_info` symbol to export stats to a buffer. (PR #130273)   via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   via llvm-commits
• [llvm] [ValueTracking] Range of cmp intrinsics are -1, 0, and 1 (PR #144365)   via llvm-commits
• [llvm] [ValueTracking] Range of cmp intrinsics are -1, 0, and 1 (PR #144365)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] 7c25db3 - [DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (#141476)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] [ValueTracking] Range of cmp intrinsics are -1, 0, and 1 (PR #144365)   via llvm-commits
• [llvm] [ValueTracking] Range of cmp intrinsics are -1, 0, and 1 (PR #144365)   via llvm-commits
• [llvm] Revert "[AMDGPU] Extended vector promotion to aggregate types." (PR #144366)   via llvm-commits
• [llvm] Revert "[AMDGPU] Extended vector promotion to aggregate types." (PR #144366)   via llvm-commits
• [llvm] f2734aa - [InstCombine] fold icmp with add/sub instructions having the same operands (#143241)   via llvm-commits
• [llvm] 4692f0d - Revert "[AMDGPU] Extended vector promotion to aggregate types." (#144366)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] A couple of grammar fixes (PR #144368)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] [Matrix] Hoist IRBuilder<> out of Visit* functions. NFC (PR #144369)   via llvm-commits
• [llvm] [Offload] Check for initialization (PR #144370)   via llvm-commits
• [llvm] 4045970 - [OMPIRBuilder] - Make offloading input data persist for deferred target tasks (#133499)   via llvm-commits
• [llvm] [InstCombine] Pull extract through broadcast (PR #143380)   via llvm-commits
• [llvm] [SPIRV] Add FloatControl2 capability (PR #144371)   via llvm-commits
• [llvm] [SYCL] Add libsycl, a SYCL RT library implementation project (PR #144372)   via llvm-commits
• [llvm] [SimplifyCFG] Updated early exit in `CanRedirectPredsOfEmptyBBToSucc` (PR #142582)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] AArch64: Move outline atomic libcalls configuration (PR #144374)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] a5f0525 - [AArch64][SelectionDAG] Enable new partial reduction lowering by default (#143565)   via llvm-commits
• [llvm] [InstCombine] Pull extract through broadcast (PR #143380)   via llvm-commits
• [llvm] llvm-tli-checker: Remove TLINameList helper struct (PR #142535)   via llvm-commits
• [llvm] fc6aac7 - [DirectX] Fix bug where Flatten arrays was only using last index (#144146)   via llvm-commits
• [llvm] Annotate potentially unused variables introduced in #133499 (PR #144379)   via llvm-commits
• [llvm] 711f6a8 - [llvm][DebugInfo] Encode DW_AT_object_pointer on method declarations with DW_FORM_implicit_const (#124790)   via llvm-commits
• [llvm] 05cd32a - [llvm] Remove unused includes (NFC) (#144293)   via llvm-commits
• [llvm] ec32d88 - Annotate potentially unused variables introduced in #133499 (#144379)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [llvm] PowerPC: Add baseline tests for more f128 libcall handling (PR #144381)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   via llvm-commits
• [llvm] 25dcd23 - [IPO] Added attributor for identifying invariant loads (#141800)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [clang] [libc] [llvm] [DebugInfo][RemoveDIs] Suppress getNextNonDebugInfoInstruction (PR #144383)   via llvm-commits
• [llvm] [AArch64] Add Cortex-A320 scheduling model (PR #144385)   via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   via llvm-commits
• [llvm] [RFC][BPF] Support Jump Table (PR #133856)   via llvm-commits
• [llvm] [AArch64] Add ISel for postindex ld1/st1 in big-endian (PR #144387)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   via llvm-commits
• [llvm] 8bbef3d - [InstCombine] Iterative replacement in PtrReplacer (#137215)   via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (PR #144389)   via llvm-commits
• [llvm] [SystemZ] Treat FAKE_USE instructions as instructions without a size (PR #144390)   via llvm-commits
• [llvm] [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (PR #144391)   via llvm-commits
• [llvm] [SelectionDAG] Enable softening of FAKE_USE float operands (PR #144392)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder][debug] Don't drop debug info for loop constructs. (PR #144393)   via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] a733c6c - [TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (#144007)   via llvm-commits
• [llvm] c62a613 - Revert "[InstCombine] Iterative replacement in PtrReplacer" (#144394)   via llvm-commits
• [llvm] Revert "[InstCombine] Iterative replacement in PtrReplacer" (PR #144394)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] 6f9cd79 - [InstSimplify] Add basic simplifications for vp.reverse (#144112)   via llvm-commits
• [llvm] [LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (PR #144395)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [clang] [llvm] [RISCV] Update Xqci to v0.13.0 (PR #144398)   via llvm-commits
• [llvm] 90d62e0 - [RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Reduce size of `LVProperties` where possible (PR #144399)   via llvm-commits
• [llvm] [NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (PR #144106)   via llvm-commits
• [llvm] [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (PR #144401)   via llvm-commits
• [clang] [llvm] Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (PR #144402)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] [SCEV] Better preserve wrapping info in SimplifyICmpOperands for UGE. (PR #144404)   via llvm-commits
• [llvm] [SCEV] Better preserve wrapping info in SimplifyICmpOperands for UGE. (PR #144404)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] [PowerPC] Fix ppc-reduce-cr-ops mishandling of subregister uses (PR #144405)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] ffc4d87 - [llvm] annotate interfaces in Passes for DLL export (#143794)   via llvm-commits
• [llvm] febb7e8 - [llvm] annotate interfaces in XRay for DLL export (#143765)   via llvm-commits
• [llvm] 492d25b - [llvm] annotate interfaces in llvm/ObjectYAML for DLL export (#143763)   via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   via llvm-commits
• [clang] [llvm] [llvm] minor fixes for clang-cl Windows DLL build (PR #144386)   via llvm-commits
• [llvm] [SystemZ] Treat FAKE_USE instructions as instructions without a size (PR #144390)   via llvm-commits
• [llvm] [CodeGenPrepare] Filter out unrecreatable addresses from memory optimization (PR #143566)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] 3f79475 - [build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (#144391)   via llvm-commits
• [llvm] a3d35b8 - [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)   via llvm-commits
• [llvm] 0058272 - [NFC] Remove unused test code from ELFObjectFileTest.cpp   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] 8ed43c4 - [Matrix] Hoist IRBuilder<> out of Visit* functions. NFC (#144369)   via llvm-commits
• [llvm] [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (PR #143963)   via llvm-commits
• [llvm] 63b80dd - [NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (#144106)   via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] f83d09a - Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (#144402)   via llvm-commits
• [llvm] [AArch64] Check for negative numbers when adjusting icmps (PR #141151)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] e836223 - [Object][AMDGPU] Support REL relocations (#143966)   via llvm-commits
• [llvm] Revert "[llvm] annotate interfaces in llvm/Option and llvm/Remarks for DLL export (#142856) (PR #144412)   via llvm-commits
• [llvm] a0662ce - [objcopy][MachO] Revert special handling of encryptable binaries (#144058)   via llvm-commits
• [llvm] Revert "[llvm] annotate interfaces in llvm/Option and llvm/Remarks for DLL export (#142856) (PR #144412)   via llvm-commits
• [llvm] Fix references to required libraries when building LLVM with ASAN and MultiThreaded[Debug] on Windows (PR #139657)   via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144415)   via llvm-commits
• [llvm] [AMDGPU] Convert vector 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   via llvm-commits
• [llvm] [AMDGPU] Convert vector 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   via llvm-commits
• [llvm] 2578122 - [instcombine] Delete dead transform for reverse of binop (#143967)   via llvm-commits
• [llvm] [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (PR #144423)   via llvm-commits
• [llvm] b0378e7 - [AArch64TargetParser]Fix reconstructFromParsedFeatures ignoring negative features (#142236)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] a383b1a - Reland "[HLSL][RootSignature] Implement serialization of RootConstants and RootFlags" (#143019)   via llvm-commits
• [compiler-rt] [ASan] Recognize WASI as a platform with 64-bit off_t (PR #144441)   via llvm-commits
• [llvm] [SimplifyCFG] Emit SelectInst when folding branches to common dest with different PHI incoming values (PR #144434)   via llvm-commits
• [compiler-rt] [ASan] Recognize WASI as a platform with 64-bit off_t (PR #144441)   via llvm-commits
• [llvm] [objcopy][MachO] Revert special handling of encryptable binaries (PR #144058)   via llvm-commits
• [llvm] 99e53cb - [llvm][StackProtector] Add noreturn to __stack_chk_fail call (#143976)   via llvm-commits
• [llvm] [llvm][StackProtector] Add noreturn to __stack_chk_fail call (PR #143976)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] 1ffd9f5 - RuntimeLibcalls: Cleanup sincos predicate functions (#143081)   via llvm-commits
• [llvm] 9bd234a - AArch64: Move outline atomic libcalls configuration (#144374)   via llvm-commits
• [llvm] 24631e5 - AArch64: Fix outline atomic libcall names for arm64ec (#144378)   via llvm-commits
• [llvm] 6e8cf9c - AArch64: Add arm64ec libcall tests for __arm_sc_* functions (#144356)   via llvm-commits
• [llvm] [LLVM][TableGen] Use `StringRef` for CodeGenInstruction::AsmString (PR #144440)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [AMDGPU] Re-apply: Implement vop3p complex pattern optmization for gisel (PR #136262)   via llvm-commits
• [llvm] [Docs] Fix running-a-pass-with-opt in doc (PR #79273)   via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   via llvm-commits
• [llvm] LowerTypeTests: Use jump table entry type as value type of jump table alias. (PR #144462)   via llvm-commits
• [llvm] [RISCV] Lower VP_SELECT constant false to use vmerge.vxm/vmerge.vim (PR #144461)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [Support] Set SuffixIdx and ConcatLen during node insertion (PR #144467)   via llvm-commits
• [llvm] [Support] Set SuffixIdx and ConcatLen during node insertion (PR #144467)   via llvm-commits
• [llvm] [Support] Set SuffixIdx and ConcatLen during node insertion (PR #144467)   via llvm-commits
• [llvm] 84d879d - [RISCV] Rename Relocation QC_E_JUMP_PLT to QC_E_CALL_PLT (#143998)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] 80b79ce - [ConstantFolding] Handle reading from type padding (#144330)   via llvm-commits
• [llvm] bb70023 - [MemoryLocation][DSE] Allow other read effects in MemoryLocation::getForDest() (#144343)   via llvm-commits
• [llvm] 632151f - InstCombine: improve optimizations for ceiling division with no overflow (#142869)   via llvm-commits
• [llvm] cb355de - [Flang][OpenMP] Add Parsing support for Indirect Clause (#143505)   via llvm-commits
• [llvm] 437945b - [AArch64][SVE] Move incorrectly placed assert (#144318)   via llvm-commits
• [llvm] 2c90ebf - [OMPIRBuilder][debug] Don't drop debug info for loop constructs. (#144393)   via llvm-commits
• [llvm] e5ad7f4 - [RISCV] Move RISCVIndirectBranchTracking before Branch Relaxation (#139993)   via llvm-commits
• [llvm] 277b2b6 - [X86] combineCastedMaskArithmetic - convert to SDPatternMatch matching. NFC. (#144472)   via llvm-commits
• [llvm] 00709c3 - AArch64: Fix hardcoding calling convention of sincos_stret (NFC) (#144336)   via llvm-commits
• [llvm] c377ce1 - [AArch64][VecLib] Add libmvec support for AArch64 targets (#143696)   via llvm-commits
• [llvm] 465e3ce - [LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)   via llvm-commits
• [llvm] d3f13a0 - [GVN] MemorySSA for GVN: embed the memory state in symbolic expressions (#123218)   via llvm-commits
• [llvm] 990d254 - [X86] isAddSubOrSubAdd - convert to SDPatternMatch matching. NFC. (#144486)   via llvm-commits
• [llvm] 9700930 - [X86] detectZextAbsDiff - convert to SDPatternMatch matching. NFC. (#144498)   via llvm-commits
• [llvm] 087d83e - [SLP] vectorizeStores: Name things a bit more clearly (NFC) (#144511)   via llvm-commits
• [llvm] b91936a - AMDGPU: Combine nnan fminimum/fmaximum to fminnum_ieee/fmaxnum_ieee (#142217)   via llvm-commits
• [llvm] b4e39e4 - [LLVM] [Support] Query the terminal width using `ioctl()` (#143514)   via llvm-commits
• [llvm] 816ab1a - [NFCI][TableGen][DecoderEmitter] Cull Op handling when possible (#142974)   via llvm-commits
• [llvm] dc72b91 - [AArch64] Report icmp as free if it can be folded into ands (#143286)   via llvm-commits
• [llvm] 414710c - [SLP] Fix isCommutative to check uses of the original instruction instead of the converted instruction. (#143094)   via llvm-commits
• [lld] 35f6d91 - [lld] check cache in loadDylib before real_path (#143595)   via llvm-commits
• [llvm] 8f79754 - [SCEV] Better preserve wrapping info in SimplifyICmpOperands for UGE. (#144404)   via llvm-commits
• [llvm] 0fb198e - [X86] Remove combineShuffleOfConcatUndef fold (#144524)   via llvm-commits
• [llvm] [PowerPC][AIX] Specify pointer info and alignment for stack store (PR #144526)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] [Offload] Add type information to device info nodes (PR #144535)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] [X86] combineLogicBlendIntoConditionalNegate - convert to SDPatternMatch matching. NFC. (PR #144536)   via llvm-commits
• [llvm] 9eb0020 - [DebugInfo][RemoveDIs] Remove a swathe of debug-intrinsic code (#144389)   via llvm-commits
• [llvm] [AArch64] Use dupq (SVE2.1) for segmented lane splats (PR #144482)   via llvm-commits
• [llvm] [RISCV] Add patterns for generating QC_CTO and QC_CLO (PR #144532)   via llvm-commits
• [clang] [llvm] Dump auto (c++11) type Inferences (Issue #17) (PR #144478)   via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for v_lshl_add_u64 pattern. NFC. (PR #144544)   via llvm-commits
• [llvm] JITLink: Add initial SystemZ Support. (PR #144528)   via llvm-commits
• [llvm] c9a87a5 - [SLPVectorizer] Use accurate cost for external users of resize shuffles (#137419)   via llvm-commits
• [llvm] [BPF] Do not allow gotol in the middle of asm insn (PR #144545)   via llvm-commits
• [llvm] [BPF] Do not allow gotol in the middle of asm insn (PR #144545)   via llvm-commits
• [llvm] 02b78ff - [llvm] include Compiler.h in a few headers where it was missed (#144464)   via llvm-commits
• [llvm] 1410e69 - [SPIRV] Allow __spirv_SpecConstant in Vulkan shaders (#143543)   via llvm-commits
• [llvm] c80282d - AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (#141903)   via llvm-commits
• [llvm] [X86] matchLogicBlend - convert to SDPatternMatch matching. NFC. (PR #144546)   via llvm-commits
• [lld] 72fb8ae - [lld][test][PAC] Do not rely on concrete offsets in LTO tests (#143358)   via llvm-commits
• [llvm] [nfc][jt] Drop `std::optional` pointers (PR #144548)   via llvm-commits
• [clang] [lld] [llvm] Conditionalize use of POSIX features missing on WASI/WebAssembly (PR #92677)   via llvm-commits
• [clang] [lld] [llvm] Conditionalize use of POSIX features missing on WASI/WebAssembly (PR #92677)   via llvm-commits
• [llvm] a5f5f12 - [AMDGPU] Use subtarget feature for v_lshl_add_u64 pattern. NFC. (#144544)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] Check Affine AR only. (PR #144550)   via llvm-commits
• [llvm] 00139f1 - [NVPTX] Cleanup ld/st lowering (#143936)   via llvm-commits
• [llvm] [ORC] Fix synchronization in CoreAPIsTest. (PR #144556)   via llvm-commits
• [llvm] 65d590e - [X86] combineLogicBlendIntoConditionalNegate - convert to SDPatternMatch matching. NFC. (#144536)   via llvm-commits
• [llvm] [BPF] Do not allow gotol in the middle of asm insn (PR #144545)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] 0c60817 - [X86] matchLogicBlend - convert to SDPatternMatch matching. NFC. (#144546)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [BPF] Do not allow gotol in the middle of asm insn (PR #144545)   via llvm-commits
• [llvm] 5baf351 - [BPF] Do not allow gotol in the middle of asm insn (#144545)   via llvm-commits
• [llvm] [BPF] Do not allow gotol in the middle of asm insn (PR #144545)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (PR #144565)   via llvm-commits
• [llvm] Reapply "[CI] Migrate to runtimes build" (#143612) (PR #144033)   via llvm-commits
• [llvm] Reapply "[CI] Migrate to runtimes build" (#143612) (PR #144033)   via llvm-commits
• [llvm] 01a7a21 - [CMake] Add BINARY_DIR argument for add_lit_testsuites (#144431)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [llvm] 526310e - [Remarks] Elaborate on called intrinsics (#143985)   via llvm-commits
• [llvm] [RISCV] Consolidate both copies of getLMUL1VT [nfc] (PR #144568)   via llvm-commits
• [llvm] Reapply "[CI] Migrate to runtimes build" (#143612) (PR #144033)   via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   via llvm-commits
• [llvm] 9dd1c66 - [VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (#118638)   via llvm-commits
• [llvm] 9e0186d - [HLSL][RootSignature] Implement `ResourceRange` as an `IntervalMap` (#140957)   via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [compiler-rt] 3a06e9a - Conditionalise the addition of Aarch64 function Multi versioning support on aarch64 target (#143749)   via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (PR #144571)   via llvm-commits
• [llvm] [AMDGPU] Fix getAsmVOP3Base call agruments. (PR #144572)   via llvm-commits
• [llvm] [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (PR #144574)   via llvm-commits
• [llvm] e29bb9a - [IR2Vec] Consider only reachable BBs and non-debug instructions (#143476)   via llvm-commits
• [compiler-rt] Revert "lsan: Support free_sized and free_aligned_sized from C23" (PR #144575)   via llvm-commits
• [compiler-rt] Revert "lsan: Support free_sized and free_aligned_sized from C23" (PR #144575)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [llvm] 2ab9c35 - [DXContainer] Update DXContainer to match D3D12 spec (#143201)   via llvm-commits
• [llvm] [DXContainer] Update DXContainer to match D3D12 spec (PR #143201)   via llvm-commits
• [llvm] JITLink: Add initial SystemZ Support. (PR #144528)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   via llvm-commits
• [lldb] [llvm] [NFC] Separate high-level-dependent portions of DWARFExpression (revised) (PR #143170)   via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [compiler-rt] Revert "lsan: Support free_sized and free_aligned_sized from C23" (PR #144575)   via llvm-commits
• [llvm] bb288de - [LoopPeel] Support last iteration peeling of min/max intrinsics (#143598)   via llvm-commits
• [llvm] [RFC][BPF] Support Jump Table (PR #133856)   via llvm-commits
• [compiler-rt] 80f3a28 - Revert "lsan: Support free_sized and free_aligned_sized from C23" (#144575)   via llvm-commits
• [llvm] [RFC][BPF] Support Jump Table (PR #133856)   via llvm-commits
• [llvm] 391dafd - [RISCV] Consolidate both copies of getLMUL1VT [nfc] (#144568)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [RFC][BPF] Support Jump Table (PR #133856)   via llvm-commits
• [llvm] b59d4cf - [Reland] Adjust bit cast instruction filter for DXIL Prepare pass (#143783)   via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocs path (PR #144578)   via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   via llvm-commits
• [llvm] [NVPTX] fold movs into loads and stores (PR #144581)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   via llvm-commits
• [llvm] Hexagon v87 v89 elf flags (PR #144584)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] JITLink: Add initial SystemZ Support. (PR #144528)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] 19658d1 - [llvm] annotate interfaces in llvm/Target for DLL export (#143615)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] 7b7b5a3 - [AMDGPU] Remove AsmVOP3OpSel field completely. NFCI. (#144574)   via llvm-commits
• [llvm] 8dcf4ba - [AMDGPU] Fix getAsmVOP3Base call agruments. (#144572)   via llvm-commits
• [llvm] [LLVM] [Support] Disable `ioctl()` terminal size check on Solaris (PR #144600)   via llvm-commits
• [llvm] [LLVM] [Support] Disable `ioctl()` terminal size check on Solaris (PR #144600)   via llvm-commits
• [llvm] 9ae4d2e - [LLVM] [Support] Disable `ioctl()` terminal size check on Solaris (#144600)   via llvm-commits
• [llvm] [LLVM] [Support] Disable `ioctl()` terminal size check on Solaris (PR #144600)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] [LLVM] [Support] Query the terminal width using the termios API (PR #143514)   via llvm-commits
• [llvm] [libc++] Add Docker images to support incoming pre-merge CI transition (PR #144597)   via llvm-commits
• [llvm] 908f74a - [llvm] re-order LLVM_ABI and extern on NoKernelInfoEndLTO decl (#144601)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [compiler-rt] lsan: Support free_sized and free_aligned_sized from C23 (PR #144604)   via llvm-commits
• [llvm] [llvm] remove incorrect `LLVM_ABI` annotation usage (PR #144606)   via llvm-commits
• [llvm] [InstCombine] Canonicalize (a + 1 == 0) ? -1 : a + 1 -> uadd.sat(a, 1) (PR #144566)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] Reapply "[CI] Migrate to runtimes build" (#143612) (PR #144033)   via llvm-commits
• [llvm] [LangRef] Cap maximum value of vscale at 2^31-1. (PR #144607)   via llvm-commits
• [clang] [llvm] [WIP][llvm] Flag to forcibly outline fixed point mul/div intrinsics (PR #144612)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] [FlattenCFG] Fixup Phi nodes during CFG flattening (PR #143766)   via llvm-commits
• [llvm] 1cd18bc - AMDGPU: Add cost model tests for minimumnum/maximumnum (#141904)   via llvm-commits
• [llvm] 87b13ad - [HLSL][RootSignature] Implement serialization of remaining Root Elements (#143198)   via llvm-commits
• [llvm] c9b2816 - AMDGPU: Fix cost model for 16-bit operations on gfx8 (#141943)   via llvm-commits
• [llvm] 3800a83 - AMDGPU: Reduce cost of f64 copysign (#141944)   via llvm-commits
• [llvm] bec9ac2 - [llvm] Lower latency bonus threshold in function specialization. (#143954)   via llvm-commits
• [llvm] af65cb6 - AMDGPU: Move fpenvIEEEMode into TTI (#141945)   via llvm-commits
• [llvm] 54015f3 - AMDGPU: Cost model for minimumnum/maximumnum (#141946)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   via llvm-commits
• [llvm] f08474a - AMDGPU: Add baseline cost model tests for special argument intrinsics (#141947)   via llvm-commits
• [llvm] f3af1cd - [RISCV] Set the exact flag on the SRL created for converting vscale to a read of vlenb. (#144571)   via llvm-commits
• [llvm] a981134 - AMDGPU: Report special input intrinsics as free (#141948)   via llvm-commits
• [llvm] 628274d - [NFC] Extract Printing portions of DWARFCFIProgram to new files (#143762)   via llvm-commits
• [llvm] [NFC] Extract Printing portions of DWARFCFIProgram to new files (PR #143762)   via llvm-commits
• [llvm] c21a4c6 - [Xtensa] Implement Xtensa Interrupt/Exception/Debug Options. (#143820)   via llvm-commits
• [llvm] 15482c8 - [ElimAvailExtern] Add an option to allow to convert global variables in a specified address space to local (#144287)   via llvm-commits
• [llvm] llvm-c: Introduce 'LLVMDISubprogramReplaceType' (PR #143461)   via llvm-commits
• [llvm] llvm-c: Introduce 'LLVMDISubprogramReplaceType' (PR #143461)   via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   via llvm-commits
• [llvm] 64155a3 - Added clarifying comment to 'LLVMLinkInMCJIT' and 'LLVMLinkInInterpreter' (#92467)   via llvm-commits
• [llvm] Added clarifying comment to 'LLVMLinkInMCJIT' and 'LLVMLinkInInterpreter' (PR #92467)   via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   via llvm-commits
• [llvm] abbdd16 - [llvm] minor fixes for clang-cl Windows DLL build (#144386)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [compiler-rt] [scudo] Make report pointers const. (PR #144624)   via llvm-commits
• [llvm] 0defde8 - [AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users (#141758)   via llvm-commits
• [llvm] 9265b1f - LowerTypeTests: Use jump table entry type as value type of jump table alias.   via llvm-commits
• [llvm] 8ddada4 - [RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension (#144320)   via llvm-commits
• [llvm] [AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (PR #142563)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [AMDGPU] Re-apply: Implement vop3p complex pattern optmization for gisel (PR #136262)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] llvm-c: Introduce 'LLVMDISubprogramReplaceType' (PR #143461)   via llvm-commits
• [llvm] CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING in reentrancy situa… (PR #144331)   via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #144626)   via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   via llvm-commits
• [llvm] a2ad656 - [RISCV] Add patterns for generating QC_CTO and QC_CLO (#144532)   via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   via llvm-commits
• [llvm] [llvm] include GenericLoopInfoImpl for full implementation (PR #144621)   via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   via llvm-commits
• [compiler-rt] [asan] Fix `unknown-crash` reported for multi-byte errors (PR #144480)   via llvm-commits
• [llvm] Made unnecessary comment (PR #144631)   via llvm-commits
• [llvm] Made unnecessary comment (PR #144631)   via llvm-commits
• [llvm] AArch64: Replace AArch64MCExpr with MCSpecifierExpr (PR #144632)   via llvm-commits
• [llvm] af49a65 - PowerPC: Add baseline tests for more f128 libcall handling (#144381)   via llvm-commits
• [llvm] 7b9d10d - PowerPC: Fix using long double libm functions for f128 intrinsics (#144382)   via llvm-commits
• [llvm] ad9e591 - [SelectionDAG][RISCV] Fold (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (#144565)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [compiler-rt] [scudo] Make report pointers const. (PR #144624)   via llvm-commits
• [flang] [llvm] [mlir] [WIP] Implement workdistribute construct (PR #140523)   via llvm-commits
• [llvm] [GlobalOpt] Use cast instead of dyn_cast. NFC (PR #144634)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Non-contiguous strided update (PR #144635)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Non-contiguous strided update (PR #144635)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] [Orc] Fix error handling in `ORCPlatformSupport::initialize` (PR #144637)   via llvm-commits
• [llvm] [GlobalOpt] Preven widenDestArray from shrinking an alloca. (PR #144641)   via llvm-commits
• [llvm] [Orc] Fix error handling in `ORCPlatformSupport::initialize` (PR #144637)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)   via llvm-commits
• [llvm] [VPlan] Format some print forms.NFC (PR #144644)   via llvm-commits
• [llvm] [VPlan] Format some print forms.NFC (PR #144644)   via llvm-commits
• [compiler-rt] 10f29a6 - [MSan] Fix wrong unpoison size in SignalAction (#144071)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] 4d71f20 - [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (#133335)   via llvm-commits
• [compiler-rt] [TSan] Make Shadow/Meta region inclusive-exclusive (PR #144647)   via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] e07b1b2 - [DAG] Implement SDPatternMatch `m_Abs()` matcher (#144512)   via llvm-commits
• [llvm] a38932a - Revert "[GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements" (#144650)   via llvm-commits
• [llvm] Revert "[GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements" (PR #144650)   via llvm-commits
• [llvm] ba40a7b - [LoopVectorize] Vectorize fixed-order recurrence with vscale x 1. (#142772)   via llvm-commits
• [llvm] ca29c63 - [RISCV] Support non-power-of-2 types when expanding memcmp   via llvm-commits
• [llvm] 255b55c - [GlobalOpt] Use cast instead of dyn_cast. NFC (#144634)   via llvm-commits
• [llvm] [GlobalOpt] Revert global widening transform (PR #144652)   via llvm-commits
• [llvm] 7ea7ccd - [PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)   via llvm-commits
• [llvm] 355725a - [TSan] Fix missing inst cleanup (#144067)   via llvm-commits
• [llvm] [vectorization] More flexibility for VFxIC (PR #138709)   via llvm-commits
• [llvm] [VPlan] Add ReductionStartVector VPInstruction. (PR #142290)   via llvm-commits
• [llvm] 757a0e6 - [SystemZ] Treat FAKE_USE instructions as instructions without a size (#144390)   via llvm-commits
• [llvm] Reland: [GlobalISel] prevent G_UNMERGE_VALUES for vectors with different elements (PR #144661)   via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Alderlake and later hybrid processors (PR #144662)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] cd8248f - Fixed a bug in `-fsanitize-kcfi-arity` (#142867)   via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Reuse previously generated GlobalVariable for memset_pattern16 when possible (PR #144677)   via llvm-commits
• [llvm] d8e8ab7 - [AArch64][SME] Fix restoring callee-saves from FP with hazard padding (#143371)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (PR #144690)   via llvm-commits
• [llvm] [RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (PR #144702)   via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   via llvm-commits
• [llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)   via llvm-commits
• [llvm] [SCCP] Simplify [us]cmp(X, Y) into X - Y (PR #144717)   via llvm-commits
• [llvm] [SCCP] Simplify [us]cmp(X, Y) into X - Y (PR #144717)   via llvm-commits
• [llvm] [RemoveDIs] Resolve RemoveRedundantDbgInstrs fwd scan FIXME (PR #144718)   via llvm-commits
• [llvm] 36038a1 - [RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (#144702)   via llvm-commits
• [llvm] e4c3b03 - [InstCombine] Fold `tan(x) * cos(x) => sin(x)` (#136319)   via llvm-commits
• [llvm] b53c1e4 - [AArch64] Add ISel for postindex ld1/st1 in big-endian (#144387)   via llvm-commits
• [llvm] [AArch64] Consider StreamingSVE in shouldExpandGetActiveLaneMask (PR #144722)   via llvm-commits
• [llvm] [AsmPrinter] Fix crash when remarks section is unsupported (PR #144724)   via llvm-commits
• [llvm] ARM: Move ABI enum from TargetMachine to TargetParser (PR #144725)   via llvm-commits
• [llvm] [RISCV][NFC] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] 3af4d4e - [HLSL][SPIR-V] Fix LinkageAttribute emission for BuiltIn (#144701)   via llvm-commits
• [llvm] 8b8a369 - [AArch64] Use dupq (SVE2.1) for segmented lane splats (#144482)   via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   via llvm-commits
• [compiler-rt] sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (PR #144727)   via llvm-commits
• [llvm] 9da9d32 - [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (#144024)   via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] [RISCV] Update SpacemiT X60 scheduling latencies based on hardware measurements (PR #144730)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] [LV] Use vscale for tuning to improve branch weight estimates (PR #144733)   via llvm-commits
• [llvm] [LV] Use vscale for tuning to improve branch weight estimates (PR #144733)   via llvm-commits
• [llvm] [Hexagon/LoopIdiom] Protect test against O2 changes (PR #144734)   via llvm-commits
• [llvm] b5aaf9d - [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (#143963)   via llvm-commits
• [llvm] 0fa373c - [Matrix] Propagate shape information through PHI insts (#141681)   via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] Fix 50142 (PR #144741)   via llvm-commits
• [llvm] Fix 50142 (PR #144741)   via llvm-commits
• [llvm] Fix 50142 (PR #144741)   via llvm-commits
• [llvm] [HashRecognize] Fix the analysis result (PR #144742)   via llvm-commits
• [compiler-rt] a2cee05 - [scudo] Make report pointers const. (#144624)   via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   via llvm-commits
• [llvm] [ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (PR #144744)   via llvm-commits
• [llvm] 0018921 - [DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (#144342)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [AArch64] Lower jump table cases threshold to 10 (PR #143632)   via llvm-commits
• [llvm] [AArch64] Fix build failure with -Werror (PR #144749)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Remove `LVScope::Children` container (PR #144750)   via llvm-commits
• [llvm] [HashRecognize] Don't const-qualify Values in result (PR #144752)   via llvm-commits
• [llvm] [AArch64] Correctness fix: Turn cmn 0 into cmp 0 (PR #143965)   via llvm-commits
• [llvm] [SimplifyCFG] Updated early exit in `CanRedirectPredsOfEmptyBBToSucc` (PR #142582)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] 2a8c65e - [CodeGen][NFC] Fix quadratic c-t for large jump tables   via llvm-commits
• [llvm] Fix 50142 (PR #144741)   via llvm-commits
• [llvm] [HashRecognize] Fix big-endian CRC tables (PR #144754)   via llvm-commits
• [llvm] Fix 50142 (PR #144741)   via llvm-commits
• [llvm] 77bc254 - [AArch64] Fix build failure with -Werror (#144749)   via llvm-commits
• [llvm] llvm-c: Introduce 'LLVMDISubprogramReplaceType' (PR #143461)   via llvm-commits
• [llvm] [RISCV] Allow larger offset when matching build_vector as vid sequence (PR #144756)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [HashRecognize] Tighten pre-conditions for analysis (PR #144757)   via llvm-commits
• [compiler-rt] d9f7979 - sanitizer_common: add unsupported test for free_sized and free_aligned_sized from C23 (#144727)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] Revert "[VPlan] Remove unnecessary DomTreeUpdater flush (NFC)." (PR #144758)   via llvm-commits
• [llvm] [RISCV] Reduce the VL of both operands in VMERGE_VVM (PR #144759)   via llvm-commits
• [clang] [llvm] [SimplifyCFG] Emit SelectInst when folding branches to common dest with different PHI incoming values (PR #144434)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] 82acd8c - [PowerPC] Add code to spill and restore DMRp registers (#142443)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] 835d303 - [AArch64] improve zero-cycle regmov test (#143680)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Plug-in serialization and add full sample testcase (PR #144769)   via llvm-commits
• [llvm] dfe4d44 - Revert "[VPlan] Remove unnecessary DomTreeUpdater flush (NFC)." (#144758)   via llvm-commits
• [llvm] 071a6fe - [TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (#142310)   via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   via llvm-commits
• [clang] [flang] [llvm] [llvm] annotate remaining LLVM interfaces for DLL export (PR #144746)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] 3f3526f - [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll,loop-comment.ll etc (#144411)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [mlir] Revert "[mlir][spirv] Fix int type declaration duplication when serializing" and follow up commits (PR #144773)   via llvm-commits
• [lld] [llvm] [DTLTO][LLD][ELF] Add support for Integrated Distributed ThinLTO (PR #142757)   via llvm-commits
• [clang] [llvm] signed buffer (PR #144774)   via llvm-commits
• [clang] [llvm] signed buffer (PR #144774)   via llvm-commits
• [clang] [llvm] signed buffer (PR #144774)   via llvm-commits
• [clang] [llvm] signed buffer (PR #144774)   via llvm-commits
• [lld] [llvm] [DTLTO][LLD][ELF] Add support for Integrated Distributed ThinLTO (PR #142757)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [lld] [llvm] [DTLTO][LLD][ELF] Add support for Integrated Distributed ThinLTO (PR #142757)   via llvm-commits
• [llvm] [Offload] Rework compiling device code for unit test suites (PR #144776)   via llvm-commits
• [llvm] [llvm] build Blake3 source with LLVM_EXPORTS defined (PR #144753)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] keep src mod and clamp for v_s_xxx_f16 lowering (PR #144781)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] ab6beec - [llvm-cov] Export decision coverage to output json (#144335)   via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [AMDGPU][True16][Codegen] keep srcmod/clamp/omod for v_s_xxx_f16 when moved to VALU (PR #144781)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [AMDGPU] Allow dpp in v_pk_fmac_f16 for GFX9 and GFX10 (PR #144782)   via llvm-commits
• [llvm] Revert "[llvm-cov] Export decision coverage to output json" (PR #144783)   via llvm-commits
• [llvm] a94eb27 - [HashRecognize] Fix big-endian CRC tables (#144754)   via llvm-commits
• [llvm] f13b9e3 - [HashRecognize] Don't const-qualify Values in result (#144752)   via llvm-commits
• [llvm] d4b7c0d - [Remarks] Auto-detect remark parser format (#144554)   via llvm-commits
• [llvm] [RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (PR #144653)   via llvm-commits
• [compiler-rt] 22a69a2 - lsan: Support free_sized and free_aligned_sized from C23 (#144604)   via llvm-commits
• [llvm] [HashRecognize] Make it a non-PM analysis (PR #144742)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] a88e655 - [llvm] build Blake3 source with LLVM_EXPORTS defined (#144753)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] b85e929 - Hexagon v87 v89 elf flags (#144584)   via llvm-commits
• [llvm] [LV] Consider EVL legality for TTI tail folding preference (PR #144790)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #144792)   via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #144792)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #144792)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [LoopIdiom] Use HashRecognize to optimize CRC (PR #143208)   via llvm-commits
• [llvm] d10079e - [RISCV] Reduce the VL of both operands in VMERGE_VVM (#144759)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] c4d7ea8 - [llvm-debuginfo-analyzer] Apply various memory savings in Core/LVxxx base classes (#144399)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] bb1f5c3 - [AArch64] Lower jump table cases threshold to 10 (#143632)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (PR #142563)   via llvm-commits
• [llvm] [AMDGPU] Re-apply: Implement vop3p complex pattern optmization for gisel (PR #136262)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [compiler-rt] d265105 - Augment `uncaught-exception.test` fuzzer test to be msvc-compatible (#125924)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] bc8908a - ARM: Move declaration of supportSplitCSR to be public (#144679)   via llvm-commits
• [llvm] 874a02f - ARM: Move ABI helpers from Subtarget to TargetMachine (#144680)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [llvm] Allow folding icmp eq (add X, C2), C when there is more than one-use when we can compute the range (PR #144566)   via llvm-commits
• [compiler-rt] msan: Support free_sized and free_aligned_sized from C23 (PR #144529)   via llvm-commits
• [llvm] 6e5ee4a - [RISCV] Save vector registers in interrupt handler. (#143808)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [compiler-rt] lsan: fix macos build after #144604 (PR #144818)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] faf9295 - [RISCV] Fix a bug where AVL is the last MI in MBB. (#144668)   via llvm-commits
• [llvm] [RISCV] Fix a bug where AVL is the last MI in MBB. (PR #144668)   via llvm-commits
• [llvm] bfee625 - [NVPTX] Attach Range attr to setmaxnreg and fence intrinsics (#144120)   via llvm-commits
• [llvm] [AMDGPU] Fold fmed3 when inputs include infinity (PR #144824)   via llvm-commits
• [llvm] 5875faf - [X86] Remove CLDEMOTE from Alderlake and later hybrid processors (#144662)   via llvm-commits
• [llvm] [VPlan] Add ReductionStartVector VPInstruction. (PR #142290)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   via llvm-commits
• [llvm] [CVP] Remove Zero-Index GEP (PR #144831)   via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Arrowlake and later hybrid processors (PR #144833)   via llvm-commits
• [clang] [llvm] [X86] Remove CLDEMOTE from Arrowlake and later hybrid processors (PR #144833)   via llvm-commits
• [llvm] Issue #32 solution (PR #144834)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   via llvm-commits
• [llvm] [yaml2obj] Report error when the input filename does not exist (PR #144835)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] [RISCV] Don't prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (PR #144837)   via llvm-commits
• [llvm] AArch64: Use reportFatalUsageError for unsupported calling conv (PR #144840)   via llvm-commits
• [llvm] [InstCombine] Generate better code for `std::bit_floor` from libstdc++ (PR #144842)   via llvm-commits
• [llvm] [llvm] revisions to `LLVM_ABI` export macro definitions (PR #144598)   via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   via llvm-commits
• [llvm] [NFC][AMDGPU] print more info when debugging InsertWaitCnts pass (PR #144629)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] TargetLibraryInfo: Bring FreeBSD function list up to date (PR #144846)   via llvm-commits
• [llvm] TargetLibraryInfo: Bring FreeBSD function list up to date (PR #144846)   via llvm-commits
• [lld] [ELF, RISCV] Fix oscillation due to call relaxation (PR #142899)   via llvm-commits
• [llvm] [VPlan] Format some print forms.NFC (PR #144644)   via llvm-commits
• [llvm] 590066b - [NVPTX] Add family-specific architectures support (#141899)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [flang] [llvm] [mlir] [WIP] Implement workdistribute construct (PR #140523)   via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   via llvm-commits
• [compiler-rt] [llvm] [llvm-cov][gcov] Support multi-files coverage in one basic block (PR #144504)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] 408e550 - [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (#143660)   via llvm-commits
• [llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)   via llvm-commits
• [llvm] e73bff8 - [AMDGPU] New RegBankSelect: Handle all 32/64 bit pointer types for B32/B64 rule (#142560)   via llvm-commits
• [llvm] db8e6fc - [AMDGPU] New RegBanKSelect: Add S128 types (#142601)   via llvm-commits
• [llvm] 26d4b3c - [RISCV] Don't prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (#144837)   via llvm-commits
• [llvm] 7ceea22 - [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128 (#142602)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   via llvm-commits
• [llvm] 1ab0e7d - [LICM] Hoisting writeonly calls (#143799)   via llvm-commits
• [llvm] [LICM] Hoisting writeonly calls (PR #143799)   via llvm-commits
• [llvm] 0e1aab1 - [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT (#142603)   via llvm-commits
• [llvm] 62fe5e4 - [NFC][AMDGPU] print more info when debugging SIInsertWaitcnts pass (#144629)   via llvm-commits
• [llvm] 8f82c02 - [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT` and `G_INTTOPTR` (#142604)   via llvm-commits
• [compiler-rt] 681db06 - [TSan] Make Shadow/Meta region inclusive-exclusive (#144647)   via llvm-commits
• [llvm] [AMDGPU] Ignore inactive VGPRs in .vgpr_count (PR #144855)   via llvm-commits
• [clang] [llvm] [Transforms] Add LifetimeMovePass (PR #144319)   via llvm-commits
• [llvm] af51c9d - [LV][NFC] Add branch weight test showing incorrect behaviour (#144682)   via llvm-commits
• [llvm] 5bee2c3 - RuntimeLibcalls: Pass in FloatABI and EABI type (#144691)   via llvm-commits
• [llvm] 305953a - MC: Move ExceptionHandling enum to Support (#144692)   via llvm-commits
• [llvm] 1c35fe4 - RuntimeLibcalls: Pass in exception handling type (#144696)   via llvm-commits
• [llvm] [VPlan] Extract reverse interleave pointer adjustment into VPReverseInterleavePtrRecipe (PR #144864)   via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)   via llvm-commits
• [libc] [llvm] [libc] Improve memcpy for ARM Cortex-M supporting unaligned accesses. (PR #144872)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [clang] [llvm] Test 142948 (PR #144873)   via llvm-commits
• [clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)   via llvm-commits
• [clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)   via llvm-commits
• [clang] [llvm] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction Support (PR #144874)   via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   via llvm-commits
• [llvm] [HashRecognize] Rewrite arePHIsIntertwined (PR #144878)   via llvm-commits
• [llvm] [HashRecognize] Rewrite arePHIsIntertwined (PR #144878)   via llvm-commits
• [llvm] 74054ca - [HashRecognize] Make it a non-PM analysis (#144742)   via llvm-commits
• [llvm] [HashRecognize] Check TC against bitwidth of LHSAux (PR #144881)   via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS (PR #136718)   via llvm-commits
• [llvm] [llvm-exegesis] [AArch64] Add support for Load Instructions in subprocess execution mode (PR #144895)   via llvm-commits
• [llvm] [NFC][TableGen][DecoderEmitter] Use structured binding in range for loop (PR #144890)   via llvm-commits
• [llvm] [NVPTX][NFC] Rearrange the TMA-S2G intrinsics (PR #144903)   via llvm-commits
• [llvm] [NVPTX][NFC] Rearrange the TMA-S2G intrinsics (PR #144903)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fix UDOT regression (PR #144907)   via llvm-commits
• [llvm] 5eb24fd - [SelectionDAG][RISCV] Preserve nneg flag when folding (trunc (zext X))->(zext X). (#144807)   via llvm-commits
• [llvm] [LV] Use VPReductionRecipe for partial reductions (PR #144908)   via llvm-commits
• [llvm] 3de01d0 - Fix bazel build after #144594, mark variable as potentially unused (#144910)   via llvm-commits
• [llvm] [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (PR #144911)   via llvm-commits
• [llvm] [PredicateInfo] Remove unnecessary EdgeUsesOnly set (NFC) (PR #144912)   via llvm-commits
• [lld] [llvm] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [lld] [llvm] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   via llvm-commits
• [lld] [llvm] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] [Offload] Move (most) global state to an `OffloadContext` struct (PR #144494)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   via llvm-commits
• [llvm] [AArch64][CostModel] Lower cost of dupq (SVE2.1) (PR #144918)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] Enumerate all passes being invoked in each optimization level with comprehensive script code to generate the comparison report between optimization level O2 and O3. (PR #144921)   via llvm-commits
• [llvm] Enumerate all passes being invoked in each optimization level with comprehensive script code to generate the comparison report between optimization level O2 and O3. (PR #144921)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [LV] Vectorize selecting last IV of min/max element. (PR #141431)   via llvm-commits
• [llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)   via llvm-commits
• [lld] [llvm] [lld][WebAssembly] Add missing relocation types to the --compress-relocations path (PR #144578)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST test (PR #144928)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST test (PR #144928)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] [X86][GlobalIsel] G_BITCAST support (PR #144473)   via llvm-commits
• [llvm] c0c7146 - [InstCombine] Optimize sub(sext(add(x,y)),sext(add(x,z))). (#144174)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   via llvm-commits
• [llvm] [WebAssembly] Refactor PerformSETCCCombine (PR #144875)   via llvm-commits
• [llvm] 0b8179b - [ValueTracking] Improve `Bitcast` handling to match SDAG (#125935)   via llvm-commits
• [compiler-rt] f780955 - lsan: fix macos build after #144604 (#144818)   via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   via llvm-commits
• [llvm] [InstCombine] Pull unary shuffles through fneg/fabs (PR #144933)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tools-extra] Add clang-omp-pr-desc wrapper for OpenMP PR summarization (PR #144935)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tools-extra] Add clang-omp-pr-desc wrapper for OpenMP PR summarization (PR #144935)   via llvm-commits
• [llvm] [ADT] Remove an extraneous variable (NFC) (PR #144937)   via llvm-commits
• [llvm] [llvm] Use "= delete" to delete constructors (NFC) (PR #144938)   via llvm-commits
• [llvm] [llvm] Use "= delete" to delete constructors (NFC) (PR #144938)   via llvm-commits
• [llvm] [memprof] Use a lambda instead of std::bind (NFC) (PR #144940)   via llvm-commits
• [llvm] [llvm] Remove unused includes (NFC) (PR #144941)   via llvm-commits
• [llvm] 3bee9ba - AMDGPU/GFX12: Fix s_barrier_signal_isfirst for single-wave workgroups (#143634)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   via llvm-commits
• [llvm] [PredicateInfo] Clean up DFS sorting (NFC) (PR #144943)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] fix a predicate bug in VGPRImm with f16/bf16 (PR #144942)   via llvm-commits
• [compiler-rt] TSan: Support relaxed accesses and fences (PR #142579)   via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] IR/Verifier: Do not allow kernel to kernel calls. (PR #144445)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [LV] Introduce and use VPBuilder::createScalarZExtOrTrunc [nfc] (PR #144946)   via llvm-commits
• [clang] [llvm] Fix Windows EH IP2State tables (remove +1 bias) (PR #144745)   via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] 7349864 - [ADT] Remove an extraneous variable (NFC) (#144937)   via llvm-commits
• [llvm] 3b672e1 - [llvm] Use "= delete" to delete constructors (NFC) (#144938)   via llvm-commits
• [llvm] 03692aa - [memprof] Use a lambda instead of std::bind (NFC) (#144940)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [TLI] Add support for pvalloc() (PR #144949)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)   via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   via llvm-commits
• [llvm] [TTI] Plumb CostKind through getPartialReductionCost (PR #144953)   via llvm-commits
• [llvm] [llvm] Remove an extraneous cast (NFC) (PR #144955)   via llvm-commits
• [llvm] [llvm] Remove an extraneous cast (NFC) (PR #144955)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] 53ea522 - [LV] Introduce and use VPBuilder::createScalarZExtOrTrunc [nfc] (#144946)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NVPTX] Add NVPTXIncreaseAligmentPass to improve vectorization (PR #144958)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [NVPTX] Add NVPTXIncreaseAligmentPass to improve vectorization (PR #144958)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [DirectX] Don't limit visitGetElementPtrInst to global ptrs (PR #144959)   via llvm-commits
• [llvm] a8edda1 - [llvm] Remove unused includes (NFC) (#144941)   via llvm-commits
• [llvm] [BOLT][Linux] Fix linux_banner lookup (PR #144962)   via llvm-commits
• [llvm] dfb5cad - [SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232)   via llvm-commits
• [llvm] [SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (PR #143232)   via llvm-commits
• [llvm] b963701 - [TTI] Plumb CostKind through getPartialReductionCost (#144953)   via llvm-commits
• [llvm] [LV] Consider whether vscale is a known power of two for iteration check (PR #144963)   via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   via llvm-commits
• [clang] [llvm] [AMDGPU] Initial support for gfx1250 target. (PR #144965)   via llvm-commits
• [llvm] d8e6d74 - [LV] Consider EVL legality for TTI tail folding preference (#144790)   via llvm-commits
• [llvm] dad6487 - [llvm] Remove an extraneous cast (NFC) (#144955)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] 6001a8b - [WholeProgramDevirt] Add check for AvailableExternal and give up icall.branch.funnel (#143468)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] 9143981 - ARM: Avoid using isTarget wrappers around Triple predicates (#144705)   via llvm-commits
• [llvm] efd42b9 - WebAssembly: Stop directly using RuntimeLibcalls.def (#143054)   via llvm-commits
• [llvm] [AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (PR #142563)   via llvm-commits
• [llvm] [AMDGPU] Re-apply: Implement vop3p complex pattern optmization for gisel (PR #136262)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] fa76460 - [DirectX] Add Root Signature Version Support and Update Test IR Format (#144957)   via llvm-commits
• [llvm] [DirectX] Add Root Signature Version Support and Update Test IR Format (PR #144957)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] 5cbed34 - [X86] Remove CLDEMOTE from Arrowlake and later hybrid processors (#144833)   via llvm-commits
• [llvm] a05393a - [RISCV] Add symbol parsing support for XAndesPerf branch instructions (#137748)   via llvm-commits
• [llvm] [llvm] Migrate away from ArrayRef(std::nullopt) (NFC) (PR #144967)   via llvm-commits
• [llvm] 513bcf6 - [yaml2obj] Report error when the input filename does not exist   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)   via llvm-commits
• [lld] [LLD][SPARC] Implement enough functionality to run non-trivial 64-bit programs (PR #137919)   via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   via llvm-commits
• [llvm] [RISCV] Make All VType Parts Optional (PR #144971)   via llvm-commits
• [llvm] bb51c5d - [SDPatternMatch] Add m_Poison matcher (#144860)   via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   via llvm-commits
• [llvm] 64fe323 - [llvm] Migrate away from ArrayRef(std::nullopt) (NFC) (#144967)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] 6997465 - [AMDGPU] Initial support for gfx1250 target. (#144965)   via llvm-commits
• [llvm] AMDGPU: Remove AMDGPUInstrInfo class (PR #144984)   via llvm-commits
• [llvm] AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (PR #144985)   via llvm-commits
• [llvm] AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (PR #144986)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] [WIP][LoopIdiomVectorize] Recognize and transform minidx pattern (PR #144987)   via llvm-commits
• [llvm] [WIP][LoopIdiomVectorize] Recognize and transform minidx pattern (PR #144987)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   via llvm-commits
• [llvm] 06e08f3 - AArch64: Use reportFatalUsageError for unsupported calling conv (#144840)   via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   via llvm-commits
• [llvm] [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (PR #144988)   via llvm-commits
• [llvm] d196124 - [PredicateInfo] Remove unnecessary EdgeUsesOnly set (NFC) (#144912)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] 1cae21d - AMDGPU: Remove legacy PM version of AMDGPUPromoteAllocaToVector (#144986)   via llvm-commits
• [llvm] c361bff - AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (#144985)   via llvm-commits
• [compiler-rt] [TSan] Fix p == end == ShadowMem::end in ShadowSet (PR #144994)   via llvm-commits
• [llvm] [llvm-cov] Export decision coverage to output json (PR #144335)   via llvm-commits
• [llvm] bc14e5e - [AMDGPU] Add trivial gfx1250 runlines to MC tests. NFC. (#144988)   via llvm-commits
• [lld] [LLD][ELF] Include offset when adding Thunk symbols (PR #144995)   via llvm-commits
• [compiler-rt] TSan: Support relaxed accesses and fences (PR #142579)   via llvm-commits
• [compiler-rt] b6b8fa3 - [llvm-cov][gcov] Support multi-files coverage in one basic block (#144504)   via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_SpecificScalarVT` and `m_SpecificVectorElementVT` matchers (PR #144996)   via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_SpecificScalarVT` and `m_SpecificVectorElementVT` matchers (PR #144996)   via llvm-commits
• [llvm] [Mips][ASM] Optimize SW+ADDIU (PR #144997)   via llvm-commits
• [llvm] [Mips][ASM] Optimize SW+ADDIU (PR #144997)   via llvm-commits
• [llvm] [DAG] Implement SDPatternMatch `m_SpecificScalarVT` and `m_SpecificVectorElementVT` matchers (PR #144996)   via llvm-commits
• [llvm] [Mips][ASM] Optimize SW+ADDIU (PR #144997)   via llvm-commits
• [llvm] 8747736 - [SLP] NFC: Simplify CandidateVFs initialization (#144882)   via llvm-commits
• [llvm] f704782 - [AArch64][SelectionDAG] Fix UDOT regression (#144907)   via llvm-commits
• [lld] eb0f1dc - [LLD][ELF] Include offset when adding Thunk symbols (#144995)   via llvm-commits
• [llvm] 6197205 - [CodeGen] Limit number of analyzed predecessors   via llvm-commits
• [llvm] dd4776d - AMDGPU: Remove AMDGPUInstrInfo class (#144984)   via llvm-commits
• [llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)   via llvm-commits
• [llvm] [VPlan] Refine return types in VPBuilder (NFC) (PR #108858)   via llvm-commits
• [llvm] 68732ce - [LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (#143540)   via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   via llvm-commits
• [llvm] [PredicateInfo] Don't use depth first walk (NFCI) (PR #145016)   via llvm-commits
• [llvm] 3e99aa6 - [PredicateInfo] Clean up DFS sorting (NFC) (#144943)   via llvm-commits
• [llvm] [PredicateInfo] Cache ssa.copy declarations (NFC) (PR #145020)   via llvm-commits
• [llvm] [llvm-lto2] Replace std::atomic_init with brace initiation. NFC (PR #143274)   via llvm-commits
• [llvm] cbd4965 - [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (#145013)   via llvm-commits
• [llvm] [NFC][AMDGPU] Automate any_extend_vector_inreg.ll check line generation (PR #145013)   via llvm-commits
• [llvm] [PredicateInfo] Don't store Def in ValueDFS (NFC) (PR #145022)   via llvm-commits
• [llvm] AMDGPU: Add baseline tests for VGPR MFMA rewriting pass (PR #145023)   via llvm-commits
• [llvm] 1b83f10 - [AMDGPU] Fix to prevent sinking of PERMLANE_SWAP instruction (#144423)   via llvm-commits
• [llvm] [llvm-lto2] Replace std::atomic_init with brace initiation. NFC (PR #143274)   via llvm-commits
• [llvm] 5835f1e - [AsmPrinter] Fix crash when remarks section is unsupported (#144724)   via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   via llvm-commits
• [llvm] [AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (PR #144947)   via llvm-commits
• [llvm] fd97dfb - [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (#143204)   via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (PR #143017)   via llvm-commits
• [clang] [llvm] Ast importer visitors (PR #138838)   via llvm-commits
• [clang] [llvm] [WPD]: Apply speculative WPD in non-lto mode. (PR #145031)   via llvm-commits
• [clang] [llvm] [WPD]: Apply speculative WPD in non-lto mode. (PR #145031)   via llvm-commits
• [llvm] b334ffd - [VPlan] Refine return types in VPBuilder (NFC) (#108858)   via llvm-commits
• [llvm] c8c4bd1 - [LV] Stengthen loop-invariance checks in isPredicatedInst (#140744)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (PR #145036)   via llvm-commits
• [llvm] 152d4b8 - [AArch64] Use indexed dup for 128b segmented splat (#144688)   via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   via llvm-commits
• [lld] [llvm] [lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (PR #144082)   via llvm-commits
• [llvm] 376b714 - [NFC][TableGen][DecoderEmitter] Use structured binding in range for loop (#144890)   via llvm-commits
• [llvm] Fix SPIR-V function ordering violation in linker (PR #145039)   via llvm-commits
• [llvm] Fix SPIR-V function ordering violation in linker (PR #145039)   via llvm-commits
• [llvm] 3ff69c8 - [LV] Add early-exit-with-store tests (#140899)   via llvm-commits
• [compiler-rt] tsan: Support free_sized and free_aligned_sized from C23 (PR #144531)   via llvm-commits
• [llvm] 96ab74b - [InstCombine] remove undef loads, such as memcpy from undef (#143958)   via llvm-commits
• [llvm] [AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   via llvm-commits
• [llvm] [AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   via llvm-commits
• [llvm] [AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (PR #144421)   via llvm-commits
• [llvm] a2b8a93 - [VPlan] Pass NumUnrolledElems as operand to VPWidenPointerInductionRecipe. NFC (#119859)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (PR #145043)   via llvm-commits
• [llvm] 95c6c11 - [X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (#145036)   via llvm-commits
• [clang] [llvm] [win][x64] Unwind v2 3/n: Add support for requiring unwind v2 to be used (equivalent to MSVC's /d2epilogunwindrequirev2) (PR #143577)   via llvm-commits
• [llvm] [DirectX] add support for i64 buffer load/stores (PR #145047)   via llvm-commits
• [llvm] [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (PR #145048)   via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   via llvm-commits
• [llvm] 71e20c6 - Fix references to required libraries when building LLVM with ASAN and MultiThreaded[Debug] on Windows (#139657)   via llvm-commits
• [llvm] Fix references to required libraries when building LLVM with ASAN and MultiThreaded[Debug] on Windows (PR #139657)   via llvm-commits
• [llvm] [Delinearization] Add function for fixed size array without relying on GEP (PR #145050)   via llvm-commits
• [llvm] [mlir] [Utils][mlir] Fix interaction between CodeExtractor and OpenMPIRBuilder (PR #145051)   via llvm-commits
• [llvm] [mlir] [Utils][mlir] Fix interaction between CodeExtractor and OpenMPIRBuilder (PR #145051)   via llvm-commits
• [llvm] [LLVM][DecoderEmitter] Add option to use lambdas in decodeToMCInst (PR #144814)   via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   via llvm-commits
• [llvm] [InlineCost] Simplify extractvalue across callsite (PR #145054)   via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   via llvm-commits
• [clang] [llvm] [OptBisect][IR] Adding a new OptPassGate for disabling passes via name (PR #145059)   via llvm-commits
• [llvm] [InstCombine] fix hwasan mistake in "remove dead loads" (PR #145057)   via llvm-commits
• [llvm] 6e86b7e - [AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (#145048)   via llvm-commits
• [clang] [llvm] [LLVM][Clang] Add and enable strict mode for `getTrailingObjects` (PR #144930)   via llvm-commits
• [llvm] [BOLT][test] Update X86/perf2bolt-spe.test (PR #145061)   via llvm-commits
• [llvm] [AMDGPU] Add another test showing unwanted VALU codegen (PR #145062)   via llvm-commits
• [llvm] 72de0e4 - [TableGen][Docs] Fix empty list syntax in TableGen doc. (#145041)   via llvm-commits
• [compiler-rt] bfef873 - msan: Support free_sized and free_aligned_sized from C23 (#144529)   via llvm-commits
• [llvm] 940ff11 - [InstCombine] fix hwasan mistake in "remove dead loads" (#145057)   via llvm-commits
• [compiler-rt] [scudo] Add primary option to zero block on dealloc. (PR #142394)   via llvm-commits
• [llvm] edbaf19 - [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (#144968)   via llvm-commits
• [llvm] [SandboxVec][SeedCollector][NFC] Replace cl::opt flags with constructor args (PR #143206)   via llvm-commits
• [clang] [llvm] Add function scope identifier (PR #145074)   via llvm-commits
• [clang] [llvm] Add function scope identifier (PR #145074)   via llvm-commits
• [llvm] 6ddb3a6 - [AMDGPU] Add another test showing unwanted VALU codegen (#145062)   via llvm-commits
• [llvm] f8ee577 - [X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (#145043)   via llvm-commits
• [llvm] 33a92af - [msan] Add off-by-default flag to fix false negatives from partially undefined constant fixed-length vectors (#143837)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] 0d21c95 - [BPF] Handle nested wrapper structs in BPF map definition traversal (#144097)   via llvm-commits
• [llvm] [BPF] Handle nested wrapper structs in BPF map definition traversal (PR #144097)   via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - directly fold to X86ISD::SUBV_BROADCAST_LOAD to prevent vector split infinite loop (PR #145077)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [AMDGPU] Support merging 16-bit TBUFFER load/store instruction (PR #145078)   via llvm-commits
• [lldb] [llvm] [NFC][DebugInfo][DWARF] Create new low-level dwarf library (PR #145081)   via llvm-commits
• [lldb] [llvm] [NFC][DebugInfo][DWARF] Create new low-level dwarf library (PR #145081)   via llvm-commits
• [llvm] [InlineCost] Allow simplifying to non-Constant values (PR #145083)   via llvm-commits
• [llvm] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (PR #145084)   via llvm-commits
• [compiler-rt] rtsan: Support free_sized and free_aligned_sized from C23 (PR #145085)   via llvm-commits
• [llvm] ab8b8c1 - [TargetParser][cmake] Be Smarter about TableGen Deps (#144848)   via llvm-commits
• [clang] [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [AMDGPU] Add s_wait_xcnt gfx1250 instruction (PR #145086)   via llvm-commits
• [llvm] 3f42c6b - [DirectX] Scalarize `extractelement` and `insertelement` with dynamic indices (#141676)   via llvm-commits
• [llvm] [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (PR #145089)   via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] 8d2eea9 - [AMDGPU] gfx1250 SOPP MC tests. NFC. (#145082)   via llvm-commits
• [llvm] b5d5708 - [HLSL] Add descriptor table metadata parsing (#142492)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [HLSL] Add descriptor table metadata parsing (PR #142492)   via llvm-commits
• [llvm] [DirectX] Add static sampler support to root signature (PR #143422)   via llvm-commits
• [llvm] [DirectX] Add static sampler support to root signature (PR #143422)   via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   via llvm-commits
• [llvm] 958dc86 - [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (#145084)   via llvm-commits
• [llvm] [DirectX] Add static sampler support to root signature (PR #143422)   via llvm-commits
• [lldb] [llvm] [NFC][DebugInfo][DWARF] Create new low-level dwarf library (PR #145081)   via llvm-commits
• [llvm] 3a66e20 - [AMDGPU] Add gfx1250 runlines to vop3 dpp tests. NFC. (#145089)   via llvm-commits
• [llvm] [AMDGPU] Omit image waits in function prologue on gfx1250 (PR #145097)   via llvm-commits
• [llvm] [LangRef] Require that vscale be a power of two (PR #145098)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] [ObjCARC] Delete empty autoreleasepools with no autoreleases in them (PR #144788)   via llvm-commits
• [llvm] 3b9795b - [AArch64] Add CodeGen support for scalar FEAT_CPA (#105669)   via llvm-commits
• [llvm] [VPlan] Add VPInst::getNumOperandsForOpcode, use to verify in ctor (NFC) (PR #142284)   via llvm-commits
• [llvm] 0c2191b - [AMDGPU] Omit image waits in function prologue on gfx1250 (#145097)   via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   via llvm-commits
• [llvm] [InstCombine] Fold reconstruction across select (PR #145102)   via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   via llvm-commits
• [llvm] 5886f0a - [RISCV] Allow larger offset when matching build_vector as vid sequence (#144756)   via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   via llvm-commits
• [llvm] [InstCombine] isKnownNonNegative should recognize `b - a` after `a <= b` (PR #145105)   via llvm-commits
• [lld] [lld][BP] Print total size of startup symbols (PR #145106)   via llvm-commits
• [llvm] e6ee2c7 - [HLSL][RootSignature] Implement validation of resource ranges for `RootDescriptors` (#140962)   via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   via llvm-commits
• [compiler-rt] [llvm] [msan] Automatically print shadow for failing outlined checks (PR #145107)   via llvm-commits
• [clang] [llvm] [HLSL] Emit a version in the dx.rootsignatures metadata (PR #145113)   via llvm-commits
• [clang] [llvm] [HLSL] Emit a version in the dx.rootsignatures metadata (PR #145113)   via llvm-commits
• [llvm] be7e411 - [NFC] Add comment to describe the intention use of newly added `avail-extern-gv-in-addrspace-to-local` (#144911)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add `hlsl-rootsig-ver` option to specify root signature version (PR #144813)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] 6b9fe9e - [HLSL] Emit a version in the dx.rootsignatures metadata (#145113)   via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   via llvm-commits
• [llvm] [AMDGPU] Fixed llvm-debuginfo-analyzer for AMDGPU. (PR #145125)   via llvm-commits
• [llvm] [Reland][InstCombine] Iterative replacement in PtrReplacer (PR #144626)   via llvm-commits
• [llvm] [NFC] Simplify checks using isDebugOrPseudoInstr API (PR #145127)   via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (PR #145130)   via llvm-commits
• [clang] [llvm] [Clang][Driver] Add jobserver support for --offload-jobs (PR #145131)   via llvm-commits
• [clang] [llvm] [Clang][Driver] Add jobserver support for --offload-jobs (PR #145131)   via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError in AMDGPULowerBufferFatPointers (PR #145132)   via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for unsupported code object version (PR #145133)   via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for reporting libcalls (PR #145134)   via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (PR #145135)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Plug-in serialization and add full sample testcase (PR #144769)   via llvm-commits
• [llvm] AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (PR #145136)   via llvm-commits
• [llvm] 7297909 - Revert "[Reland][InstCombine] Iterative replacement in PtrReplacer" (#145137)   via llvm-commits
• [llvm] Revert "[Reland][InstCombine] Iterative replacement in PtrReplacer" (PR #145137)   via llvm-commits
• [llvm] [RISCV] Remove -mattr=+no-rvc-hints (PR #145138)   via llvm-commits
• [llvm] [RISCV] Remove -mattr=+no-rvc-hints (PR #145138)   via llvm-commits
• [llvm] [RISCV][NFC] Remove hasStdExtCOrZca (PR #145139)   via llvm-commits
• [llvm] f466131 - AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (#145130)   via llvm-commits
• [llvm] [RISCV] Fix HasStdExtCOrZcfOrZce Syntax (PR #145141)   via llvm-commits
• [llvm] [TableGen] Remove redundant control flow statements (NFC) (PR #145143)   via llvm-commits
• [compiler-rt] fa11771 - [RISCV] Implement Feature Bit for Q (#145001)   via llvm-commits
• [llvm] 7031280 - AMDGPU: Use reportFatalUsageError for unsupported code object version (#145133)   via llvm-commits
• [llvm] AMDGPU/MC: Try harder to evaluate absolute MC expressions (PR #145146)   via llvm-commits
• [llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)   via llvm-commits
• [llvm] [PowerPC] Fix handling of undefs in the PPC::isSplatShuffleMask query (PR #145149)   via llvm-commits
• [llvm] [PowerPC] Fix handling of undefs in the PPC::isSplatShuffleMask query (PR #145149)   via llvm-commits
• [llvm] 981f8e1 - [TableGen] Remove redundant control flow statements (NFC) (#145143)   via llvm-commits
• [llvm] 0fa0c3c - AMDGPU: Use reportFatalUsageError in AMDGPULowerBufferFatPointers (#145132)   via llvm-commits
• [llvm] [llvm] Add a new `Triple::str(N)` method (PR #145150)   via llvm-commits
• [llvm] [llvm] Add a new `Triple::str(N)` method (PR #145150)   via llvm-commits
• [lld] 9cc9efc - [lld][COFF] Remove duplicate strtab entries (#141197)   via llvm-commits
• [llvm] [llvm] Add a new `Triple::str(N)` method (PR #145150)   via llvm-commits
• [llvm] cb4f329 - [RISCV] Fix HasStdExtCOrZcfOrZce Syntax (#145141)   via llvm-commits
• [llvm] [llvm] Add a new `Triple::str(N)` method (PR #145150)   via llvm-commits
• [llvm] 1fec092 - [AArch64][GlobalISel] Allow selecting FPR index loads. (#143835)   via llvm-commits
• [llvm] 4373463 - [GlobalISel] Widen vector loads from aligned ptrs (#144309)   via llvm-commits
• [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 2) (PR #143633)   via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   via llvm-commits
• [llvm] SROA generate a noundef instead of splatting a noundef int (PR #145122)   via llvm-commits
• [llvm] 5f2135d - AMDGPU: Really delete AMDGPUAnnotateKernelFeatures (#145136)   via llvm-commits
• [llvm] [llvm] Add a new `Triple::str(N)` method (PR #145150)   via llvm-commits
• [llvm] d6a486c - [ORC] Apply MachO::CPU_SUBTYPE_MASK to comparison in getDylibInterfac… (#145154)   via llvm-commits
• [llvm] [LV] Don't mark ptrs as safe to speculate if fed by UB/poison op. (PR #143204)   via llvm-commits
• [clang] [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 4) (PR #145157)   via llvm-commits
• [clang] [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 4) (PR #145157)   via llvm-commits
• [clang] [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 4) (PR #145157)   via llvm-commits
• [clang] [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 4) (PR #145157)   via llvm-commits
• [clang] [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 4) (PR #145157)   via llvm-commits
• [llvm] [SimplifyCFG] Relax `cttz` cost check in `simplifySwitchOfPowersOfTwo` (PR #145159)   via llvm-commits
• [clang] [lldb] [llvm] [lldb] Fix object format in the Triple of Mach-O files (approach 4) (PR #145157)   via llvm-commits
• [llvm] 77941eb - [CostModel] Add a DstTy to getShuffleCost (#141634)   via llvm-commits
• [compiler-rt] [TSan] Fix potentially problematic shadow end calculations (PR #144648)   via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   via llvm-commits
• [llvm] [llvm] Optimize misaligned accesses with early profitable splitting (PR #145168)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [llvm] a961ba8 - AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (#145135)   via llvm-commits
• [compiler-rt] 99af99c - [TSan] Fix p == end == ShadowMem::end in ShadowSet (#144994)   via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for unsupported ds_ordered_count (PR #145172)   via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (PR #145173)   via llvm-commits
• [llvm] 463ce01 - [CodeGen] Remove extraneous casts to VariableID (NFC) (#145144)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [X86] Combine `store + vselect` to `masked_store` (PR #145176)   via llvm-commits
• [llvm] 4c1a100 - [X86][NFC] Use std::move to avoid copy (#141455)   via llvm-commits
• [llvm] [AMDGPU] Rename call instructions from b64 to i64 (PR #145103)   via llvm-commits
• [llvm] [WebAssembly] [Backend] Draft pull request for #129441 (PR #145108)   via llvm-commits
• [llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)   via llvm-commits
• [llvm] [WebAssembly] Combine any_true (setcc x, 0, eq) to not all_true (PR #144741)   via llvm-commits
• [llvm] [AVR] Temp fix for getPostIndexedAddressParts() (PR #145040)   via llvm-commits
• [llvm] 1da864b - [RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (#145112)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Add support for splitting vp.splice (PR #145184)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Add support for splitting vp.splice (PR #145184)   via llvm-commits
• [llvm] [AArch64] Have isel just do neg directly (PR #145185)   via llvm-commits
• [llvm] [AArch64] Have isel just do neg directly (PR #145185)   via llvm-commits
• [llvm] [AArch64] Have isel just do neg directly (PR #145185)   via llvm-commits
• [llvm] [AArch64] Have isel just do neg directly (PR #145185)   via llvm-commits
• [llvm] [RS4GC] Fix some test comments that got clobbered (PR #145186)   via llvm-commits
• [llvm] [RS4GC] Fix some test comments that got clobbered (PR #145186)   via llvm-commits
• [llvm] [AArch64] Have isel just do neg directly (PR #145185)   via llvm-commits
• [llvm] [AArch64] Have isel just do neg directly (PR #145185)   via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   via llvm-commits
• [llvm] Revert "[ValueTracking] Improve `Bitcast` handling to match SDAG" (PR #145191)   via llvm-commits
• [lld] [llvm] [lld][COFF] Remove duplicate strtab entries (PR #141197)   via llvm-commits
• [llvm] 5708851 - Revert "[ValueTracking] Improve `Bitcast` handling to match SDAG" (#145191)   via llvm-commits
• [llvm] f280d3b - AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (#145173)   via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   via llvm-commits
• [llvm] CodeGen: Emit error if getRegisterByName fails (PR #145194)   via llvm-commits
• [llvm] AMDGPU: Use reportFatalUsageError for regalloc flag error (PR #145198)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [AArch64] Enable dead register definitions at O0 (PR #145174)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [llvm] b7d0c9b - [SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if the promoted input is sign extended. (#145120)   via llvm-commits
• [llvm] [WebAssembly] [Backend] Draft pull request for #129441 (PR #145108)   via llvm-commits
• [llvm] [WebAssembly] [Backend] Combine and(X, shuffle(X, pow 2 mask)) to all true (PR #145108)   via llvm-commits
• [llvm] [WebAssembly] [Backend] Combine and(X, shuffle(X, pow 2 mask)) to all true (PR #145108)   via llvm-commits
• [llvm] [WebAssembly] [Backend] Combine and(X, shuffle(X, pow 2 mask)) to all true (PR #145108)   via llvm-commits
• [llvm] [WebAssembly] [Backend] Combine and(X, shuffle(X, pow 2 mask)) to all true (PR #145108)   via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error in image intrinsic lowering (PR #145201)   via llvm-commits
• [llvm] AMDGPU: Avoid report_fatal_error on ds ordered intrinsics (PR #145202)   via llvm-commits
• [llvm] [AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant (PR #145203)   via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   via llvm-commits
• [llvm] [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (PR #145204)   via llvm-commits
• [llvm] fa0b84f - [AMDGPU] Rename call instructions from b64 to i64 (#145103)   via llvm-commits
• [llvm] f51d873 - [InstSimplify] Simplify 'x u>= 1' to true when x is known non-zero (#145204)   via llvm-commits
• [llvm] [Instrumentation] Drop "const" from "const StringRef" (NFC) (PR #145208)   via llvm-commits
• [lld] [lld] Use llvm::partition_point (NFC) (PR #145209)   via llvm-commits
• [llvm] [BOLT] Remove a redundant call to std::unique_ptr<T>::get (NFC) (PR #145211)   via llvm-commits
• [llvm] Optimize fptrunc(x)>=C1 --> x>=C2 (PR #99475)   via llvm-commits
• [llvm] cbfec48 - Revert "[X86][NFC] Use std::move to avoid copy" (#145215)   via llvm-commits
• [llvm] Revert "[X86][NFC] Use std::move to avoid copy" (PR #145215)   via llvm-commits
• [llvm] [AMDGPU] Baseline gfx1250 speed model. (PR #145217)   via llvm-commits
• [llvm] [Reland][ValueTracking] Improve Bitcast handling to match SDAG (PR #145223)   via llvm-commits
• [llvm] [Reland][ValueTracking] Improve Bitcast handling to match SDAG (PR #145223)   via llvm-commits
• [llvm] [GlobalOpt] Add range metadata to loads from constant global variables (PR #127695)   via llvm-commits
• [llvm] [GlobalOpt] Add range metadata to loads from constant global variables (PR #127695)   via llvm-commits
• [llvm] [InstCombine] Fold `ceil(X / (2 ^ C)) == 0` -> `X == 0` (PR #143683)   via llvm-commits
• [llvm] c7d9eab - [AVR] Don't apply post-indexing on mismatched pointers (#145224)   via llvm-commits
• [compiler-rt] [sanitizer_common] Drop support for Android 5 (PR #145227)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   via llvm-commits
• [llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)   via llvm-commits
• [llvm] [StackColoring] Change the StackColoring logic + enables it to handle spills (PR #143800)   via llvm-commits
• [llvm] [StackColoring] Change the StackColoring logic + enables it to handle spills (PR #143800)   via llvm-commits
• [llvm] 26390f2 - [VectorCombine] foldShuffleOfShuffles - fold shuffle(shuffle(x,y),poison) length changing masks (#144690)   via llvm-commits
• [llvm] [VPlan] Unroll VPReplicateRecipe by VF. (PR #142433)   via llvm-commits
• [llvm] 5d7d8d6 - [Instrumentation] Drop "const" from a return type (NFC) (#145208)   via llvm-commits
• [lld] 2ac293f - [lld] Use llvm::partition_point (NFC) (#145209)   via llvm-commits
• [llvm] 96493c5 - AMDGPU: Use reportFatalUsageError for regalloc flag error (#145198)   via llvm-commits
• [llvm] 584a2c2 - AMDGPU: Avoid report_fatal_error for reporting libcalls (#145134)   via llvm-commits
• [llvm] [llvm-cov] Add FileID to MCDC records of the json code coverage export (PR #145236)   via llvm-commits
• [llvm] [ARM] Return the correct chain when expanding READ_REGISTER (PR #145237)   via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease (PR #83743)   via llvm-commits
• [llvm] [AArch64] Add support for unsigned comparisons in the condition optimizer (PR #144380)   via llvm-commits
• [llvm] f2eb5d4 - [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (#139239)   via llvm-commits
• [llvm] [AArch64] Roll out zero-register substitution to GPR32/GPR64 (PR #145239)   via llvm-commits
• [llvm] [AArch64] Roll out zero-register substitution to GPR32/GPR64 (PR #145239)   via llvm-commits
• [llvm] [AArch64] Roll out zero-register substitution to GPR32/GPR64 (PR #145239)   via llvm-commits
• [llvm] [AArch64] Roll out zero-register substitution to GPR32/GPR64 (PR #145239)   via llvm-commits
• [llvm] [AArch64] Roll out zero-register substitution to GPR32/GPR64 (PR #145239)   via llvm-commits
• [llvm] [AArch64] Roll out zero-register substitution to GPR32/GPR64 (PR #145239)   via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   zhijian lin via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [PowerPC] frontend get target feature from backend with cpu name (PR #137670)   zhijian lin via llvm-commits
• [clang] [llvm] [PowerPC] frontend get target feature from backend with cpu name (PR #137670)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [llvm] [NFC][PowerPC] pre-commit running the update_llc_test_checks.py for all-atomics.ll, loop-comment.ll etc (PR #144411)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [clang] [llvm] [Reland] [PowerPC] frontend get target feature from backend with cpu name (PR #144594)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits
• [llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)   zhijian lin via llvm-commits