[llvm] [SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (PR #139239)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 16 03:11:11 PDT 2025
================
@@ -2966,6 +2966,81 @@ bool TargetLowering::SimplifyDemandedBits(
}
break;
}
+ case ISD::FABS: {
+ SDValue Op0 = Op.getOperand(0);
+ APInt SignMask = APInt::getSignMask(BitWidth);
+
+ if (!DemandedBits.intersects(SignMask))
+ return TLO.CombineTo(Op, Op0);
+
+ if (SimplifyDemandedBits(Op0, DemandedBits, DemandedElts, Known, TLO,
+ Depth + 1))
+ return true;
+
+ if (Known.isNonNegative())
+ return TLO.CombineTo(Op, Op0);
+ if (Known.isNegative())
+ return TLO.CombineTo(
+ Op, TLO.DAG.getNode(ISD::FNEG, dl, VT, Op0, Op->getFlags()));
+
+ Known.Zero |= SignMask;
+ Known.One &= ~SignMask;
+
+ break;
+ }
+ case ISD::FCOPYSIGN: {
+ SDValue Op0 = Op.getOperand(0);
+ SDValue Op1 = Op.getOperand(1);
+
+ unsigned BitWidth0 = Op0.getScalarValueSizeInBits();
+ unsigned BitWidth1 = Op1.getScalarValueSizeInBits();
+ APInt SignMask0 = APInt::getSignMask(BitWidth0);
+ APInt SignMask1 = APInt::getSignMask(BitWidth1);
+
+ if (!DemandedBits.intersects(SignMask0))
+ return TLO.CombineTo(Op, Op0);
+
+ if (SimplifyDemandedBits(Op0, ~SignMask0 & DemandedBits, DemandedElts,
+ Known, TLO, Depth + 1) ||
+ SimplifyDemandedBits(Op1, SignMask1, DemandedElts, Known2, TLO,
+ Depth + 1))
+ return true;
+
+ if ((Known.isNonNegative() && Known2.isNonNegative()) ||
+ (Known.isNegative() && Known2.isNegative()))
----------------
jayfoad wrote:
As @RKSimon pointed out in the other case, you can't test the sign bit in Known here because you didn't demand the sign bit in the first recursive call to SimplifyDemandedBits.
https://github.com/llvm/llvm-project/pull/139239
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