[llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 19 20:27:56 PDT 2025
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@@ -305,11 +302,8 @@ define <vscale x 2 x i32> @test_vp_splice_nxv2i32_with_firstelt(i32 %first, <vsc
define <vscale x 2 x float> @test_vp_splice_nxv2f32_with_firstelt(float %first, <vscale x 2 x float> %vb, <vscale x 2 x i1> %mask, i32 zeroext %evl) {
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wangpc-pp wrote:
It seems this only happens when lowering vp_splice so maybe we should optimize it in lowerVPSpliceExperimental?
Did you find this case when debugging vectorization cases? Can you show the C exmaple?
https://github.com/llvm/llvm-project/pull/144871
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