[llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)

[Brox Chen via llvm-commits]

================
@@ -2583,6 +2585,23 @@ def : GCNPat <
   (i16 (DivergentSextInreg<i8> i16:$src)),
   (V_BFE_I32_e64 $src, (i32 0), (i32 8))
 >;
+}
+
+let True16Predicate = UseRealTrue16Insts in {
+def : GCNPat <
+  (i16 (DivergentSextInreg<i1> i16:$src)),
+  (V_BFE_I32_e64
+   (REG_SEQUENCE VGPR_32, VGPR_16:$src, lo16, (i16 (IMPLICIT_DEF)), hi16),
+   (i32 0), (i32 1))
+>;
----------------
broxigarchen wrote:

Hi, I tried looking into the legalizeDAG and test it a bit. It seems the legalizer might not work here.

We don't have a inplace sign_extend_inreg/sign_extend promote case in [codegen](https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp#L5188). And it seems most of promote code is implemented with sign_extend/zero_extend/fp_extend...  I think the promote code comes back to these patterns in the end. 

https://github.com/llvm/llvm-project/pull/144024