[llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 19 19:59:31 PDT 2025
- Previous message: [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)
- Next message: [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
================
@@ -286,3 +286,27 @@ define <vscale x 2 x float> @test_vp_splice_nxv2f32_masked(<vscale x 2 x float>
%v = call <vscale x 2 x float> @llvm.experimental.vp.splice.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, i32 5, <vscale x 2 x i1> %mask, i32 %evla, i32 %evlb)
ret <vscale x 2 x float> %v
}
+
+define <vscale x 2 x i32> @test_vp_splice_nxv2i32_with_firstelt(i32 %first, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %mask, i32 zeroext %evl) {
----------------
wangpc-pp wrote:
precommit test?
https://github.com/llvm/llvm-project/pull/144871
- Previous message: [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)
- Next message: [llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
More information about the llvm-commits
mailing list