[llvm] [RISCV] Make All VType Parts Optional (PR #144971)

[Craig Topper via llvm-commits]

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@@ -1,12 +1,6 @@
 # RUN: not llvm-mc -triple=riscv64 --mattr=+v --mattr=+f %s 2>&1 \
 # RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 
-vsetivli a2, 32, e8,m1
-# CHECK-ERROR: operand must be e[8|16|32|64],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
-
-vsetivli a2, zero, e8,m1
-# CHECK-ERROR: operand must be e[8|16|32|64],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
-
 vsetivli a2, 5, (1 << 10)
 # CHECK-ERROR: operand must be e[8|16|32|64],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu]
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topperc wrote:

Given that we're doing this for compatibility with binutils, does it even make sense to encourage the optional syntax?

It's going to be rarely useful to not specify sew.
Not specifying tail and mask policy gives undisturbed policy which is the worst for performance on out of order cores.

Not specifying LMUL is only useful in loops with a single element type. If you do any widening/narrowing, you still need to change vtype to a different lmul to do any other operations on the data other than load/store. Having no lmul only on some vsetvli in your loop seems like bad readability choice.

https://github.com/llvm/llvm-project/pull/144971