[llvm] 6e8cf9c - AArch64: Add arm64ec libcall tests for __arm_sc_* functions (#144356)

[via llvm-commits]

Author: Matt Arsenault
Date: 2025-06-17T09:55:41+09:00
New Revision: 6e8cf9c63f643768a1d54a9ce2a73a570429c4bc

URL: https://github.com/llvm/llvm-project/commit/6e8cf9c63f643768a1d54a9ce2a73a570429c4bc
DIFF: https://github.com/llvm/llvm-project/commit/6e8cf9c63f643768a1d54a9ce2a73a570429c4bc.diff

LOG: AArch64: Add arm64ec libcall tests for __arm_sc_* functions (#144356)

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/arm64ec-builtins.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll b/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
index cc4ec9c2eebd6..38416310b3536 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
@@ -42,3 +42,33 @@ define float @f6(float %val, i32 %a) {
   %call = tail call fast float @llvm.ldexp.f32(float %val, i32 %a)
   ret float %call
 }
+
+ at dst = global [512 x i8] zeroinitializer, align 1
+ at src = global [512 x i8] zeroinitializer, align 1
+
+; FIXME: Wrong and probably needs a # prefix
+define void @call__arm_sc_memcpy(i64 noundef %n) #0 {
+; CHECK-LABEL: "#call__arm_sc_memcpy":
+; CHECK: bl __arm_sc_memcpy
+
+  tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 @dst, ptr nonnull align 1 @src, i64 %n, i1 false)
+  ret void
+}
+
+; FIXME: Wrong and probably needs a # prefix
+define void @call__arm_sc_memmove(i64 noundef %n) #0 {
+; CHECK-LABEL: "#call__arm_sc_memmove":
+; CHECK: bl __arm_sc_memmove
+  tail call void @llvm.memmove.p0.p0.i64(ptr align 1 @dst, ptr nonnull align 1 @src, i64 %n, i1 false)
+  ret void
+}
+
+; FIXME: Wrong and probably needs a # prefix
+define void @call__arm_sc_memset(i64 noundef %n) #0 {
+; CHECK-LABEL: "#call__arm_sc_memset":
+; CHECK: bl __arm_sc_memset
+  tail call void @llvm.memset.p0.i64(ptr align 1 @dst, i8 2, i64 %n, i1 false)
+  ret void
+}
+
+attributes #0 = { nounwind "aarch64_pstate_sm_enabled" "target-features"="+sme2" }