[llvm] [SelectionDAG] Remove UnsafeFPMath check in `visitFADDForFMACombine` (PR #127770)

[Matt Arsenault via llvm-commits]

================
@@ -136,17 +215,45 @@ entry:
 }
 
 ; Tests to make sure dot product is not generated when the vectors are not of <2 x half>.
-; GCN-LABEL: {{^}}dotproduct_v4f16
-; GFX900: v_mad_mix_f32
-
-; GFX906: v_mad_f32
-; GFX906: v_mac_f32_e32
+; GCN-LABEL: {{^}}dotproduct_v4f16_contract
 
 ; GCN-DL-UNSAFE: v_fma_mix_f32
 
 ; GFX906-CONTRACT: v_fma_mix_f32
 ; GFX906-DENORM-CONTRACT: v_fma_mix_f32
 ; GFX906-DOT10-DISABLED: v_fma_mix_f32
+define amdgpu_kernel void @dotproduct_v4f16_contract(ptr addrspace(1) %src1,
+                                                     ptr addrspace(1) %src2,
+                                                     ptr addrspace(1) nocapture %dst) {
+entry:
+  %src1.vec = load <4 x half>, ptr addrspace(1) %src1
+  %src2.vec = load <4 x half>, ptr addrspace(1) %src2
+
+  %src1.el1 = extractelement <4 x half> %src1.vec, i64 0
+  %csrc1.el1 = fpext half %src1.el1 to float
+  %src2.el1 = extractelement <4 x half> %src2.vec, i64 0
+  %csrc2.el1 = fpext half %src2.el1 to float
+
+  %src1.el2 = extractelement <4 x half> %src1.vec, i64 1
+  %csrc1.el2 = fpext half %src1.el2 to float
+  %src2.el2 = extractelement <4 x half> %src2.vec, i64 1
+  %csrc2.el2 = fpext half %src2.el2 to float
+
+  %mul2 = fmul fast float %csrc1.el2, %csrc2.el2
+  %mul1 = fmul float %csrc1.el1, %csrc2.el1
+  %acc = load float, ptr addrspace(1) %dst, align 4
+  %acc1 = fadd fast float %mul2, %acc
+  %acc2 = fadd fast float %mul1, %acc1
----------------
arsenm wrote:

```suggestion
  %mul2 = fmul contract float %csrc1.el2, %csrc2.el2
  %mul1 = fmul float %csrc1.el1, %csrc2.el1
  %acc = load float, ptr addrspace(1) %dst, align 4
  %acc1 = fadd contract float %mul2, %acc
  %acc2 = fadd contract float %mul1, %acc1
```

https://github.com/llvm/llvm-project/pull/127770