[llvm] 0bb4d9c - ARM: Migrate to the new relocation specifier representation
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 16 00:21:19 PDT 2025
Author: Fangrui Song
Date: 2025-06-16T00:21:14-07:00
New Revision: 0bb4d9c30207c4a69731e6848ba7cb6ef52b5906
URL: https://github.com/llvm/llvm-project/commit/0bb4d9c30207c4a69731e6848ba7cb6ef52b5906
DIFF: https://github.com/llvm/llvm-project/commit/0bb4d9c30207c4a69731e6848ba7cb6ef52b5906.diff
LOG: ARM: Migrate to the new relocation specifier representation
Use MCSpecifierExpr directly and remove the ARMMCExpr subclass. Define
printImpl and evaluateAsRelocationImpl within ARM*MCAsmInfo classes.
While there is some duplication, it enables better separation for
object file formats.
Added:
Modified:
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMMCInstLower.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
Removed:
llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index fef7a17ae0b63..fa14370025515 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -1619,12 +1619,15 @@ void ARMAsmPrinter::emitInstruction(const MachineInstr *MI) {
MI->getOperand(2).getImm(), OutContext);
const MCExpr *LabelSymExpr= MCSymbolRefExpr::create(LabelSym, OutContext);
unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4;
- const MCExpr *PCRelExpr =
- ARMMCExpr::createLower16(MCBinaryExpr::createSub(GVSymExpr,
- MCBinaryExpr::createAdd(LabelSymExpr,
- MCConstantExpr::create(PCAdj, OutContext),
- OutContext), OutContext), OutContext);
- TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
+ const MCExpr *PCRelExpr = ARM::createLower16(
+ MCBinaryExpr::createSub(
+ GVSymExpr,
+ MCBinaryExpr::createAdd(LabelSymExpr,
+ MCConstantExpr::create(PCAdj, OutContext),
+ OutContext),
+ OutContext),
+ OutContext);
+ TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
// Add predicate operands.
TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
@@ -1652,12 +1655,15 @@ void ARMAsmPrinter::emitInstruction(const MachineInstr *MI) {
MI->getOperand(3).getImm(), OutContext);
const MCExpr *LabelSymExpr= MCSymbolRefExpr::create(LabelSym, OutContext);
unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4;
- const MCExpr *PCRelExpr =
- ARMMCExpr::createUpper16(MCBinaryExpr::createSub(GVSymExpr,
- MCBinaryExpr::createAdd(LabelSymExpr,
- MCConstantExpr::create(PCAdj, OutContext),
- OutContext), OutContext), OutContext);
- TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
+ const MCExpr *PCRelExpr = ARM::createUpper16(
+ MCBinaryExpr::createSub(
+ GVSymExpr,
+ MCBinaryExpr::createAdd(LabelSymExpr,
+ MCConstantExpr::create(PCAdj, OutContext),
+ OutContext),
+ OutContext),
+ OutContext);
+ TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
// Add predicate operands.
TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
TmpInst.addOperand(MCOperand::createReg(0));
diff --git a/llvm/lib/Target/ARM/ARMMCInstLower.cpp b/llvm/lib/Target/ARM/ARMMCInstLower.cpp
index b32de6b66058b..f5d6597f214dd 100644
--- a/llvm/lib/Target/ARM/ARMMCInstLower.cpp
+++ b/llvm/lib/Target/ARM/ARMMCInstLower.cpp
@@ -49,27 +49,27 @@ MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
break;
case ARMII::MO_LO16:
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
- Expr = ARMMCExpr::createLower16(Expr, OutContext);
+ Expr = ARM::createLower16(Expr, OutContext);
break;
case ARMII::MO_HI16:
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
- Expr = ARMMCExpr::createUpper16(Expr, OutContext);
+ Expr = ARM::createUpper16(Expr, OutContext);
break;
case ARMII::MO_LO_0_7:
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
- Expr = ARMMCExpr::createLower0_7(Expr, OutContext);
+ Expr = ARM::createLower0_7(Expr, OutContext);
break;
case ARMII::MO_LO_8_15:
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
- Expr = ARMMCExpr::createLower8_15(Expr, OutContext);
+ Expr = ARM::createLower8_15(Expr, OutContext);
break;
case ARMII::MO_HI_0_7:
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
- Expr = ARMMCExpr::createUpper0_7(Expr, OutContext);
+ Expr = ARM::createUpper0_7(Expr, OutContext);
break;
case ARMII::MO_HI_8_15:
Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
- Expr = ARMMCExpr::createUpper8_15(Expr, OutContext);
+ Expr = ARM::createUpper8_15(Expr, OutContext);
break;
}
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 6e9efe40dc54c..f3bdcd64805d8 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -454,7 +454,7 @@ class ARMAsmParser : public MCTargetAsmParser {
bool parseMemory(OperandVector &);
bool parseOperand(OperandVector &, StringRef Mnemonic);
bool parseImmExpr(int64_t &Out);
- bool parsePrefix(ARMMCExpr::Specifier &);
+ bool parsePrefix(ARM::Specifier &);
bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
unsigned &ShiftAmount);
bool parseLiteralValues(unsigned Size, SMLoc L);
@@ -1326,7 +1326,7 @@ class ARMOperand : public MCParsedAsmOperand {
if (isImm() && !isa<MCConstantExpr>(getImm())) {
// We want to avoid matching :upper16: and :lower16: as we want these
// expressions to match in isImm0_65535Expr()
- const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(getImm());
+ auto *ARM16Expr = dyn_cast<MCSpecifierExpr>(getImm());
return (!ARM16Expr || (ARM16Expr->getSpecifier() != ARM::S_HI16 &&
ARM16Expr->getSpecifier() != ARM::S_LO16));
}
@@ -6424,7 +6424,7 @@ bool ARMAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
// ":upper8_15:", expression prefixes
// FIXME: Check it's an expression prefix,
// e.g. (FOO - :lower16:BAR) isn't legal.
- ARMMCExpr::Specifier Spec;
+ ARM::Specifier Spec;
if (parsePrefix(Spec))
return true;
@@ -6432,7 +6432,8 @@ bool ARMAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
if (getParser().parseExpression(SubExprVal))
return true;
- const MCExpr *ExprVal = ARMMCExpr::create(Spec, SubExprVal, getContext());
+ const auto *ExprVal =
+ MCSpecifierExpr::create(SubExprVal, Spec, getContext());
E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
Operands.push_back(ARMOperand::CreateImm(ExprVal, S, E, *this));
return false;
@@ -6471,7 +6472,7 @@ bool ARMAsmParser::parseImmExpr(int64_t &Out) {
// parsePrefix - Parse ARM 16-bit relocations expression prefixes, i.e.
// :lower16: and :upper16: and Thumb 8-bit relocation expression prefixes, i.e.
// :upper8_15:, :upper0_7:, :lower8_15: and :lower0_7:
-bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
+bool ARMAsmParser::parsePrefix(ARM::Specifier &Spec) {
MCAsmParser &Parser = getParser();
Spec = ARM::S_None;
@@ -6495,7 +6496,7 @@ bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
};
static const struct PrefixEntry {
const char *Spelling;
- ARMMCExpr::Specifier Spec;
+ ARM::Specifier Spec;
uint8_t SupportedFormats;
} PrefixEntries[] = {
{"upper16", ARM::S_HI16, COFF | ELF | MACHO},
@@ -6879,7 +6880,7 @@ static bool isThumbI8Relocation(MCParsedAsmOperand &MCOp) {
const MCExpr *E = dyn_cast<MCExpr>(Op.getImm());
if (!E)
return false;
- const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
+ auto *ARM16Expr = dyn_cast<MCSpecifierExpr>(E);
if (ARM16Expr && (ARM16Expr->getSpecifier() == ARM::S_HI_8_15 ||
ARM16Expr->getSpecifier() == ARM::S_HI_0_7 ||
ARM16Expr->getSpecifier() == ARM::S_LO_8_15 ||
@@ -8286,7 +8287,7 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
if (CE) break;
const MCExpr *E = dyn_cast<MCExpr>(Op.getImm());
if (!E) break;
- const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
+ auto *ARM16Expr = dyn_cast<MCSpecifierExpr>(E);
if (!ARM16Expr || (ARM16Expr->getSpecifier() != ARM::S_HI16 &&
ARM16Expr->getSpecifier() != ARM::S_LO16))
return Error(
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
index f8ec0237dcb59..a3d86f690e4a8 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
@@ -11,8 +11,8 @@
//===----------------------------------------------------------------------===//
#include "ARMMCAsmInfo.h"
-#include "MCTargetDesc/ARMMCExpr.h"
#include "llvm/MC/MCExpr.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/Triple.h"
using namespace llvm;
@@ -153,3 +153,62 @@ ARMCOFFMCAsmInfoGNU::ARMCOFFMCAsmInfoGNU() {
initializeVariantKinds(variantKindDescs);
}
+
+void ARM::printSpecifierExpr(const MCAsmInfo &MAI, raw_ostream &OS,
+ const MCSpecifierExpr &Expr) {
+ switch (Expr.getSpecifier()) {
+ default:
+ llvm_unreachable("Invalid kind!");
+ case ARM::S_HI16:
+ OS << ":upper16:";
+ break;
+ case ARM::S_LO16:
+ OS << ":lower16:";
+ break;
+ case ARM::S_HI_8_15:
+ OS << ":upper8_15:";
+ break;
+ case ARM::S_HI_0_7:
+ OS << ":upper0_7:";
+ break;
+ case ARM::S_LO_8_15:
+ OS << ":lower8_15:";
+ break;
+ case ARM::S_LO_0_7:
+ OS << ":lower0_7:";
+ break;
+ }
+
+ const MCExpr *Sub = Expr.getSubExpr();
+ if (Sub->getKind() != MCExpr::SymbolRef)
+ OS << '(';
+ MAI.printExpr(OS, *Sub);
+ if (Sub->getKind() != MCExpr::SymbolRef)
+ OS << ')';
+}
+
+const MCSpecifierExpr *ARM::createUpper16(const MCExpr *Expr, MCContext &Ctx) {
+ return MCSpecifierExpr::create(Expr, ARM::S_HI16, Ctx);
+}
+
+const MCSpecifierExpr *ARM::createLower16(const MCExpr *Expr, MCContext &Ctx) {
+ return MCSpecifierExpr::create(Expr, ARM::S_LO16, Ctx);
+}
+
+const MCSpecifierExpr *ARM::createUpper8_15(const MCExpr *Expr,
+ MCContext &Ctx) {
+ return MCSpecifierExpr::create(Expr, ARM::S_HI_8_15, Ctx);
+}
+
+const MCSpecifierExpr *ARM::createUpper0_7(const MCExpr *Expr, MCContext &Ctx) {
+ return MCSpecifierExpr::create(Expr, ARM::S_HI_0_7, Ctx);
+}
+
+const MCSpecifierExpr *ARM::createLower8_15(const MCExpr *Expr,
+ MCContext &Ctx) {
+ return MCSpecifierExpr::create(Expr, ARM::S_LO_8_15, Ctx);
+}
+
+const MCSpecifierExpr *ARM::createLower0_7(const MCExpr *Expr, MCContext &Ctx) {
+ return MCSpecifierExpr::create(Expr, ARM::S_LO_0_7, Ctx);
+}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
index baadf74e0d5a5..f3f075e99d961 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
@@ -13,7 +13,6 @@
#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCASMINFO_H
#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCASMINFO_H
-#include "MCTargetDesc/ARMMCExpr.h"
#include "llvm/MC/MCAsmInfoCOFF.h"
#include "llvm/MC/MCAsmInfoDarwin.h"
#include "llvm/MC/MCAsmInfoELF.h"
@@ -22,11 +21,24 @@
namespace llvm {
class Triple;
+namespace ARM {
+void printSpecifierExpr(const MCAsmInfo &MAI, raw_ostream &OS,
+ const MCSpecifierExpr &Expr);
+}
+
class ARMMCAsmInfoDarwin : public MCAsmInfoDarwin {
virtual void anchor();
public:
explicit ARMMCAsmInfoDarwin(const Triple &TheTriple);
+ void printSpecifierExpr(raw_ostream &OS,
+ const MCSpecifierExpr &Expr) const override {
+ ARM::printSpecifierExpr(*this, OS, Expr);
+ }
+ bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
+ const MCAssembler *) const override {
+ return false;
+ }
};
class ARMELFMCAsmInfo : public MCAsmInfoELF {
@@ -36,6 +48,14 @@ class ARMELFMCAsmInfo : public MCAsmInfoELF {
explicit ARMELFMCAsmInfo(const Triple &TT);
void setUseIntegratedAssembler(bool Value) override;
+ void printSpecifierExpr(raw_ostream &OS,
+ const MCSpecifierExpr &Expr) const override {
+ ARM::printSpecifierExpr(*this, OS, Expr);
+ }
+ bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
+ const MCAssembler *) const override {
+ return false;
+ }
};
class ARMCOFFMCAsmInfoMicrosoft : public MCAsmInfoMicrosoft {
@@ -43,6 +63,14 @@ class ARMCOFFMCAsmInfoMicrosoft : public MCAsmInfoMicrosoft {
public:
explicit ARMCOFFMCAsmInfoMicrosoft();
+ void printSpecifierExpr(raw_ostream &OS,
+ const MCSpecifierExpr &Expr) const override {
+ ARM::printSpecifierExpr(*this, OS, Expr);
+ }
+ bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
+ const MCAssembler *) const override {
+ return false;
+ }
};
class ARMCOFFMCAsmInfoGNU : public MCAsmInfoGNUCOFF {
@@ -50,9 +78,18 @@ class ARMCOFFMCAsmInfoGNU : public MCAsmInfoGNUCOFF {
public:
explicit ARMCOFFMCAsmInfoGNU();
+ void printSpecifierExpr(raw_ostream &OS,
+ const MCSpecifierExpr &Expr) const override {
+ ARM::printSpecifierExpr(*this, OS, Expr);
+ }
+ bool evaluateAsRelocatableImpl(const MCSpecifierExpr &, MCValue &,
+ const MCAssembler *) const override {
+ return false;
+ }
};
namespace ARM {
+using Specifier = uint16_t;
enum {
S_None,
S_HI16 =
@@ -93,6 +130,13 @@ enum {
S_TLSLDO,
S_TPOFF,
};
+
+const MCSpecifierExpr *createUpper16(const MCExpr *Expr, MCContext &Ctx);
+const MCSpecifierExpr *createLower16(const MCExpr *Expr, MCContext &Ctx);
+const MCSpecifierExpr *createUpper8_15(const MCExpr *Expr, MCContext &Ctx);
+const MCSpecifierExpr *createUpper0_7(const MCExpr *Expr, MCContext &Ctx);
+const MCSpecifierExpr *createLower8_15(const MCExpr *Expr, MCContext &Ctx);
+const MCSpecifierExpr *createLower0_7(const MCExpr *Expr, MCContext &Ctx);
}
} // namespace llvm
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index f006e00ada328..fba32eae4dfa8 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -1192,7 +1192,7 @@ uint32_t ARMMCCodeEmitter::getHiLoImmOpValue(const MCInst &MI, unsigned OpIdx,
const MCExpr *E = MO.getExpr();
MCFixupKind Kind;
if (E->getKind() == MCExpr::Specifier) {
- const ARMMCExpr *ARM16Expr = cast<ARMMCExpr>(E);
+ auto *ARM16Expr = cast<MCSpecifierExpr>(E);
E = ARM16Expr->getSubExpr();
if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(E)) {
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
deleted file mode 100644
index 1e6760a57608a..0000000000000
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
+++ /dev/null
@@ -1,78 +0,0 @@
-//===-- ARMMCExpr.cpp - ARM specific MC expression classes ----------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "ARMMCExpr.h"
-#include "ARMMCAsmInfo.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCStreamer.h"
-using namespace llvm;
-
-#define DEBUG_TYPE "armmcexpr"
-
-const ARMMCExpr *ARMMCExpr::create(Specifier S, const MCExpr *Expr,
- MCContext &Ctx) {
- return new (Ctx) ARMMCExpr(S, Expr);
-}
-
-void ARMMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
- switch (specifier) {
- default: llvm_unreachable("Invalid kind!");
- case ARM::S_HI16:
- OS << ":upper16:";
- break;
- case ARM::S_LO16:
- OS << ":lower16:";
- break;
- case ARM::S_HI_8_15:
- OS << ":upper8_15:";
- break;
- case ARM::S_HI_0_7:
- OS << ":upper0_7:";
- break;
- case ARM::S_LO_8_15:
- OS << ":lower8_15:";
- break;
- case ARM::S_LO_0_7:
- OS << ":lower0_7:";
- break;
- }
-
- const MCExpr *Expr = getSubExpr();
- if (Expr->getKind() != MCExpr::SymbolRef)
- OS << '(';
- MAI->printExpr(OS, *Expr);
- if (Expr->getKind() != MCExpr::SymbolRef)
- OS << ')';
-}
-
-const ARMMCExpr *ARMMCExpr::createUpper16(const MCExpr *Expr, MCContext &Ctx) {
- return ARMMCExpr::create(ARM::S_HI16, Expr, Ctx);
-}
-
-const ARMMCExpr *ARMMCExpr::createLower16(const MCExpr *Expr, MCContext &Ctx) {
- return ARMMCExpr::create(ARM::S_LO16, Expr, Ctx);
-}
-
-const ARMMCExpr *ARMMCExpr::createUpper8_15(const MCExpr *Expr,
- MCContext &Ctx) {
- return ARMMCExpr::create(ARM::S_HI_8_15, Expr, Ctx);
-}
-
-const ARMMCExpr *ARMMCExpr::createUpper0_7(const MCExpr *Expr, MCContext &Ctx) {
- return ARMMCExpr::create(ARM::S_HI_0_7, Expr, Ctx);
-}
-
-const ARMMCExpr *ARMMCExpr::createLower8_15(const MCExpr *Expr,
- MCContext &Ctx) {
- return ARMMCExpr::create(ARM::S_LO_8_15, Expr, Ctx);
-}
-
-const ARMMCExpr *ARMMCExpr::createLower0_7(const MCExpr *Expr, MCContext &Ctx) {
- return ARMMCExpr::create(ARM::S_LO_0_7, Expr, Ctx);
-}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
deleted file mode 100644
index f29d05ba2a88d..0000000000000
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
+++ /dev/null
@@ -1,43 +0,0 @@
-//===-- ARMMCExpr.h - ARM specific MC expression classes --------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCEXPR_H
-#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCEXPR_H
-
-#include "llvm/MC/MCExpr.h"
-
-namespace llvm {
-
-class ARMMCExpr : public MCSpecifierExpr {
-public:
- using Specifier = uint16_t;
-
-private:
- explicit ARMMCExpr(Specifier S, const MCExpr *Expr)
- : MCSpecifierExpr(Expr, S) {}
-
-public:
- static const ARMMCExpr *create(Specifier S, const MCExpr *Expr,
- MCContext &Ctx);
-
- static const ARMMCExpr *createUpper16(const MCExpr *Expr, MCContext &Ctx);
- static const ARMMCExpr *createLower16(const MCExpr *Expr, MCContext &Ctx);
- static const ARMMCExpr *createUpper8_15(const MCExpr *Expr, MCContext &Ctx);
- static const ARMMCExpr *createUpper0_7(const MCExpr *Expr, MCContext &Ctx);
- static const ARMMCExpr *createLower8_15(const MCExpr *Expr, MCContext &Ctx);
- static const ARMMCExpr *createLower0_7(const MCExpr *Expr, MCContext &Ctx);
-
- void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override;
- bool evaluateAsRelocatableImpl(MCValue &Res,
- const MCAssembler *Asm) const override {
- return false;
- }
-};
-} // end namespace llvm
-
-#endif
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
index 886b7e7bc84e8..72d9379f50384 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
-#include "ARMMCExpr.h"
+#include "ARMMCAsmInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "llvm-c/Disassembler.h"
#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"
@@ -24,9 +24,9 @@ class ARMMachORelocationInfo : public MCRelocationInfo {
unsigned VariantKind) override {
switch(VariantKind) {
case LLVMDisassembler_VariantKind_ARM_HI16:
- return ARMMCExpr::createUpper16(SubExpr, Ctx);
+ return ARM::createUpper16(SubExpr, Ctx);
case LLVMDisassembler_VariantKind_ARM_LO16:
- return ARMMCExpr::createLower16(SubExpr, Ctx);
+ return ARM::createLower16(SubExpr, Ctx);
default:
return MCRelocationInfo::createExprForCAPIVariantKind(SubExpr,
VariantKind);
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt b/llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
index 8b3ef0ee651e5..977f8bf5548fd 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
+++ b/llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
@@ -7,7 +7,6 @@ add_llvm_component_library(LLVMARMDesc
ARMMachORelocationInfo.cpp
ARMMCAsmInfo.cpp
ARMMCCodeEmitter.cpp
- ARMMCExpr.cpp
ARMMCTargetDesc.cpp
ARMTargetStreamer.cpp
ARMUnwindOpAsm.cpp
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
index 981639faf71d3..698607f3a2267 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
@@ -67,7 +67,6 @@ static_library("MCTargetDesc") {
"ARMInstPrinter.cpp",
"ARMMCAsmInfo.cpp",
"ARMMCCodeEmitter.cpp",
- "ARMMCExpr.cpp",
"ARMMCTargetDesc.cpp",
"ARMMachORelocationInfo.cpp",
"ARMMachObjectWriter.cpp",
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