[llvm] [RISCV] Add support for handling one tied operand in the source instruction for compress patterns (PR #143660)

[Craig Topper via llvm-commits]

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@@ -422,10 +435,18 @@ void CompressInstEmitter::createInstOperandMapping(
       assert(DestDag->getArgNameStr(DagArgIdx) ==
                  SourceDag->getArgNameStr(SourceOp->getValue()) &&
              "Incorrect operand mapping detected!\n");
-      DestOperandMap[OpNo].Data.Operand = SourceOp->getValue();
-      SourceOperandMap[SourceOp->getValue()].Data.Operand = OpNo;
-      LLVM_DEBUG(dbgs() << "    " << SourceOp->getValue() << " ====> " << OpNo
-                        << "\n");
+
+      // Following four lines ensure the correct handling of a single tied
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topperc wrote:

There are 6 lines or 5 lines if you don't count the debug message.

https://github.com/llvm/llvm-project/pull/143660