[compiler-rt] fa11771 - [RISCV] Implement Feature Bit for Q (#145001)

[via llvm-commits]

Author: Iris Shi
Date: 2025-06-21T11:32:28+08:00
New Revision: fa117715ca3645603859c8474ea3312639f3ff66

URL: https://github.com/llvm/llvm-project/commit/fa117715ca3645603859c8474ea3312639f3ff66
DIFF: https://github.com/llvm/llvm-project/commit/fa117715ca3645603859c8474ea3312639f3ff66.diff

LOG: [RISCV] Implement Feature Bit for Q (#145001)

Added: 
    

Modified: 
    compiler-rt/lib/builtins/cpu_model/riscv.c

Removed: 
    


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diff  --git a/compiler-rt/lib/builtins/cpu_model/riscv.c b/compiler-rt/lib/builtins/cpu_model/riscv.c
index 16d55fcfffe75..c02f6e9961ca4 100644
--- a/compiler-rt/lib/builtins/cpu_model/riscv.c
+++ b/compiler-rt/lib/builtins/cpu_model/riscv.c
@@ -40,6 +40,8 @@ struct {
 #define I_BITMASK (1ULL << 8)
 #define M_GROUPID 0
 #define M_BITMASK (1ULL << 12)
+#define Q_GROUPID 0
+#define Q_BITMASK (1ULL << 16)
 #define V_GROUPID 0
 #define V_BITMASK (1ULL << 21)
 #define ZACAS_GROUPID 0