[llvm] [llvm-exegesis] Add HasNoSchedulingInfo flag to MCInstDesc. (PR #143840)

Jim Lin via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 16 02:16:14 PDT 2025


https://github.com/tclin914 updated https://github.com/llvm/llvm-project/pull/143840

>From 6a420eb30e43760606108155c565a9ffd037c5ca Mon Sep 17 00:00:00 2001
From: Jim Lin <jim at andestech.com>
Date: Thu, 12 Jun 2025 08:55:06 +0800
Subject: [PATCH 1/2] [llvm-exegesis] Add HasNoSchedulingInfo flag to
 MCInstDesc.

This allows llvm-exegesis to skip instructions that lack scheduling
information, avoiding invalid benchmarking. e.g. `InstB` in RISC-V.
---
 llvm/include/llvm/MC/MCInstrDesc.h       | 6 ++++++
 llvm/tools/llvm-exegesis/lib/Target.cpp  | 2 ++
 llvm/utils/TableGen/InstrInfoEmitter.cpp | 2 ++
 3 files changed, 10 insertions(+)

diff --git a/llvm/include/llvm/MC/MCInstrDesc.h b/llvm/include/llvm/MC/MCInstrDesc.h
index 8c70925d4780e..69d8e03fb79bd 100644
--- a/llvm/include/llvm/MC/MCInstrDesc.h
+++ b/llvm/include/llvm/MC/MCInstrDesc.h
@@ -188,6 +188,7 @@ enum Flag {
   Trap,
   VariadicOpsAreDefs,
   Authenticated,
+  HasNoSchedulingInfo,
 };
 } // namespace MCID
 
@@ -430,6 +431,11 @@ class MCInstrDesc {
     return Flags & (1ULL << MCID::Authenticated);
   }
 
+  /// Return true if this instruction has no scheduling info.
+  bool hasNoSchedulingInfo() const {
+    return Flags & (1ULL << MCID::HasNoSchedulingInfo);
+  }
+
   //===--------------------------------------------------------------------===//
   // Side Effect Analysis
   //===--------------------------------------------------------------------===//
diff --git a/llvm/tools/llvm-exegesis/lib/Target.cpp b/llvm/tools/llvm-exegesis/lib/Target.cpp
index 68d19514bedb2..9eb8f4d11bfb3 100644
--- a/llvm/tools/llvm-exegesis/lib/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Target.cpp
@@ -45,6 +45,8 @@ ExegesisTarget::getIgnoredOpcodeReasonOrNull(const LLVMState &State,
     return "Unsupported opcode: isBranch/isIndirectBranch";
   if (InstrDesc.isCall() || InstrDesc.isReturn())
     return "Unsupported opcode: isCall/isReturn";
+  if (InstrDesc.hasNoSchedulingInfo())
+    return "Unsupported opcode: hasNoSchedulingInfo";
   return nullptr;
 }
 
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index e72055b0b5037..06113cff3a350 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -1199,6 +1199,8 @@ void InstrInfoEmitter::emitRecord(
     OS << "|(1ULL<<MCID::VariadicOpsAreDefs)";
   if (Inst.isAuthenticated)
     OS << "|(1ULL<<MCID::Authenticated)";
+  if (Inst.hasNoSchedulingInfo)
+    OS << "|(1ULL<<MCID::HasNoSchedulingInfo)";
 
   // Emit all of the target-specific flags...
   const BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags");

>From e4fb24f746d228e2b427e719619bb7a598d93373 Mon Sep 17 00:00:00 2001
From: Jim Lin <jim at andestech.com>
Date: Fri, 13 Jun 2025 12:33:38 +0800
Subject: [PATCH 2/2] Check instruction by MCInstrDesc::getSchedClass() == 0
 and add testcase

---
 llvm/include/llvm/MC/MCInstrDesc.h                       | 6 ------
 llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.s | 3 +++
 llvm/tools/llvm-exegesis/lib/Target.cpp                  | 4 ++--
 llvm/utils/TableGen/InstrInfoEmitter.cpp                 | 2 --
 4 files changed, 5 insertions(+), 10 deletions(-)
 create mode 100644 llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.s

diff --git a/llvm/include/llvm/MC/MCInstrDesc.h b/llvm/include/llvm/MC/MCInstrDesc.h
index 69d8e03fb79bd..8c70925d4780e 100644
--- a/llvm/include/llvm/MC/MCInstrDesc.h
+++ b/llvm/include/llvm/MC/MCInstrDesc.h
@@ -188,7 +188,6 @@ enum Flag {
   Trap,
   VariadicOpsAreDefs,
   Authenticated,
-  HasNoSchedulingInfo,
 };
 } // namespace MCID
 
@@ -431,11 +430,6 @@ class MCInstrDesc {
     return Flags & (1ULL << MCID::Authenticated);
   }
 
-  /// Return true if this instruction has no scheduling info.
-  bool hasNoSchedulingInfo() const {
-    return Flags & (1ULL << MCID::HasNoSchedulingInfo);
-  }
-
   //===--------------------------------------------------------------------===//
   // Side Effect Analysis
   //===--------------------------------------------------------------------===//
diff --git a/llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.s b/llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.s
new file mode 100644
index 0000000000000..fcf3b8f5463d4
--- /dev/null
+++ b/llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.s
@@ -0,0 +1,3 @@
+# RUN: llvm-exegesis -mtriple=riscv64-unknown-linux-gnu -mcpu=generic --benchmark-phase=assemble-measured-code -mode=inverse_throughput -opcode-name=InsnB 2>&1 | FileCheck %s
+
+CHECK: Unsupported opcode: No Sched Class
diff --git a/llvm/tools/llvm-exegesis/lib/Target.cpp b/llvm/tools/llvm-exegesis/lib/Target.cpp
index 9eb8f4d11bfb3..fc5f82f288ae4 100644
--- a/llvm/tools/llvm-exegesis/lib/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Target.cpp
@@ -45,8 +45,8 @@ ExegesisTarget::getIgnoredOpcodeReasonOrNull(const LLVMState &State,
     return "Unsupported opcode: isBranch/isIndirectBranch";
   if (InstrDesc.isCall() || InstrDesc.isReturn())
     return "Unsupported opcode: isCall/isReturn";
-  if (InstrDesc.hasNoSchedulingInfo())
-    return "Unsupported opcode: hasNoSchedulingInfo";
+  if (InstrDesc.getSchedClass() == 0)
+    return "Unsupported opcode: No Sched Class";
   return nullptr;
 }
 
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 06113cff3a350..e72055b0b5037 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -1199,8 +1199,6 @@ void InstrInfoEmitter::emitRecord(
     OS << "|(1ULL<<MCID::VariadicOpsAreDefs)";
   if (Inst.isAuthenticated)
     OS << "|(1ULL<<MCID::Authenticated)";
-  if (Inst.hasNoSchedulingInfo)
-    OS << "|(1ULL<<MCID::HasNoSchedulingInfo)";
 
   // Emit all of the target-specific flags...
   const BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags");



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