[llvm] [AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is enabled (PR #144968)
Shilei Tian via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 19 19:12:53 PDT 2025
================
@@ -66,7 +66,23 @@ void GCNRegPressure::inc(unsigned Reg,
Value[TupleIdx] += Sign * TRI->getRegClassWeight(RC).RegWeight;
}
// Pressure scales with number of new registers covered by the new mask.
- Sign *= SIRegisterInfo::getNumCoveredRegs(~PrevMask & NewMask);
+ // Note that, when true16 is enabled, we can no longer use the following
+ // code to calculate the difference of number of 32-bit registers between
+ // the two mask:
+ //
+ // Sign *= SIRegisterInfo::getNumCoveredRegs(~PrevMask & NewMask);
+ //
+ // The reason is, the new mask `~PrevMask & NewMask` doesn't treat a 16-bit
+ // register use as a whole 32-bit register use.
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shiltian wrote:
`getNumCoveredRegs` is not the issue here. `~PrevMask & NewMask` is and it doesn't account for 16-bit use.
https://github.com/llvm/llvm-project/pull/144968
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