[llvm] [AMDGPU] Optimize rotate instruction selection patterns (PR #143551)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 19 06:58:59 PDT 2025
================
@@ -3610,6 +3610,26 @@ bool AMDGPUDAGToDAGISel::SelectSWMMACIndex16(SDValue In, SDValue &Src,
return true;
}
+bool AMDGPUDAGToDAGISel::SelectImmSub(SDValue In, SDValue &Src,
+ SDValue &InvSrc) const {
+ Src = In;
+
+ // Handle constant operands
+ ConstantSDNode *ImmVal = dyn_cast<ConstantSDNode>(In);
+ if (ImmVal)
+ InvSrc = CurDAG->getTargetConstant(32 - ImmVal->getZExtValue(), SDLoc(In),
+ MVT::i32);
+ else {
+ // Fallback: generate SUB instruction for non-constant, non-negation cases
----------------
arsenm wrote:
You can let the ordinary pattern do its job, you can fail and let the ordinary select pattern hit
https://github.com/llvm/llvm-project/pull/143551
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