[llvm] [RISCV] Switch to sign-extended loads if possible in RISCVOptWInstrs (PR #144703)

[Craig Topper via llvm-commits]

topperc wrote:

I think changing LWU->LW is useful for compression and minimizing RV32/RV64 delta.

I'm skeptical that LWU->LW and LHU->LH will help us match gcc better. Here are trivial examples where LLVM used LH/LW and gcc used LHU/LWU. https://godbolt.org/z/cbje4aT7P I guess it could be better on average, but it certainly doesn't guarantee a match to gcc.

https://github.com/llvm/llvm-project/pull/144703