[llvm] [X86] X86LegalizerInfo - use LegalFor instead if LegalIf for simple ISA/test pairs (PR #144675)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 19 09:40:31 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Dipesh Sharma (dipeshs809)
<details>
<summary>Changes</summary>
We have lots of `legalIf to` evaluate the legality of instructions based on predicate's truthfulness, which should be simplified to use the `legalFor({Types})` or `legalFor(Pred, {Types})` helpers:
closes #<!-- -->138259
for eg:
```
getActionDefinitionsBuilder({G_ADD, G_SUB})
.legalIf([=](const LegalityQuery &Query) -> bool {
if (typeInSet(0, {s8, s16, s32})(Query))
return true;
if (Is64Bit && typeInSet(0, {s64})(Query))
return true;
if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query))
return true;
if (HasAVX2 && typeInSet(0, {v32s8, v16s16, v8s32, v4s64})(Query))
return true;
if (HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query))
return true;
if (HasBWI && typeInSet(0, {v64s8, v32s16})(Query))
return true;
return false;
})
```
gets transformed to:
```
getActionDefinitionsBuilder({G_ADD, G_SUB})
.legalFor({s8, s16, s32})
.legalFor(Is64Bit, {s64})
.legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
--- etc ---
```
---
Patch is 23.41 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/144675.diff
7 Files Affected:
- (modified) CODE_OF_CONDUCT.md (+3-2)
- (modified) CONTRIBUTING.md (+1-1)
- (modified) LICENSE.TXT (+27-22)
- (modified) README.md (+1-1)
- (modified) SECURITY.md (+1-1)
- (modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+92-166)
- (modified) pyproject.toml (+1-5)
``````````diff
diff --git a/CODE_OF_CONDUCT.md b/CODE_OF_CONDUCT.md
index 0c653c0601520..5c441ae466823 100644
--- a/CODE_OF_CONDUCT.md
+++ b/CODE_OF_CONDUCT.md
@@ -1,3 +1,4 @@
-# Code of Conduct
+#Code of Conduct
-The LLVM Community Code of Conduct can be found at https://llvm.org/docs/CodeOfConduct.html.
+The LLVM Community Code of Conduct can be found at https
+ : // llvm.org/docs/CodeOfConduct.html.
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 646d709a694d4..64b5ef4c71195 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -1,4 +1,4 @@
-# Contributing to LLVM
+#Contributing to LLVM
Thank you for your interest in contributing to LLVM! There are many ways to
contribute, and we appreciate all contributions.
diff --git a/LICENSE.TXT b/LICENSE.TXT
index fa6ac54000703..65d396a4cff96 100644
--- a/LICENSE.TXT
+++ b/LICENSE.TXT
@@ -81,8 +81,9 @@ The LLVM Project is under the Apache License v2.0 with LLVM Exceptions:
use, offer to sell, sell, import, and otherwise transfer the Work,
where such license applies only to those patent claims licensable
by such Contributor that are necessarily infringed by their
- Contribution(s) alone or by combination of their Contribution(s)
- with the Work to which such Contribution(s) was submitted. If You
+ Contribution(s)
+alone or by combination of their Contribution(s)
+with the Work to which such Contribution(s) was submitted. If You
institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the Work
or a Contribution incorporated within the Work constitutes direct
@@ -96,25 +97,30 @@ The LLVM Project is under the Apache License v2.0 with LLVM Exceptions:
meet the following conditions:
(a) You must give any other recipients of the Work or
- Derivative Works a copy of this License; and
-
- (b) You must cause any modified files to carry prominent notices
- stating that You changed the files; and
-
- (c) You must retain, in the Source form of any Derivative Works
- that You distribute, all copyright, patent, trademark, and
- attribution notices from the Source form of the Work,
- excluding those notices that do not pertain to any part of
- the Derivative Works; and
-
- (d) If the Work includes a "NOTICE" text file as part of its
- distribution, then any Derivative Works that You distribute must
- include a readable copy of the attribution notices contained
- within such NOTICE file, excluding those notices that do not
- pertain to any part of the Derivative Works, in at least one
- of the following places: within a NOTICE text file distributed
- as part of the Derivative Works; within the Source form or
- documentation, if provided along with the Derivative Works; or,
+ Derivative Works a copy of this License;
+and
+
+ (b) You must cause any modified files to carry prominent notices stating
+ that You changed the files;
+and
+
+ (c) You must retain,
+ in the Source form of any Derivative Works that You distribute,
+ all copyright, patent, trademark,
+ and attribution notices from the Source form of the Work,
+ excluding those notices that
+ do not pertain to any part of the Derivative Works;
+and
+
+ (d) If the Work includes a "NOTICE" text file as part of its distribution,
+ then any Derivative Works that You distribute must include a readable copy
+ of the attribution notices contained within such NOTICE file,
+ excluding those notices that
+ do not pertain to any part of the Derivative Works,
+ in at least one of the following places
+ : within a NOTICE text file distributed as part of the Derivative Works;
+within the Source form or documentation,
+ if provided along with the Derivative Works; or,
within a display generated by the Derivative Works, if and
wherever such third-party notices normally appear. The contents
of the NOTICE file are for informational purposes only and
@@ -276,4 +282,3 @@ CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
SOFTWARE.
-
diff --git a/README.md b/README.md
index a9b29ecbc1a3a..21b0819b5e25c 100644
--- a/README.md
+++ b/README.md
@@ -1,4 +1,4 @@
-# The LLVM Compiler Infrastructure
+#The LLVM Compiler Infrastructure
[](https://securityscorecards.dev/viewer/?uri=github.com/llvm/llvm-project)
[](https://www.bestpractices.dev/projects/8273)
diff --git a/SECURITY.md b/SECURITY.md
index f6a5e6c016291..2eb644ee41ddf 100644
--- a/SECURITY.md
+++ b/SECURITY.md
@@ -1,4 +1,4 @@
-# Reporting LLVM Security Issues
+#Reporting LLVM Security Issues
To report security issues in LLVM, please follow the steps outlined on the
[LLVM Security Group](https://llvm.org/docs/Security.html#how-to-report-a-security-issue)
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 11dd05c584983..54857b1836ddd 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -43,6 +43,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
bool HasDQI = Subtarget.hasAVX512() && Subtarget.hasDQI();
bool HasBWI = Subtarget.hasAVX512() && Subtarget.hasBWI();
bool UseX87 = !Subtarget.useSoftFloat() && Subtarget.hasX87();
+ bool HasPOPCNT = Subtarget.hasPOPCNT();
+ bool HasLZCNT = Subtarget.hasLZCNT();
const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0));
const LLT s1 = LLT::scalar(1);
@@ -56,7 +58,6 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
const LLT v2s32 = LLT::fixed_vector(2, 32);
const LLT v4s8 = LLT::fixed_vector(4, 8);
-
const LLT v16s8 = LLT::fixed_vector(16, 8);
const LLT v8s16 = LLT::fixed_vector(8, 16);
const LLT v4s32 = LLT::fixed_vector(4, 32);
@@ -83,19 +84,15 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// implicit/constants
getActionDefinitionsBuilder(G_IMPLICIT_DEF)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- // 32/64-bits needs support for s64/s128 to handle cases:
- // s64 = EXTEND (G_IMPLICIT_DEF s32) -> s64 = G_IMPLICIT_DEF
- // s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
- return typeInSet(0, {p0, s1, s8, s16, s32, s64})(Query) ||
- (Is64Bit && typeInSet(0, {s128})(Query));
- });
+ .legalFor({p0, s1, s8, s16, s32, s64})
+ .legalFor(Is64Bit, {s128});
+ // 32/64-bits needs support for s64/s128 to handle cases:
+ // s64 = EXTEND (G_IMPLICIT_DEF s32) -> s64 = G_IMPLICIT_DEF
+ // s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
getActionDefinitionsBuilder(G_CONSTANT)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typeInSet(0, {p0, s8, s16, s32})(Query) ||
- (Is64Bit && typeInSet(0, {s64})(Query));
- })
+ .legalFor({p0, s8, s16, s32})
+ .legalFor(Is64Bit, {s64})
.widenScalarToNextPow2(0, /*Min=*/8)
.clampScalar(0, s8, sMaxScalar);
@@ -147,21 +144,12 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// integer addition/subtraction
getActionDefinitionsBuilder({G_ADD, G_SUB})
- .legalIf([=](const LegalityQuery &Query) -> bool {
- if (typeInSet(0, {s8, s16, s32})(Query))
- return true;
- if (Is64Bit && typeInSet(0, {s64})(Query))
- return true;
- if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query))
- return true;
- if (HasAVX2 && typeInSet(0, {v32s8, v16s16, v8s32, v4s64})(Query))
- return true;
- if (HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query))
- return true;
- if (HasBWI && typeInSet(0, {v64s8, v32s16})(Query))
- return true;
- return false;
- })
+ .legalFor({s8, s16, s32})
+ .legalFor(Is64Bit, {s64})
+ .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
+ .legalFor(HasAVX2, {v32s8, v16s16, v8s32, v4s64})
+ .legalFor(HasAVX512, {v16s32, v8s64})
+ .legalFor(HasBWI, {v64s8, v32s16})
.clampMinNumElements(0, s8, 16)
.clampMinNumElements(0, s16, 8)
.clampMinNumElements(0, s32, 4)
@@ -175,10 +163,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.scalarize(0);
getActionDefinitionsBuilder({G_UADDE, G_UADDO, G_USUBE, G_USUBO})
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typePairInSet(0, 1, {{s8, s1}, {s16, s1}, {s32, s1}})(Query) ||
- (Is64Bit && typePairInSet(0, 1, {{s64, s1}})(Query));
- })
+ .legalFor({{s8, s1}, {s16, s1}, {s32, s1}})
+ .legalFor(Is64Bit, {{s64, s1}})
.widenScalarToNextPow2(0, /*Min=*/32)
.clampScalar(0, s8, sMaxScalar)
.clampScalar(1, s1, s1)
@@ -186,27 +172,15 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// integer multiply
getActionDefinitionsBuilder(G_MUL)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- if (typeInSet(0, {s8, s16, s32})(Query))
- return true;
- if (Is64Bit && typeInSet(0, {s64})(Query))
- return true;
- if (HasSSE2 && typeInSet(0, {v8s16})(Query))
- return true;
- if (HasSSE41 && typeInSet(0, {v4s32})(Query))
- return true;
- if (HasAVX2 && typeInSet(0, {v16s16, v8s32})(Query))
- return true;
- if (HasAVX512 && typeInSet(0, {v16s32})(Query))
- return true;
- if (HasDQI && typeInSet(0, {v8s64})(Query))
- return true;
- if (HasDQI && HasVLX && typeInSet(0, {v2s64, v4s64})(Query))
- return true;
- if (HasBWI && typeInSet(0, {v32s16})(Query))
- return true;
- return false;
- })
+ .legalFor({s8, s16, s32})
+ .legalFor(Is64Bit, {s64})
+ .legalFor(HasSSE2, {v8s16})
+ .legalFor(HasSSE41, {v4s32})
+ .legalFor(HasAVX2, {v16s16, v8s32})
+ .legalFor(HasAVX512, {v16s32})
+ .legalFor(HasDQI, {v8s64})
+ .legalFor(HasDQI && HasVLX, {v2s64, v4s64})
+ .legalFor(HasBWI, {v32s16})
.clampMinNumElements(0, s16, 8)
.clampMinNumElements(0, s32, 4)
.clampMinNumElements(0, s64, HasVLX ? 2 : 8)
@@ -218,47 +192,33 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.scalarize(0);
getActionDefinitionsBuilder({G_SMULH, G_UMULH})
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typeInSet(0, {s8, s16, s32})(Query) ||
- (Is64Bit && typeInSet(0, {s64})(Query));
- })
+ .legalFor({s8, s16, s32})
+ .legalFor(Is64Bit, {s64})
.widenScalarToNextPow2(0, /*Min=*/32)
.clampScalar(0, s8, sMaxScalar)
.scalarize(0);
// integer divisions
getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UDIV, G_UREM})
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typeInSet(0, {s8, s16, s32})(Query) ||
- (Is64Bit && typeInSet(0, {s64})(Query));
- })
+ .legalFor({s8, s16, s32})
+ .legalFor(Is64Bit, {s64})
.libcallFor({s64})
.clampScalar(0, s8, sMaxScalar);
// integer shifts
getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR})
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typePairInSet(0, 1, {{s8, s8}, {s16, s8}, {s32, s8}})(Query) ||
- (Is64Bit && typePairInSet(0, 1, {{s64, s8}})(Query));
- })
+ .legalFor({{s8, s8}, {s16, s8}, {s32, s8}})
+ .legalFor(Is64Bit, {{s64, s8}})
.clampScalar(0, s8, sMaxScalar)
.clampScalar(1, s8, s8);
// integer logic
getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
- .legalIf([=](const LegalityQuery &Query) -> bool {
- if (typeInSet(0, {s8, s16, s32})(Query))
- return true;
- if (Is64Bit && typeInSet(0, {s64})(Query))
- return true;
- if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query))
- return true;
- if (HasAVX && typeInSet(0, {v32s8, v16s16, v8s32, v4s64})(Query))
- return true;
- if (HasAVX512 && typeInSet(0, {v64s8, v32s16, v16s32, v8s64})(Query))
- return true;
- return false;
- })
+ .legalFor({s8, s16, s32})
+ .legalFor(Is64Bit, {s64})
+ .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
+ .legalFor(HasAVX, {v32s8, v16s16, v8s32, v4s64})
+ .legalFor(HasAVX512, {v64s8, v32s16, v16s32, v8s64})
.clampMinNumElements(0, s8, 16)
.clampMinNumElements(0, s16, 8)
.clampMinNumElements(0, s32, 4)
@@ -282,31 +242,23 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// bswap
getActionDefinitionsBuilder(G_BSWAP)
- .legalIf([=](const LegalityQuery &Query) {
- return Query.Types[0] == s32 ||
- (Subtarget.is64Bit() && Query.Types[0] == s64);
- })
+ .legalFor({s32})
+ .legalFor(Is64Bit, {s64})
.widenScalarToNextPow2(0, /*Min=*/32)
.clampScalar(0, s32, sMaxScalar);
// popcount
getActionDefinitionsBuilder(G_CTPOP)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return Subtarget.hasPOPCNT() &&
- (typePairInSet(0, 1, {{s16, s16}, {s32, s32}})(Query) ||
- (Is64Bit && typePairInSet(0, 1, {{s64, s64}})(Query)));
- })
+ .legalFor(HasPOPCNT, {{s16, s16}, {s32, s32}})
+ .legalFor(Is64Bit, {{s64, s64}})
.widenScalarToNextPow2(1, /*Min=*/16)
.clampScalar(1, s16, sMaxScalar)
.scalarSameSizeAs(0, 1);
// count leading zeros (LZCNT)
getActionDefinitionsBuilder(G_CTLZ)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return Subtarget.hasLZCNT() &&
- (typePairInSet(0, 1, {{s16, s16}, {s32, s32}})(Query) ||
- (Is64Bit && typePairInSet(0, 1, {{s64, s64}})(Query)));
- })
+ .legalFor(HasLZCNT, {{s16, s16}, {s32, s32}})
+ .legalFor(Is64Bit, {{s64, s64}})
.widenScalarToNextPow2(1, /*Min=*/16)
.clampScalar(1, s16, sMaxScalar)
.scalarSameSizeAs(0, 1);
@@ -324,15 +276,12 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// control flow
getActionDefinitionsBuilder(G_PHI)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typeInSet(0, {s8, s16, s32, p0})(Query) ||
- (UseX87 && typeIs(0, s80)(Query)) ||
- (Is64Bit && typeIs(0, s64)(Query)) ||
- (HasSSE1 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) ||
- (HasAVX && typeInSet(0, {v32s8, v16s16, v8s32, v4s64})(Query)) ||
- (HasAVX512 &&
- typeInSet(0, {v64s8, v32s16, v16s32, v8s64})(Query));
- })
+ .legalFor({s8, s16, s32, p0})
+ .legalFor(UseX87, {s80})
+ .legalFor(Is64Bit, {s64})
+ .legalFor(HasSSE1, {v16s8, v8s16, v4s32, v2s64})
+ .legalFor(HasAVX, {v32s8, v16s16, v8s32, v4s64})
+ .legalFor(HasAVX512, {v64s8, v32s16, v16s32, v8s64})
.clampMinNumElements(0, s8, 16)
.clampMinNumElements(0, s16, 8)
.clampMinNumElements(0, s32, 4)
@@ -361,10 +310,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
getActionDefinitionsBuilder(G_CONSTANT_POOL).legalFor({p0});
getActionDefinitionsBuilder(G_PTR_ADD)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return typePairInSet(0, 1, {{p0, s32}})(Query) ||
- (Is64Bit && typePairInSet(0, 1, {{p0, s64}})(Query));
- })
+ .legalFor({{p0, s32}})
+ .legalFor(Is64Bit, {{p0, s64}})
.widenScalarToNextPow2(1, /*Min*/ 32)
.clampScalar(1, s32, sMaxScalar);
@@ -423,13 +370,11 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
for (unsigned Op : {G_SEXTLOAD, G_ZEXTLOAD}) {
auto &Action = getActionDefinitionsBuilder(Op);
- Action.legalForTypesWithMemDesc({{s16, p0, s8, 1},
- {s32, p0, s8, 1},
- {s32, p0, s16, 1}});
+ Action.legalForTypesWithMemDesc(
+ {{s16, p0, s8, 1}, {s32, p0, s8, 1}, {s32, p0, s16, 1}});
if (Is64Bit)
- Action.legalForTypesWithMemDesc({{s64, p0, s8, 1},
- {s64, p0, s16, 1},
- {s64, p0, s32, 1}});
+ Action.legalForTypesWithMemDesc(
+ {{s64, p0, s8, 1}, {s64, p0, s16, 1}, {s64, p0, s32, 1}});
// TODO - SSE41/AVX2/AVX512F/AVX512BW vector extensions
}
@@ -437,8 +382,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
.legalIf([=](const LegalityQuery &Query) {
return typeInSet(0, {s8, s16, s32})(Query) ||
- (Query.Opcode == G_ANYEXT && Query.Types[0] == s128) ||
- (Is64Bit && Query.Types[0] == s64);
+ (Query.Opcode == G_ANYEXT && Query.Types[0] == s128) ||
+ (Is64Bit && Query.Types[0] == s64);
})
.widenScalarToNextPow2(0, /*Min=*/8)
.clampScalar(0, s8, sMaxScalar)
@@ -450,21 +395,17 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// fp constants
getActionDefinitionsBuilder(G_FCONSTANT)
- .legalIf([=](const LegalityQuery &Query) -> bool {
- return (typeInSet(0, {s32, s64})(Query)) ||
- (UseX87 && typeInSet(0, {s80})(Query));
- });
+ .legalFor({s32, s64})
+ .legalFor(UseX87, {s80});
// fp arithmetic
getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
- .legalIf([=](const LegalityQuery &Query) {
- return (typeInSet(0, {s32, s64})(Query)) ||
- (HasSSE1 && typeInSet(0, {v4s32})(Query)) ||
- (HasSSE2 && typeInSet(0, {v2s64})(Query)) ||
- (HasAVX && typeInSet(0, {v8s32, v4s64})(Query)) ||
- (HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query)) ||
- (UseX87 && typeInSet(0, {s80})(Query));
- });
+ .legalFor({s32, s64})
+ .legalFor(HasSSE1, {v4s32})
+ .legalFor(HasSSE2, {v2s64})
+ .legalFor(HasAVX, {v8s32, v4s64})
+ .legalFor(HasAVX512, {v16s32, v8s64})
+ .legalFor(UseX87, {s80});
// fp comparison
getActionDefinitionsBuilder(G_FCMP)
@@ -476,18 +417,15 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.widenScalarToNextPow2(1);
// fp conversions
- getActionDefinitionsBuilder(G_FPEXT).legalIf([=](const LegalityQuery &Query) {
- return (HasSSE2 && typePairInSet(0, 1, {{s64, s32}})(Query)) ||
- (HasAVX && typePairInSet(0, 1, {{v4s64, v4s32}})(Query)) ||
- (HasAVX512 && typePairInSet(0, 1, {{v8s64, v8s32}})(Query));
- });
-
- getActionDefinitionsBuilder(G_FPTRUNC).legalIf(
- [=](const LegalityQuery &Query) {
- return (HasSSE2 && typePairInSet(0, 1, {{s32, s64}})(Query)) ||
- (HasAVX && typePairInSet(0, 1, {{v4s32, v4s64}})(Query)) ||
- (HasAVX512 && typePairInSet(0, 1, {{v8s32, v8s64}})(Query));
- });
+ getActionDefinitionsBuilder(G_FPEXT)
+ .legalFor(HasSSE2, {{s64, s32}})
+ .legalFor(HasAVX, {{v4s64, v4s32}})
+ .legalFor(HasAVX512, {{v8s64, v8s32}});
+
+ getActionDefinitionsBuilder(G_FPTRUNC)
+ .legalFor(HasSSE2, {{s32, s64}})
+ .legalFor(HasAVX, {{v4s32, v4s64}})
+ .legalFor(HasAVX512, {{v8s32, v8s64}});
getActionDefinitionsBuilder(G_SITOFP)
.legalFor(HasSSE1, {{s32, s32}})
@@ -519,10 +457,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
// For AVX512 we simply widen types as there is direct mapping from opcodes
// to asm instructions.
getActionDefinitionsBuilder(G_UITOFP)
- .legalIf([=](const LegalityQuery &Query) {
- return HasAVX512 && typeInSet(0, {s32, s64})(Query) &&
- typeInSet(1, {s32, s64})(Query);
- })
+ .legalFor(HasAVX512, {{s32, s32}, {s32, s64}, {s64, s32}, {s64, s64}})
.customIf([=](const LegalityQuery &Query) {
return !HasAVX512 &&
...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/144675
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