[llvm] [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (PR #144152)

[Tomer Shafir via llvm-commits]

tomershafir wrote:

v2:

commit 1: bb47589b1b21f0bd74ff14e47c9328114fb305e0
* Add 2 subtarget features for FPR64, FPR32 zero cycle copy, and add `FeatureZCRegMovFPR64` to Apple processors

commit 2: 7c0a52625d177f496f3488254fc7370c72c664f3
* Emit 0-cycle instructions where possible
* Add a single regression test with 2 internal function variants
* Expand `-march=arm64` test case into `-mtriple=arm64-linux-gnu` and `-mtriple=arm64-apple-macosx -mcpu=generic`

I will fix the existing `HasZeroCycleRegMov` in a followup patch.

https://github.com/llvm/llvm-project/pull/144152