[llvm] [AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 (PR #142354)

Shilei Tian via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 16 08:36:04 PDT 2025


================
@@ -4727,29 +4732,45 @@ SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,
   SDValue True = N->getOperand(1);
   SDValue False = N->getOperand(2);
 
-  if (Cond.hasOneUse()) { // TODO: Look for multiple select uses.
+  int ShouldSwap = 0;
+  for (auto *User : Cond->users()) {
+
+    if (User->getOpcode() != ISD::SELECT) {
+      ShouldSwap = 0;
+      break;
+    }
+
+    auto Op1 = User->getOperand(1);
+    auto Op2 = User->getOperand(2);
+
+    // if the operand is defined by fneg or fabs it means the instruction
+    // will have source modifiers and therefore can't be shrinked to vop2
+    if (isFnegOrFabs(Op1) || isFnegOrFabs(Op2))
+      continue;
+
+    ShouldSwap += Op2->isDivergent() - Op1->isDivergent();
----------------
shiltian wrote:

Is this logic sound? What if you get a `0-1`?

https://github.com/llvm/llvm-project/pull/142354


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