[llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)

[Pengcheng Wang via llvm-commits]

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@@ -2655,6 +2655,86 @@ void RISCVInstrInfo::genAlternativeCodeSequence(
   }
 }
 
+int RISCVInstrInfo::getOverlapConstraintsFromMI(uint16_t RVVPseudoOpcode) {
+  const RISCVVPseudosTable::PseudoInfo *RVV =
+      RISCVVPseudosTable::getPseudoInfo(RVVPseudoOpcode);
+
+  if (!RVV)
+    return 0;
+
+  return RVV->TargetOverlapConstraintType;
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wangpc-pp wrote:

Can this be stored in TSFlags?

https://github.com/llvm/llvm-project/pull/145004