[llvm] f280d3b - AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (#145173)

via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 21 16:19:23 PDT 2025


Author: Matt Arsenault
Date: 2025-06-22T08:19:19+09:00
New Revision: f280d3b705de7f94ef9756e3ef2842b415a7c038

URL: https://github.com/llvm/llvm-project/commit/f280d3b705de7f94ef9756e3ef2842b415a7c038
DIFF: https://github.com/llvm/llvm-project/commit/f280d3b705de7f94ef9756e3ef2842b415a7c038.diff

LOG: AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (#145173)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 3281eabcd4adb..b9023b6d7a3a6 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -4481,6 +4481,8 @@ SDValue SITargetLowering::lowerSET_FPENV(SDValue Op, SelectionDAG &DAG) const {
 
 Register SITargetLowering::getRegisterByName(const char *RegName, LLT VT,
                                              const MachineFunction &MF) const {
+  const Function &Fn = MF.getFunction();
+
   Register Reg = StringSwitch<Register>(RegName)
                      .Case("m0", AMDGPU::M0)
                      .Case("exec", AMDGPU::EXEC)
@@ -4498,8 +4500,8 @@ Register SITargetLowering::getRegisterByName(const char *RegName, LLT VT,
 
   if (!Subtarget->hasFlatScrRegister() &&
       Subtarget->getRegisterInfo()->regsOverlap(Reg, AMDGPU::FLAT_SCR)) {
-    report_fatal_error(Twine("invalid register \"" + StringRef(RegName) +
-                             "\" for subtarget."));
+    Fn.getContext().emitError(Twine("invalid register \"" + StringRef(RegName) +
+                                    "\" for subtarget."));
   }
 
   switch (Reg) {

diff  --git a/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll b/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
index 0e9ea0c341cd3..a91bba41bed4f 100644
--- a/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
+++ b/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
@@ -1,6 +1,6 @@
-; RUN: not --crash llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
 
-; CHECK: invalid register "flat_scratch_lo" for subtarget.
+; CHECK: error: invalid register "flat_scratch_lo" for subtarget.
 
 declare i32 @llvm.read_register.i32(metadata) #0
 


        


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