[llvm] 958dc86 - [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (#145084)

[via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2025-06-20T12:21:45-07:00
New Revision: 958dc8602651261f8285b59d352a1c4b4da2e90c

URL: https://github.com/llvm/llvm-project/commit/958dc8602651261f8285b59d352a1c4b4da2e90c
DIFF: https://github.com/llvm/llvm-project/commit/958dc8602651261f8285b59d352a1c4b4da2e90c.diff

LOG: [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 (#145084)

No tests yet, but it will allow further tests not to be
polluted with these waits.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp b/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
index d2de494a23ef7..3212060f303a5 100644
--- a/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
@@ -2272,8 +2272,10 @@ bool SIGfx12CacheControl::insertWaitsBeforeSystemScopeStore(
   const DebugLoc &DL = MI->getDebugLoc();
 
   BuildMI(MBB, MI, DL, TII->get(S_WAIT_LOADCNT_soft)).addImm(0);
-  BuildMI(MBB, MI, DL, TII->get(S_WAIT_SAMPLECNT_soft)).addImm(0);
-  BuildMI(MBB, MI, DL, TII->get(S_WAIT_BVHCNT_soft)).addImm(0);
+  if (ST.hasImageInsts()) {
+    BuildMI(MBB, MI, DL, TII->get(S_WAIT_SAMPLECNT_soft)).addImm(0);
+    BuildMI(MBB, MI, DL, TII->get(S_WAIT_BVHCNT_soft)).addImm(0);
+  }
   BuildMI(MBB, MI, DL, TII->get(S_WAIT_KMCNT_soft)).addImm(0);
   BuildMI(MBB, MI, DL, TII->get(S_WAIT_STORECNT_soft)).addImm(0);