[llvm] [LICM] Hoisting writeonly calls (PR #143799)
Jiachen Wang via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 16 11:02:10 PDT 2025
WanderingAura wrote:
It looks like a writeonly function is getting hoisting in CodeGen/AMDGPU/loop_exit_with_xor.ll and I'm not sure if it's incorrect behaviour.
https://github.com/llvm/llvm-project/blob/267b859fc60acda510027bd6139c54d660c6fb21/llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll#L59-L93
The call @llvm.amdgcn.raw.ptr.buffer.store.f32(float poison, ptr addrspace(8) poison, i32 0, i32 poison, i32 0) seems to be getting hoisted. Does anyone know if this is legal behaviour?
Below is the failed CI logs:
```
2025-06-16T08:20:15.7502444Z Check file: /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
2025-06-16T08:20:15.7503881Z
2025-06-16T08:20:15.7504165Z -dump-input=help explains the following input dump.
2025-06-16T08:20:15.7504657Z
2025-06-16T08:20:15.7504821Z Input was:
2025-06-16T08:20:15.7505247Z <<<<<<
2025-06-16T08:20:15.7505624Z .
2025-06-16T08:20:15.7506041Z .
2025-06-16T08:20:15.7506423Z .
2025-06-16T08:20:15.7506833Z 57: .type doesnt_need_and, at function
2025-06-16T08:20:15.7507493Z 58: doesnt_need_and: ; @doesnt_need_and
2025-06-16T08:20:15.7508167Z 59: ; %bb.0: ; %entry
2025-06-16T08:20:15.7509005Z 60: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2025-06-16T08:20:15.7509683Z 61: buffer_store_dword v0, off, s[4:7], s4
2025-06-16T08:20:15.7510378Z 62: s_mov_b32 s6, 0
2025-06-16T08:20:15.7511008Z next:67 !~~~~~~~~~~~~~~ error: match on wrong line
2025-06-16T08:20:15.7511636Z 63: s_mov_b64 s[4:5], 0
2025-06-16T08:20:15.7512474Z 64: .LBB1_1: ; %loop
2025-06-16T08:20:15.7513130Z 65: ; =>This Inner Loop Header: Depth=1
2025-06-16T08:20:15.7513783Z 66: s_add_i32 s6, s6, 1
2025-06-16T08:20:15.7514405Z 67: v_cmp_le_u32_e32 vcc, s6, v0
2025-06-16T08:20:15.7515002Z .
2025-06-16T08:20:15.7515394Z .
2025-06-16T08:20:15.7515781Z .
2025-06-16T08:20:15.7516173Z >>>>>>
```
https://github.com/llvm/llvm-project/pull/143799
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