[llvm] 8747736 - [SLP] NFC: Simplify CandidateVFs initialization (#144882)
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Fri Jun 20 02:00:58 PDT 2025
Author: Sander de Smalen
Date: 2025-06-20T10:00:55+01:00
New Revision: 874773635d31501ab21812c05c44caf281c1acc7
URL: https://github.com/llvm/llvm-project/commit/874773635d31501ab21812c05c44caf281c1acc7
DIFF: https://github.com/llvm/llvm-project/commit/874773635d31501ab21812c05c44caf281c1acc7.diff
LOG: [SLP] NFC: Simplify CandidateVFs initialization (#144882)
Also adds a comment to clarify the meaning of MaxRegVF.
Added:
Modified:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 5eef2497cf90b..1141c1b2babbf 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -21198,7 +21198,11 @@ bool SLPVectorizerPass::vectorizeStores(
}
}
+ // MaxRegVF represents the number of instructions (scalar, or vector in
+ // case of revec) that can be vectorized to naturally fit in a vector
+ // register.
unsigned MaxRegVF = MaxVF;
+
MaxVF = std::min<unsigned>(MaxVF, bit_floor(Operands.size()));
if (MaxVF < MinVF) {
LLVM_DEBUG(dbgs() << "SLP: Vectorization infeasible as MaxVF (" << MaxVF
@@ -21207,13 +21211,11 @@ bool SLPVectorizerPass::vectorizeStores(
continue;
}
- unsigned Sz = 1 + Log2_32(MaxVF) - Log2_32(MinVF);
- SmallVector<unsigned> CandidateVFs(Sz + (NonPowerOf2VF > 0 ? 1 : 0));
- unsigned Size = MinVF;
- for (unsigned &VF : reverse(CandidateVFs)) {
- VF = Size > MaxVF ? NonPowerOf2VF : Size;
- Size *= 2;
- }
+ SmallVector<unsigned> CandidateVFs;
+ for (unsigned VF = std::max(MaxVF, NonPowerOf2VF); VF >= MinVF;
+ VF = divideCeil(VF, 2))
+ CandidateVFs.push_back(VF);
+
unsigned End = Operands.size();
unsigned Repeat = 0;
constexpr unsigned MaxAttempts = 4;
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