[llvm] [WebAssembly] Fix missed optimization in 50142 (PR #144741)

[Luke Lau via llvm-commits]

================
@@ -3239,6 +3239,42 @@ static SDValue performBitcastCombine(SDNode *N,
   return SDValue();
 }
 
+static SDValue performAnyTrueCombine(SDNode *N, SelectionDAG &DAG) {
+  // any_true (setcc <X>, 0, eq)
+  // => not (all_true X)
+
+  SDLoc DL(N);
+  assert(N->getOpcode() == ISD::INTRINSIC_WO_CHAIN);
+  if (N->getConstantOperandVal(0) != Intrinsic::wasm_anytrue)
+    return SDValue();
+
+  SDValue SetCC = N->getOperand(1);
+  if (SetCC.getOpcode() != ISD::SETCC)
+    return SDValue();
+
+  SDValue LHS = SetCC->getOperand(0);
+  SDValue RHS = SetCC->getOperand(1);
+  ISD::CondCode Cond = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
+  EVT LT = LHS.getValueType();
+  unsigned NumElts = LT.getVectorNumElements();
+  if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16)
+    return SDValue();
+
+  EVT Width = MVT::getIntegerVT(128 / NumElts);
+
+  if (!isNullOrNullSplat(RHS) || Cond != ISD::SETEQ)
+    return SDValue();
----------------
lukel97 wrote:

This would be a good place to use the pattern matching framework for SelectionDAG:

```suggestion
  SDValue Vec;
  if (!sd_match(
          N->getOperand(1), m_c_SetCC(m_Value(Vec), m_Zero(), m_SpecificCondCode(ISD::SETEQ)))
    return false;
```

https://github.com/llvm/llvm-project/pull/144741