[llvm] [AArch64] Have isel just do neg directly (PR #145185)

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github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64FastISel.cpp llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index 85f9140f3..c3a20c7e9 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -1206,10 +1206,10 @@ Register AArch64FastISel::emitAddSub(bool UseAdd, MVT RetVT, const Value *LHS,
     Register RHSReg = getRegForValue(RHS);
     if (!RHSReg)
       return Register();
-    
+
     if (NeedExtend)
       RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt);
-    
+
     Register ZeroReg = RetVT == MVT::i64 ? AArch64::XZR : AArch64::WZR;
     return emitAddSub_rr(UseAdd, RetVT, ZeroReg, RHSReg, SetFlags, WantResult);
   }
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index cd6e7aa30..290e8bb96 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4410,10 +4410,12 @@ MachineInstr *AArch64InstructionSelector::emitAddSub(
   bool Is32Bit = Size == 32;
 
   // Special case: sub 0, x -> neg x (use zero register directly)
-  // Check if this is a SUB operation by examining the base register-register opcode
+  // Check if this is a SUB operation by examining the base register-register
+  // opcode
   unsigned BaseOpc = AddrModeAndSizeToOpcode[2][Is32Bit];
-  bool IsSubtraction = (BaseOpc == AArch64::SUBWrr || BaseOpc == AArch64::SUBXrr ||
-                        BaseOpc == AArch64::SUBSWrr || BaseOpc == AArch64::SUBSXrr);
+  bool IsSubtraction =
+      (BaseOpc == AArch64::SUBWrr || BaseOpc == AArch64::SUBXrr ||
+       BaseOpc == AArch64::SUBSWrr || BaseOpc == AArch64::SUBSXrr);
   if (IsSubtraction) {
     if (auto LHSImm = getIConstantVRegValWithLookThrough(LHS.getReg(), MRI)) {
       if (LHSImm->Value.isZero()) {

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https://github.com/llvm/llvm-project/pull/145185