[llvm] [DAG] Implement SDPatternMatch `m_Abs()` matcher (PR #144512)
Rajveer Singh Bharadwaj via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 17 11:47:26 PDT 2025
https://github.com/Rajveer100 updated https://github.com/llvm/llvm-project/pull/144512
>From 44570bc0c052da3622c90cabbd93f02ab02c51db Mon Sep 17 00:00:00 2001
From: Rajveer <rajveer.developer at icloud.com>
Date: Tue, 17 Jun 2025 17:13:12 +0530
Subject: [PATCH] [DAG] Implement SDPatternMatch `m_Abs()` matcher
Resolves #144474
---
llvm/include/llvm/CodeGen/SDPatternMatch.h | 4 ++++
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +++---------
.../CodeGen/SelectionDAGPatternMatchTest.cpp | 4 ++++
3 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/SDPatternMatch.h b/llvm/include/llvm/CodeGen/SDPatternMatch.h
index 2e3807a2dfffd..d413227c4d961 100644
--- a/llvm/include/llvm/CodeGen/SDPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/SDPatternMatch.h
@@ -938,6 +938,10 @@ template <typename Opnd> inline UnaryOpc_match<Opnd> m_Trunc(const Opnd &Op) {
return UnaryOpc_match<Opnd>(ISD::TRUNCATE, Op);
}
+template <typename Opnd> inline UnaryOpc_match<Opnd> m_Abs(const Opnd &Op) {
+ return UnaryOpc_match<Opnd>(ISD::ABS, Op);
+}
+
/// Match a zext or identity
/// Allows to peek through optional extensions
template <typename Opnd> inline auto m_ZExtOrSelf(const Opnd &Op) {
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 5d62ded171f4f..8d2d645bda8bd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11252,19 +11252,13 @@ SDValue DAGCombiner::foldABSToABD(SDNode *N, const SDLoc &DL) {
if (N->getOpcode() == ISD::TRUNCATE)
N = N->getOperand(0).getNode();
- if (N->getOpcode() != ISD::ABS)
- return SDValue();
-
EVT VT = N->getValueType(0);
- SDValue AbsOp1 = N->getOperand(0);
SDValue Op0, Op1;
- if (AbsOp1.getOpcode() != ISD::SUB)
+ if (!sd_match(N, m_Abs(m_Sub(m_Value(Op0), m_Value(Op1)))))
return SDValue();
- Op0 = AbsOp1.getOperand(0);
- Op1 = AbsOp1.getOperand(1);
-
+ SDValue AbsOp0 = N->getOperand(0);
unsigned Opc0 = Op0.getOpcode();
// Check if the operands of the sub are (zero|sign)-extended.
@@ -11274,7 +11268,7 @@ SDValue DAGCombiner::foldABSToABD(SDNode *N, const SDLoc &DL) {
Opc0 != ISD::SIGN_EXTEND_INREG)) {
// fold (abs (sub nsw x, y)) -> abds(x, y)
// Don't fold this for unsupported types as we lose the NSW handling.
- if (AbsOp1->getFlags().hasNoSignedWrap() && hasOperation(ISD::ABDS, VT) &&
+ if (AbsOp0->getFlags().hasNoSignedWrap() && hasOperation(ISD::ABDS, VT) &&
TLI.preferABDSToABSWithNSW(VT)) {
SDValue ABD = DAG.getNode(ISD::ABDS, DL, VT, Op0, Op1);
return DAG.getZExtOrTrunc(ABD, DL, SrcVT);
diff --git a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
index 1b590aa33bd86..2162588aadfdb 100644
--- a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
@@ -388,6 +388,8 @@ TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0);
SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1);
+ SDValue Abs = DAG->getNode(ISD::ABS, DL, Int32VT, Op0);
+
SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0);
SDValue Neg = DAG->getNegative(Op0, DL, Int32VT);
SDValue Not = DAG->getNOT(DL, Op0, Int32VT);
@@ -417,6 +419,8 @@ TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
EXPECT_FALSE(sd_match(ZExt, m_SExtLike(m_Value())));
EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1))));
+ EXPECT_TRUE(sd_match(Abs, m_Abs(m_Specific(Op0))));
+
EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value())));
EXPECT_TRUE(sd_match(Not, m_Not(m_Value())));
EXPECT_FALSE(sd_match(ZExt, m_Neg(m_Value())));
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