[llvm] [AMDGPU][True16][CodeGen] sext i16 inreg in true16 mode (PR #144024)

[Joe Nash via llvm-commits]

https://github.com/Sisyph commented:

Can you please add a reduced test case for this selection scenario? The affected tests are not very specific. Since we need a patch to fix the downstream regression, I am inclined to approve approach after that, suggest you continue working on a legalizer based fix after that. 

It seems to have mixed results on isa quality.

https://github.com/llvm/llvm-project/pull/144024