[llvm] [RISCV] Combine (vp.splice (insert_elt poison, scalar, 0), vec, 0, mask, 1, vl) to vslide1up. (PR #144871)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 20 10:38:29 PDT 2025


================
@@ -13281,6 +13283,19 @@ RISCVTargetLowering::lowerVPSpliceExperimental(SDValue Op,
                       SplatZeroOp2, DAG.getUNDEF(ContainerVT), EVL2);
   }
 
+  SDValue FirstEle;
+  if (!IsMaskVector &&
+      sd_match(Op1, m_InsertElt(m_Poison(), m_Value(FirstEle), m_Zero())) &&
+      sd_match(Offset, m_Zero()) && sd_match(EVL1, m_One())) {
+    SDValue Result = DAG.getNode(
+        ContainerVT.isFloatingPoint() ? RISCVISD::VFSLIDE1UP_VL
----------------
topperc wrote:

Does this handle bf16 correctly?

https://github.com/llvm/llvm-project/pull/144871


More information about the llvm-commits mailing list