[llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)

[Simon Pilgrim via llvm-commits]

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In-Reply-To: <llvm.org/llvm/llvm-project/pull/144231 at github.com>


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@@ -1435,6 +1435,20 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
       setOperationAction(ISD::BITREVERSE, VT, Custom);
   }
 
+  // Vector min/max reductions
+  if (Subtarget.hasSSE41())
+  {
+    for (MVT VT : MVT::vector_valuetypes()) {
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RKSimon wrote:

SSE should only be declaring v816/v16i8 custom if we can.

https://github.com/llvm/llvm-project/pull/144231