[llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)

[Craig Topper via llvm-commits]

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@@ -53,6 +53,42 @@ def simm20_lsb000 : Operand<XLenVT> {
   let DecoderMethod = "decodeSImmOperandAndLslN<20, 3>";
 }
 
+// Predicate: True if immediate is a power of 2.
+def PowerOf2 : PatLeaf<(imm), [{
+  if (N->getValueType(0) == MVT::i32)
+    return isPowerOf2_32(N->getZExtValue());
+  else if (N->getValueType(0) == MVT::i64)
+    return isPowerOf2_64(N->getZExtValue());
+  else
+    return false;
+}]>;
+
+// Transformation function: Get log2 of immediate.
+def Log2 : SDNodeXForm<imm, [{
+  uint64_t Imm;
+  if (N->getValueType(0) == MVT::i32)
+    Imm = Log2_32(N->getZExtValue());
+  else
+    Imm = Log2_64(N->getZExtValue());
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topperc wrote:

Should be ok to use Log2_64 for i32 and i64

https://github.com/llvm/llvm-project/pull/145147