[llvm] a3d35b8 - [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)
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llvm-commits at lists.llvm.org
Mon Jun 16 11:24:36 PDT 2025
Author: Craig Topper
Date: 2025-06-16T11:24:33-07:00
New Revision: a3d35b87eacece8cdbb4615ff6c65003773f5cbf
URL: https://github.com/llvm/llvm-project/commit/a3d35b87eacece8cdbb4615ff6c65003773f5cbf
DIFF: https://github.com/llvm/llvm-project/commit/a3d35b87eacece8cdbb4615ff6c65003773f5cbf.diff
LOG: [RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 7cfada6c0601c..779786fa400fc 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3499,7 +3499,7 @@ getVSlideup(SelectionDAG &DAG, const RISCVSubtarget &Subtarget, const SDLoc &DL,
}
static MVT getLMUL1VT(MVT VT) {
- assert(VT.getVectorElementType().getSizeInBits() <= 64 &&
+ assert(VT.getVectorElementType().getSizeInBits() <= RISCV::RVVBitsPerBlock &&
"Unexpected vector MVT");
return MVT::getScalableVectorVT(
VT.getVectorElementType(),
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index fcc9d3977e5cd..0093c92ea5ef0 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -604,7 +604,7 @@ InstructionCost RISCVTTIImpl::getSlideCost(FixedVectorType *Tp,
// Consolidate!
static MVT getLMUL1VT(MVT VT) {
- assert(VT.getVectorElementType().getSizeInBits() <= 64 &&
+ assert(VT.getVectorElementType().getSizeInBits() <= RISCV::RVVBitsPerBlock &&
"Unexpected vector MVT");
return MVT::getScalableVectorVT(
VT.getVectorElementType(),
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