[llvm] [RISCV] Add isel patterns for generating XAndesPerf branch immediate instructions (PR #145147)
Jim Lin via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 22 02:49:19 PDT 2025
================
@@ -53,6 +53,42 @@ def simm20_lsb000 : Operand<XLenVT> {
let DecoderMethod = "decodeSImmOperandAndLslN<20, 3>";
}
+// Predicate: True if immediate is a power of 2.
+def PowerOf2 : PatLeaf<(imm), [{
+ if (N->getValueType(0) == MVT::i32)
+ return isPowerOf2_32(N->getZExtValue());
+ else if (N->getValueType(0) == MVT::i64)
+ return isPowerOf2_64(N->getZExtValue());
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tclin914 wrote:
Done.
https://github.com/llvm/llvm-project/pull/145147
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