The Week Of Monday 19 May 2025 Archives by author

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Starting: Mon May 19 00:04:35 PDT 2025
Ending: Sun May 25 23:55:46 PDT 2025
Messages: 5085

• [llvm] [LLVM][ADT] Add support for `std::string += Twine` operator (PR #140644)   A. Jiang via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   A. Jiang via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   A. Jiang via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_INTEL_blocking_pipes (PR #138675)   Aadesh Premkumar via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU support for llvm-objcopy (PR #92066)   Aakanksha Patil via llvm-commits
• [llvm] [Github] Tweak the good-first-issue message not to require assignment. (PR #139858)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Aaron Ballman via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Aaron Puchert via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Aaron Puchert via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Aaron Puchert via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Aaron Puchert via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Aaron Puchert via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Aaron Puchert via llvm-commits
• [llvm] [mlir] Fix bazel build after 0fa3ba7. (PR #141241)   Aaron Siddhartha Mondal via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] [X86][NFC] Use std::move to avoid copy (PR #141455)   Abhishek Kaushik via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Don't generate DISubprogram for outlined function. (PR #138149)   Abid Qadeer via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Don't generate DISubprogram for outlined function. (PR #138149)   Abid Qadeer via llvm-commits
• [llvm] [RISCV] Fix schedule info for FMVP_D_X. (PR #140766)   Adam Nemet via llvm-commits
• [llvm] [TableGen] Add missing $ before the dag operator name (PR #140969)   Adam Nemet via llvm-commits
• [llvm] [TableGen] !subst on a dag should retain name of operator (PR #141195)   Adam Nemet via llvm-commits
• [llvm] [TableGen] !subst on a dag should retain name of operator (PR #141195)   Adam Nemet via llvm-commits
• [llvm] [TableGen] !subst on a dag should retain name of operator (PR #141195)   Adam Nemet via llvm-commits
• [llvm] [bazel][test] Continue fixing bazel build from 97dee78 (PR #141336)   Adrian Kuegel via llvm-commits
• [llvm] [bazel][test] Continue fixing bazel build from 97dee78 (PR #141336)   Adrian Kuegel via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Ahmad Yasin via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Ahmad Yasin via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Ahmad Yasin via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Ahmad Yasin via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Ahmad Yasin via llvm-commits
• [llvm] [llvm][Support] Add ARM64e support for split stacks (PR #139964)   Ahmed Bougacha via llvm-commits
• [llvm] [llvm][Support] Add ARM64e support for split stacks (PR #139964)   Ahmed Bougacha via llvm-commits
• [llvm] [llvm][Support] Add ARM64e support for split stacks (PR #139964)   Ahmed Bougacha via llvm-commits
• [llvm] [llvm][Support] Add ARM64e support for split stacks (PR #139964)   Ahmed Bougacha via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   Aiden Grossman via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis][Docs] --dump-object-to-disk option is specified by filename rather than bool (PR #141178)   Aiden Grossman via llvm-commits
• [llvm] [docs][mlgo] Document custom builds (PR #141243)   Aiden Grossman via llvm-commits
• [llvm] [CI][Github] Prune windows container (PR #141440)   Aiden Grossman via llvm-commits
• [llvm] [CI][Github] Prune windows container (PR #141440)   Aiden Grossman via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   Akash Agrawal via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   Akash Agrawal via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   Akash Agrawal via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   Akash Agrawal via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   Akash Agrawal via llvm-commits
• [llvm] Avoid MMI in MIRPrinter (PR #140530)   Akshat Oke via llvm-commits
• [llvm] Avoid MMI in MIRPrinter (PR #140530)   Akshat Oke via llvm-commits
• [llvm] Avoid MachineModuleInfo in MIRPrinter (PR #140530)   Akshat Oke via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MIRPrinter (PR #140530)   Akshat Oke via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MIRPrinter (PR #140530)   Akshat Oke via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MIRPrinter (PR #140530)   Akshat Oke via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MachineModuleSlotTracker (PR #140530)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Akshat Oke via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MachineModuleSlotTracker (PR #140530)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Akshat Oke via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140807)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140807)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   Akshay Deodhar via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   Akshay Deodhar via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Handle addrspacecast null to p7 (PR #140775)   Alan Li via llvm-commits
• [llvm] [GISel] Fix ShuffleVector assert (PR #139769)   Alan Li via llvm-commits
• [llvm] [GISel] Fix ShuffleVector assert (PR #139769)   Alan Li via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Alan Li via llvm-commits
• [compiler-rt] [Coverage] Add testing to validate code coverage for exceptions (PR #133463)   Alan Phipps via llvm-commits
• [llvm] [NVPTX] Remove Float register classes (PR #140487)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] Reland "[NVPTX] Unify and extend barrier{.cta} intrinsic support" (PR #141143)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add -nvptx-prec-divf32=3 to disable ftz for f32 fdiv (PR #141276)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add pm_event intrinsics (PR #141278)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add pm_event intrinsics (PR #141278)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add pm_event intrinsics (PR #141278)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Add -nvptx-prec-divf32=3 to disable ftz for f32 fdiv (PR #141276)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Refactor and cleanup NVPTXISelLowering call lowering 2/n (PR #137666)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Refactor and cleanup NVPTXISelLowering call lowering 2/n (PR #137666)   Alex MacLean via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] [llvm][opt][Transforms] Preserve AMDGPU atomic metadata (PR #140314)   Alex Voicu via llvm-commits
• [llvm] update_mir_test_checks: keep commment embedded in MIR (PR #140016)   Alexander Richardson via llvm-commits
• [llvm] [LangRef] Clarify that `ptrtoint` behaves like a capturing bitcast (PR #139349)   Alexander Richardson via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Alexander Richardson via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Alexander Richardson via llvm-commits
• [llvm] [AMDGPU] Set AS8 address width to 48 bits (PR #139419)   Alexander Richardson via llvm-commits
• [llvm] [AMDGPU] Set AS8 address width to 48 bits (PR #139419)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Alexander Richardson via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Alexander Richardson via llvm-commits
• [llvm] [dsym][test][nfc] Remove DIE offsets. (PR #140628)   Alexander Yermolovich via llvm-commits
• [llvm] [dsym][test][nfc] Remove DIE offsets. (PR #140628)   Alexander Yermolovich via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Alexander Yermolovich via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Alexander Yermolovich via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Alexander Yermolovich via llvm-commits
• [llvm] [SLP][NFC]Store operand entries in the map (PR #140549)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix the analysis for masked compress loads (PR #140647)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Store operand entries in the map (PR #140549)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix the analysis for masked compress loads (PR #140647)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Make TreeEntry a class and store "need-to-schedule" state (PR #140734)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Make TreeEntry a class and store "need-to-schedule" state (PR #140734)   Alexey Bataev via llvm-commits
• [llvm] 2318491 - [SLP][NFC]Do the analysis first and then actual codegen, NFC   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Alexey Bataev via llvm-commits
• [llvm] [LAA] Add initial support for non-power-of-2 store-load forwarding distance (PR #137873)   Alexey Bataev via llvm-commits
• [llvm] aa452b6 - [SLP]Restore insertion points after gathers vectorization   Alexey Bataev via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   Alexey Karyakin via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   Alexey Karyakin via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   Alexey Karyakin via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   Alexey Samsonov via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   Alexey Samsonov via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   Alexey Samsonov via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Support generating public libc headers in Bazel builds. (PR #141256)   Alexey Samsonov via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Amara Emerson via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Amara Emerson via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Amara Emerson via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with arm64 (PR #141115)   Amara Emerson via llvm-commits
• [llvm] [BOLT][AArch64] Fix crash for conditional tail calls (PR #140669)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Use llvm::is_contained (NFC) (PR #140984)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Avoid creating a temporary instance of std::string (NFC) (PR #140987)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Never call fixBranches() on non-simple functions (PR #141112)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Remove redundant control flow statements (NFC) (PR #141182)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][heatmap] Produce zoomed-out heatmaps (PR #140153)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][heatmap] Produce zoomed-out heatmaps (PR #140153)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][heatmap] Produce zoomed-out heatmaps (PR #140153)   Amir Ayupov via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   Amy Kwan via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   Amy Kwan via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   Amy Kwan via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   Amy Kwan via llvm-commits
• [llvm] [PowerPC ][NFC] Add a test case for the function atomic_compare_exchange_weak (PR #141263)   Amy Kwan via llvm-commits
• [llvm] [PowerPC ][NFC] Add a test case for the function atomic_compare_exchange_weak (PR #141263)   Amy Kwan via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: analyze functions without CFG information (PR #133461)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: analyze functions without CFG information (PR #133461)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect signing oracles (PR #134146)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect signing oracles (PR #134146)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: use more appropriate types (NFC) (PR #135661)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Protect the entire function if pac-ret+leaf is passed (PR #140895)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Protect the entire function if pac-ret+leaf is passed (PR #140895)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: refactor issue reporting (PR #135662)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: refactor issue reporting (PR #135662)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: refactor issue reporting (PR #135662)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks interface (PR #136147)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks interface (PR #136147)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks interface (PR #136147)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: clarify MCPlusBuilder callbacks interface (PR #136147)   Anatoly Trosinenko via llvm-commits
• [llvm] [PAC][InstCombine] Replace auth+sign with resign (PR #130807)   Anatoly Trosinenko via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   Andre Kuhlenschmidt via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [clang] [llvm] [llvm] properly guard dump methods in Support lib classes (PR #139938)   Andrew Rogers via llvm-commits
• [clang] [llvm] [llvm] properly guard dump methods in Support lib classes (PR #139938)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revert preprocessor dump method guards from llvm::ScaledNumber (PR #140574)   Andrew Rogers via llvm-commits
• [clang] [llvm] [llvm] properly guard dump methods in Support lib classes (PR #139938)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revert preprocessor dump method guards from llvm::ScaledNumber (PR #140574)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/DebugInfo for DLL export annotations (PR #140785)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/DebugInfo for DLL export annotations (PR #140785)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DWARFLinker, llvm/DWP, and llvm/Demangle for DLL export #140778 (PR #140782)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ExecutionEngine for DLL export (PR #140809)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DWARFLinker, llvm/DWP, and llvm/Demangle for DLL export (PR #140782)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/CGData and llvm/CodeGen for DLL export (PR #140823)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/DebugInfo for DLL export annotations (PR #140785)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DebugInfo for DLL export (PR #140778)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/DebugInfo for DLL export annotations (PR #140785)   Andrew Rogers via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/DebugInfo for DLL export annotations (PR #140785)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DebugInfo for DLL export (PR #140778)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DebugInfo for DLL export (PR #140778)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ExecutionEngine for DLL export (PR #140809)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   Anton Korobeynikov via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Antonio Frighetto via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   Antonio Frighetto via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   Antonio Frighetto via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   Antonio Frighetto via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   Antonio Frighetto via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   Antonio Frighetto via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [lld] [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)   Arjun Patel via llvm-commits
• [llvm] [NVPTX] Remove Float register classes (PR #140487)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [clang] [llvm] [NVPTX] Add errors for incorrect CUDA addrpaces (PR #138706)   Artem Belevich via llvm-commits
• [clang] [llvm] [NVPTX] Add errors for incorrect CUDA addrpaces (PR #138706)   Artem Belevich via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Artem Belevich via llvm-commits
• [clang] [llvm] [mlir] Reland "[NVPTX] Unify and extend barrier{.cta} intrinsic support" (PR #141143)   Artem Belevich via llvm-commits
• [llvm] [Timers] Add a flag to set a minimum timer value for printing (PR #139306)   Arthur Eubanks via llvm-commits
• [llvm] 11db128 - [gn build] Manually port 8f03e1a   Arthur Eubanks via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Arthur Eubanks via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Arthur Eubanks via llvm-commits
• [clang] [llvm] Add macro to suppress -Wunnecessary-virtual-specifier (PR #139614)   Arthur Eubanks via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Axel Sorenson via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Axel Sorenson via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Axel Sorenson via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Axel Sorenson via llvm-commits
• [llvm] [mlir] Fix bazel build after 61d5fdf50c78. (PR #141224)   Bart Chrzaszcz via llvm-commits
• [llvm] [mlir] Fix bazel build after 61d5fdf50c78. (PR #141224)   Bart Chrzaszcz via llvm-commits
• [llvm] [mlir] Fix bazel build after 61d5fdf v2. (PR #141235)   Bart Chrzaszcz via llvm-commits
• [llvm] [mlir] Fix bazel build after 61d5fdf v2. (PR #141235)   Bart Chrzaszcz via llvm-commits
• [llvm] [mlir] Fix bazel build after 0fa3ba7. (PR #141241)   Bart Chrzaszcz via llvm-commits
• [llvm] [mlir] Fix bazel build after 0fa3ba7. (PR #141241)   Benjamin Kramer via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Initial compiler support for SVE unwind on Windows. (PR #138609)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Split AArch64ISD::COND_SMSTART/STOP off AArch64::SMSTART/STOP (NFC) (PR #140711)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Split AArch64ISD::COND_SMSTART/STOP off AArch64::SMSTART/STOP (NFC) (PR #140711)   Benjamin Maxwell via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Consistently use/don't use glue with AArch64ISD nodes (NFC) (PR #140715)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Remove unused ISD nodes (NFC) (PR #140706)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Benjamin Maxwell via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Benjamin Maxwell via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Benjamin Maxwell via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Benjamin Maxwell via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Benjamin Maxwell via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Benjamin Maxwell via llvm-commits
• [llvm] [TargetParser] Parse Amazon Linux triple and handle RuntimeLibcalls (PR #136114)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Simplify initialization of TPIDR2 block (PR #141049)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Simplify initialization of the TPIDR2 block (PR #141049)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Benjamin Maxwell via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Consistently use/don't use glue with AArch64ISD nodes (NFC) (PR #140715)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (PR #139085)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (PR #139085)   Björn Pettersson via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Brad Smith via llvm-commits
• [llvm] [AMDGPU] Enable IAS in the AMDGPU backend (PR #85518)   Brad Smith via llvm-commits
• [llvm] [Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO (PR #139830)   Brad Smith via llvm-commits
• [llvm] [RISCV][NFC] Fix the mismatch in comment (PR #140511)   Brandon Wu via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   Brian Cain via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   Brian Cain via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   Brian Cain via llvm-commits
• [llvm] turn t16 as default on gfx1100 (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] turn on true16 mode as default on gfx1100 (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] set true16 mode as default for gfx11 (PR #138912)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] turn on true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] update test fmax3/fmin3 (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] 16bit constraint for asm inline (PR #140929)   Brox Chen via llvm-commits
• [llvm] 16bit for asm inline reg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit reg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit reg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit reg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit reg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVALU in si-fix-sgpr-lowering (PR #138734)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVALU in si-fix-sgpr-lowering (PR #138734)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVALU in si-fix-sgpr-lowering (PR #138734)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVALU in si-fix-sgpr-lowering (PR #138734)   Brox Chen via llvm-commits
• [llvm] Main true16 gfx12 patch 1 (PR #141152)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] v_s_xxx_f16 t16 support in moveToVALU (PR #141152)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] v_s_xxx_f16 t16 codegen support (PR #141152)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] v_s_xxx_f16 t16 codegen support (PR #141152)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] v_s_xxx_f16 t16 codegen support (PR #141152)   Brox Chen via llvm-commits
• [llvm] [ADT][bugfix] Fixed extra leading zero in uhextostr (PR #141097)   Bushev Dmitry via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Callum Fare via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Callum Fare via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Callum Fare via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   Callum Fare via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   Callum Fare via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   Callum Fare via llvm-commits
• [llvm] [AMDGPU] Refine GCNHazardRecognizer hasHazard() (PR #138841)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Rework GFX11 VALU Mask Write Hazard (PR #138663)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Cluster export instruction in PostRA Scheduler (PR #141399)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add export clustering post-RA scheduler test (NFC) (PR #141400)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Cluster export instruction in PostRA Scheduler (PR #141399)   Carl Ritson via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   Carlos Alberto Enciso via llvm-commits
• [llvm] [SPIR-V] Consistent handling of TargetExtTypes in emit-intrinsics (PR #135682)   Cassandra Beckley via llvm-commits
• [llvm] [NFC][AMDGPU] Update tests to use autogened CHECKs (PR #140648)   Chinmay Deshpande via llvm-commits
• [llvm] [NFC][AMDGPU] Update tests to use autogened CHECKs (PR #140648)   Chinmay Deshpande via llvm-commits
• [llvm] [NFC][AMDGPU] Update tests to use autogened CHECKs (PR #140648)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Chris Jackson via llvm-commits
• [llvm] [RISCV] Lower i64 load/stores to ld/sd with Zilsd. (PR #139808)   Christian Herber via llvm-commits
• [clang] [lld] [llvm] [polly] Fix regression tests with bad FileCheck checks (PR #140373)   Chuanqi Xu via llvm-commits
• [llvm] [RISCV] [NFC] Add llvm.get.rounding test (PR #139921)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement RISCVTargetLowering::getRoundingControlRegisters (PR #139864)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Add assertion to MachineBasicBlock::addLiveIn and friends (PR #140527)   Craig Topper via llvm-commits
• [llvm] [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (PR #140536)   Craig Topper via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (PR #140563)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (PR #140595)   Craig Topper via llvm-commits
• [llvm] 0b4cfd1 - [RISCV] Remove stale TODO from test. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (PR #140631)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (PR #140631)   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)   Craig Topper via llvm-commits
• [llvm] 050e49a - [RISCV] Fix copy/paste mistake in test comments. NFC   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (PR #140631)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)   Craig Topper via llvm-commits
• [llvm] [Docs][RISCV] Move Zilsd to 'Supported' status. NFC (PR #140757)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [Docs][RISCV] Move Zilsd to 'Supported' status. NFC (PR #140757)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix schedule info for FMVP_D_X. (PR #140766)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Craig Topper via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add tests for widening fixed vector masked loads/stores. NFC (PR #140949)   Craig Topper via llvm-commits
• [llvm] ee4002d - [TargetLowering] Use getExtractSubvector/getExtractVectorElt. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (PR #140595)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (PR #140595)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct operand names for vmv.s.x and vfmv.s.f pseudos. NFC (PR #140970)   Craig Topper via llvm-commits
• [llvm] 0a42db6 - [SelectionDAG] Simplify creation of getStoreVP in WidenVecOp_STORE. NFC   Craig Topper via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Craig Topper via llvm-commits
• [llvm] [RISCV] add Double Trap extensions requires Zicsr (PR #141016)   Craig Topper via llvm-commits
• [llvm] [RISCV] Sort RISCVSystemOperands to match the RISC-V Privilege Specification. (PR #140967)   Craig Topper via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Craig Topper via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   Craig Topper via llvm-commits
• [llvm] [APInt] APInt::clearBitsSlowCase - fix cut+paste typo when merging lo/himasks (PR #141108)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use ri.vunzip2{a,b} for e64 fixed length deinterleave(2) shuffles (PR #137217)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use ri.vunzip2{a,b} for e64 fixed length deinterleave(2) shuffles (PR #137217)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use ri.vunzip2{a,b} for e64 fixed length deinterleave(2) shuffles (PR #137217)   Craig Topper via llvm-commits
• [llvm] [AArch64] Check for immediates using isLegalICmpImmediate (PR #140999)   Craig Topper via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support LLVM IR intrinsics for XAndesVDot (PR #140223)   Craig Topper via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correctly account for the copy cost of GPR pairs in RISCVMakeCompressible. (PR #141251)   Craig Topper via llvm-commits
• [llvm] [RISCV] Prevent copying dummy_reg_pair_with_x0 in RISCVMakeCompressible. (PR #141261)   Craig Topper via llvm-commits
• [lld] [RISCV][lld] Guarding lld relaxation for RISCV (PR #130265)   Craig Topper via llvm-commits
• [llvm] [RISCV] Print using dummy_reg_pair_with_x0 in more places. (PR #141273)   Craig Topper via llvm-commits
• [llvm] [RISCV] Prevent copying dummy_reg_pair_with_x0 in RISCVMakeCompressible. (PR #141261)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correctly account for the copy cost of GPR pairs in RISCVMakeCompressible. (PR #141251)   Craig Topper via llvm-commits
• [llvm] [RISCV] Prevent using dummy_reg_pair_with_x0 in more places. (PR #141273)   Craig Topper via llvm-commits
• [llvm] [RISCV] Prevent using dummy_reg_pair_with_x0 in more places. (PR #141273)   Craig Topper via llvm-commits
• [llvm] 1695e8b - [RISCV] Fix typo '==' instead of '='. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVTargetInstrInfo::copyPhysReg in RISCVMakeCompressible. NFC (PR #141296)   Craig Topper via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Craig Topper via llvm-commits
• [llvm] [LLVM] Skip dumping inline SDag children (PR #141359)   Craig Topper via llvm-commits
• [llvm] [LLVM] Skip dumping inline SDag children (PR #141359)   Craig Topper via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Csanád Hajdú via llvm-commits
• [lld] [LLD][MachO][NFC] Refactor LOH code (PR #141153)   Daniel Bertalan via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Daniel Paoliello via llvm-commits
• [llvm] [x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (PR #126631)   Daniel Paoliello via llvm-commits
• [llvm] [x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (PR #126631)   Daniel Paoliello via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Daniel Thornburgh via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Daniel Thornburgh via llvm-commits
• [llvm] Rename GsymDIContext to GsymContext (PR #140227)   Danila Malyutin via llvm-commits
• [llvm] Rename GsymDIContext to GsymContext (PR #140227)   Danila Malyutin via llvm-commits
• [llvm] Revert "Reduce llvm-gsymutil memory usage" (PR #140696)   Danila Malyutin via llvm-commits
• [llvm] Revert "Reduce llvm-gsymutil memory usage" (PR #140696)   Danila Malyutin via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   David Blaikie via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   David Blaikie via llvm-commits
• [llvm] [DebugInfo] Use std::map::try_emplace (NFC) (PR #140839)   David Blaikie via llvm-commits
• [clang] [llvm] [llvm][DebugInfo][clang] Finalize all declaration subprograms in DIBuilder::finalize() (PR #139914)   David Blaikie via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   David Blaikie via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   David Blaikie via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   David Blaikie via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   David Green via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   David Green via llvm-commits
• [llvm] [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (PR #140536)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for G_SHUFFLE_VECTOR (PR #139505)   David Green via llvm-commits
• [llvm] [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (PR #140536)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   David Green via llvm-commits
• [llvm] [GlobalISel] Add known bits and sign-bits handling for G_SPLAT_VECTOR (PR #140204)   David Green via llvm-commits
• [llvm] [AArch64] Use i32 extract from UADDV in popcount lowering. (PR #140718)   David Green via llvm-commits
• [llvm] [GlobalISel] Fix ZExt known bits for scalable vectors. (PR #140213)   David Green via llvm-commits
• [llvm] [AArch64] Use i32 extract from UADDV in popcount lowering. (PR #140718)   David Green via llvm-commits
• [llvm] [AArch64] Use i32 extract from UADDV in popcount lowering. (PR #140718)   David Green via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   David Green via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [GlobalISel] Fix ZExt known bits for scalable vectors. (PR #140213)   David Green via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   David Green via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   David Green via llvm-commits
• [llvm] [ARM] Remove kill flags in ReplaceConstByVPNOTs. (PR #140082)   David Green via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   David Green via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   David Green via llvm-commits
• [llvm] [GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (PR #140935)   David Green via llvm-commits
• [llvm] [AArch64] Change cost of (s|z)ext <4 x i8> -> <4 x i32> to 2. (PR #141029)   David Green via llvm-commits
• [llvm] [ARM] Remove unused class member in ARMConstantIslandPass (PR #141093)   David Green via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   David Green via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Resolve Failing LIT test on Fuchsia (PR #141253)   David Salinas via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   David Salinas via llvm-commits
• [llvm] Resolve Failing LIT test on Fuchsia (PR #141253)   David Salinas via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   David Sherwood via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   David Sherwood via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   David Sherwood via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   David Sherwood via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   David Sherwood via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   David Sherwood via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   David Sherwood via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   David Sherwood via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   David Sherwood via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   David Sherwood via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   David Sherwood via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   David Spickett via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   David Spickett via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   David Spickett via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   David Spickett via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   David Spickett via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Davide Mor via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Davide Mor via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Davide Mor via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Davide Mor via llvm-commits
• [llvm] [DirectX] Legalize memcpy (PR #139173)   Deric C. via llvm-commits
• [llvm] [DirectX] scalarize the dx.isinf intrinsic (PR #140638)   Deric C. via llvm-commits
• [llvm] [NFC][HLSL][RootSignature] Use `operator<<` overload instead of dump method (PR #141127)   Deric C. via llvm-commits
• [llvm] [DirectX] change makedouble return type to overloadTy (PR #141156)   Deric C. via llvm-commits
• [llvm] AMDGPU] ISel & PEI for whole wave functions (PR #131334)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)   Diana Picus via llvm-commits
• [llvm] AMDGPU] ISel & PEI for whole wave functions (PR #131334)   Diana Picus via llvm-commits
• [llvm] AMDGPU] ISel & PEI for whole wave functions (PR #131334)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)   Diana Picus via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Addition of matrix multiply accumulate operands (PR #138665)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] support for the intrinsic @llvm.fptosi.sat.* and @llvm.fptoui.sat.* (PR #129222)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] support for the intrinsic @llvm.fptosi.sat.* and @llvm.fptoui.sat.* (PR #129222)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] support for the intrinsic @llvm.fptosi.sat.* and @llvm.fptoui.sat.* (PR #129222)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] support for the intrinsic @llvm.fptosi.sat.* and @llvm.fptoui.sat.* (PR #129222)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] support for the intrinsic @llvm.fptosi.sat.* and @llvm.fptoui.sat.* (PR #129222)   Dmitry Sidorov via llvm-commits
• [llvm] FEAT: Added support for the extension SPV_INTEL_fpga_dsp_control (PR #131651)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Addition of matrix multiply accumulate operands (PR #138665)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Dmitry Sidorov via llvm-commits
• [llvm] Revert "[SPIR-V] Support `SPV_INTEL_int4` extension" (PR #141219)   Dmitry Sidorov via llvm-commits
• [llvm] Revert "[SPIR-V] Support `SPV_INTEL_int4` extension" (PR #141219)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Dmitry Sidorov via llvm-commits
• [compiler-rt] [tsan] Fix nested signal handling (PR #138599)   Dmitry Vyukov via llvm-commits
• [llvm] [Verifier] Add checks for range attribute on ImmArg (PR #140522)   Durgadoss R via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Durgadoss R via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Durgadoss R via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Durgadoss R via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Durgadoss R via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Durgadoss R via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [Verifier] Add checks for range attribute on ImmArg (PR #140522)   Durgadoss R via llvm-commits
• [llvm] [Verifier] Add checks for range attribute on ImmArg (PR #140522)   Durgadoss R via llvm-commits
• [llvm] [Verifier] Add checks for range attribute on ImmArg (PR #140522)   Durgadoss R via llvm-commits
• [llvm] [Verifier] Add checks for range attribute on ImmArg (PR #140522)   Durgadoss R via llvm-commits
• [llvm] [NVPTX][NFC] Move more TMA lowering to tablegen (PR #140914)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Add pm_event intrinsics (PR #141278)   Durgadoss R via llvm-commits
• [llvm] [symbolizer] Address starting with a plus sign is valid. (PR #135857)   Ebuka Ezike via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Initial compiler support for SVE unwind on Windows. (PR #138609)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Initial compiler support for SVE unwind on Windows. (PR #138609)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Initial compiler support for SVE unwind on Windows. (PR #138609)   Eli Friedman via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)   Eli Friedman via llvm-commits
• [compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)   Eli Friedman via llvm-commits
• [llvm] [x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (PR #126631)   Eli Friedman via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Eli Friedman via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Eli Friedman via llvm-commits
• [llvm] [AArch64][PAC] Protect the entire function if pac-ret+leaf is passed (PR #140895)   Eli Friedman via llvm-commits
• [llvm] [LoopPeel] Implement initial peeling off the last loop iteration. (PR #139551)   Eli Friedman via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Eli Friedman via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with arm64 (PR #141115)   Eli Friedman via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with arm64 (PR #141115)   Eli Friedman via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   Eli Friedman via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   Eli Friedman via llvm-commits
• [llvm] LangRef: Clarify behaviors of nsz in fast math flag (PR #137567)   Eli Friedman via llvm-commits
• [llvm] [LangRef] No target-specific size limit for atomics (PR #136864)   Eli Friedman via llvm-commits
• [llvm] [CGP] Split off switch cases with 0 and another power-of-2 const. (PR #139321)   Eli Friedman via llvm-commits
• [llvm] [ConstantFolding] Add flag to disable call folding (PR #140270)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Eli Friedman via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   Ellis Hoag via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Ellis Hoag via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Ellis Hoag via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   Ellis Hoag via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Ellis Hoag via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Ellis Hoag via llvm-commits
• [lld] [LLD][MachO][NFC] Refactor LOH code (PR #141153)   Ellis Hoag via llvm-commits
• [lld] [LLD][MachO][NFC] Refactor LOH code (PR #141153)   Ellis Hoag via llvm-commits
• [llvm] [LOH] Emit hints for LDP/STP instructions (PR #141297)   Ellis Hoag via llvm-commits
• [llvm] [LOH] Emit hints for LDP/STP instructions (PR #141297)   Ellis Hoag via llvm-commits
• [llvm] [LOH] Emit hints for LDP/STP instructions (PR #141297)   Ellis Hoag via llvm-commits
• [lld] [LLD][MachO][NFC] Refactor LOH code (PR #141153)   Ellis Hoag via llvm-commits
• [llvm] [llvm][CodeGen] Add value types `v5f16` and `v5i16` (PR #138578)   Elvin Wang via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   Erich Keane via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   Eugene Epshteyn via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Evgenii Kudriashov via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Fabian Ritter via llvm-commits
• [llvm] [BOLT, test] Add --image-base to tests that use --section-start (PR #140570)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   Fangrui Song via llvm-commits
• [llvm] RISCV, LoongArch: Encode RELAX relocation implicitly (PR #140494)   Fangrui Song via llvm-commits
• [llvm] RISCV, LoongArch: Encode RELAX relocation implicitly (PR #140494)   Fangrui Song via llvm-commits
• [llvm] dba030e - [Xtensa] Rename XtensaMCAsmBackend and internalize it   Fangrui Song via llvm-commits
• [llvm] 95202ab - MC: Remove unused MCFixupKindInfo::FKF_Constant   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove unneeded relocations when mixing relax/norelax code (PR #140692)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove unneeded relocations when mixing relax/norelax code (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove unneeded relocations when mixing relax/norelax code (PR #140692)   Fangrui Song via llvm-commits
• [llvm] [RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup. (PR #73721)   Fangrui Song via llvm-commits
• [llvm] a1e314d - [test] Add lit.local.cfg after #140471   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   Fangrui Song via llvm-commits
• [llvm] [MC][DebugInfo] Emit linetable entries with known offsets immediately (PR #134677)   Fangrui Song via llvm-commits
• [llvm] [BOLT, test] Add --image-base to tests that use --section-start (PR #140570)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Fangrui Song via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Fangrui Song via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Fangrui Song via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   Fangrui Song via llvm-commits
• [llvm] [Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO (PR #139830)   Fangrui Song via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Fangrui Song via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Fangrui Song via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Parse Amazon Linux triple and handle RuntimeLibcalls (PR #136114)   Fangrui Song via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   Fangrui Song via llvm-commits
• [llvm] 6f6dc1f - [MC] Restore MCAsmBackend::shouldForceRelocation to false   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove unneeded relocations when mixing relax/norelax code (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] 4fdcde5 - [X86] Define shouldForceRelocation   Fangrui Song via llvm-commits
• [llvm] de09523 - [X86] Improve @gotpcrel on local symbol tests   Fangrui Song via llvm-commits
• [llvm] 68472a3 - [MC] Restore MCAsmBackend::shouldForceRelocation to false   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Fangrui Song via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Fangrui Song via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   Fangrui Song via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   Fangrui Song via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Fangrui Song via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   Fangrui Song via llvm-commits
• [llvm] 89909d8 - AVRAsmBackend: Don't use the MCSubtargetInfo argument   Fangrui Song via llvm-commits
• [llvm] f0ff2be - MCAsmBackend: Remove MCSubtargetInfo argument   Fangrui Song via llvm-commits
• [llvm] MCAsmBackend: Simplify applyFixup (PR #141333)   Fangrui Song via llvm-commits
• [llvm] MCAsmBackend: Simplify applyFixup (PR #141333)   Fangrui Song via llvm-commits
• [llvm] 84f06b8 - MCAsmBackend: Add member variable MCAssembler * and define getContext   Fangrui Song via llvm-commits
• [llvm] MCAsmBackend: Simplify applyFixup (PR #141333)   Fangrui Song via llvm-commits
• [llvm] MCAsmBackend: Simplify applyFixup (PR #141333)   Fangrui Song via llvm-commits
• [llvm] MCAsmBackend: Simplify applyFixup (PR #141333)   Fangrui Song via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   Fangrui Song via llvm-commits
• [llvm] 15c9f27 - MCAsmBackend: Remove the MCAssembler argument from shouldForceRelocation   Fangrui Song via llvm-commits
• [llvm] 75dbda4 - MCAsmBackend: Remove the MCAssembler argument from addReloc   Fangrui Song via llvm-commits
• [llvm] 48056a7 - MCAsmBackend: Simplify evaluateTargetFixup   Fangrui Song via llvm-commits
• [llvm] b5663d0 - MCAsmBackend: Remove the MCAssembler argument from relax*   Fangrui Song via llvm-commits
• [llvm] a8433b8 - MCObjectwriter: Add member variable MCAssembler * and simplify code   Fangrui Song via llvm-commits
• [llvm] 2849b12 - MCObjectwriter: Add getContext and simplify code   Fangrui Song via llvm-commits
• [llvm] e373f7a - MC: Simplify recordRelocation   Fangrui Song via llvm-commits
• [llvm] adaf170 - ELFObjectWriter: Simplify useSectionSymbol and writeSymbol   Fangrui Song via llvm-commits
• [llvm] 7d71a35 - MCFixup: Remove FK_PCRel_ from getKindForSize   Fangrui Song via llvm-commits
• [llvm] 7ff0cf6 - MCObjectWriter: Remove the MCAssembler argument from writeObject   Fangrui Song via llvm-commits
• [llvm] abf1bfb - SPIRV: Simplify createObjectTargetWriter   Fangrui Song via llvm-commits
• [llvm] 3793cc1 - MCAsmBackend: Remove the MCAssembler argument from fixupNeedsRelaxationAdvanced   Fangrui Song via llvm-commits
• [llvm] 7407165 - M68k: Fix encodeRelocImm   Fangrui Song via llvm-commits
• [llvm] 2b43657 - Remove the MCAssembler argument from RISCVAsmBackend::isPCRelFixupResolved   Fangrui Song via llvm-commits
• [llvm] 964aedb - RISCV, test: Move relocation-specific tests to Relocations/   Fangrui Song via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Fangrui Song via llvm-commits
• [lld] 9662a60 - [ELF,test] Make loongarch-reloc-leb128.s similar to riscv-reloc-leb128.s   Fangrui Song via llvm-commits
• [llvm] b754e40 - MC: Remove redundant relocations for label differences   Fangrui Song via llvm-commits
• [llvm] [LoongArch] Allow delayed decision for ADD/SUB relocations (PR #72960)   Fangrui Song via llvm-commits
• [llvm] 7687261 - ELFObjectWriter: Remove MCAssembler * arguments   Fangrui Song via llvm-commits
• [lld] [lld] Remove unused includes (NFC) (PR #141388)   Fangrui Song via llvm-commits
• [llvm] b65760b - MCObjectTargetWriter: Add getContext/reportError and use it for ELF   Fangrui Song via llvm-commits
• [llvm] 9d3ea92 - X86ELFObjectWriter: Avoid using the MCContext argument   Fangrui Song via llvm-commits
• [llvm] 0e80be8 - SystemZ: Replace Ctx.reportError with reportError   Fangrui Song via llvm-commits
• [llvm] 068868d - ELFObjectWriter: Replace Ctx.reportError with reportError   Fangrui Song via llvm-commits
• [llvm] a438b23 - AArch64ELFObjectWriter: Remove MCContext argument   Fangrui Song via llvm-commits
• [llvm] e933948 - ARM,Sparc: Avoid using the MCContext & argument   Fangrui Song via llvm-commits
• [llvm] fe32806 - ELFObjectWriter: Remove the MCContext argument from getRelocType   Fangrui Song via llvm-commits
• [llvm] d89084c - MCAssembler: Add reportError to simplify getContext().reportError   Fangrui Song via llvm-commits
• [llvm] 63adf07 - ELFObjectWriter: Move Thumb-specific condition to ARMELFObjectWriter   Fangrui Song via llvm-commits
• [llvm] f64f4f5 - MCELFObjectTargetWriter::needsRelocateWithSymbol: Replace MCSymbol uses with MCValue   Fangrui Song via llvm-commits
• [llvm] e3e949c - MCELFObjectTargetWriter::needsRelocateWithSymbol: Remove MCSymbol argument   Fangrui Song via llvm-commits
• [lld] [lld] Remove unused includes (NFC) (PR #141421)   Fangrui Song via llvm-commits
• [llvm] a0901a2 - Replace #include MCAsmLexer.h with AsmLexer.h   Fangrui Song via llvm-commits
• [llvm] 7c3c280 - MCParser: Remove unused MCAsmLexer.h   Fangrui Song via llvm-commits
• [llvm] cb7d68a - MCParser: Replace deprecated alias MCAsmLexer with AsmLexer   Fangrui Song via llvm-commits
• [llvm] 5599e42 - MCParser: Remove unused alias MCAsmLexer   Fangrui Song via llvm-commits
• [llvm] 1193f62 - MachObjectWriter: Remove the MCAssembler argument from getSymbolAddress   Fangrui Song via llvm-commits
• [llvm] 64390b9 - MC: Remove MCAssembler argument from addFileName   Fangrui Song via llvm-commits
• [llvm] 843e362 - MachObjectWriter: Simplify Asm.getContext().reportError   Fangrui Song via llvm-commits
• [llvm] 9513284 - WinCOFFObjectWriter: Simplify code with member MCAssembler *   Fangrui Song via llvm-commits
• [llvm] 95756e6 - MC: Rework .weakref   Fangrui Song via llvm-commits
• [llvm] 0004c37 - [llvm-ml] Restore VK_WEAKREF special case to fix alias.asm   Fangrui Song via llvm-commits
• [llvm] fe518e7 - ELFObjectWriter: Simplify STT_SECTION adjustment   Fangrui Song via llvm-commits
• [llvm] 9909cf5 - llvm-ml: Rework the alias directive to not use ELF-intended VK_WEAKREF   Fangrui Song via llvm-commits
• [clang] [llvm] Arm64EC entry/exit thunks, consolidated. (PR #79067)   Fangrui Song via llvm-commits
• [llvm] [DirectX] scalarize the dx.isinf intrinsic (PR #140638)   Farzon Lotfi via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implement `refract` intrinsic (PR #136026)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implement `refract` intrinsic (PR #136026)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implement `refract` intrinsic (PR #136026)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implement `refract` intrinsic (PR #136026)   Farzon Lotfi via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] replace byte splitting via vector bitcast with scalar (PR #140167)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Scalarize Allocas as part of data scalarization (PR #140165)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing for empty RootParams (PR #140147)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing for empty RootParams (PR #140147)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing for empty RootDescriptors (PR #140147)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing for empty RootDescriptors (PR #140147)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing for empty RootDescriptors (PR #140147)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Finn Plummer via llvm-commits
• [llvm] [NFC][HLSL][RootSignature] Use `operator<<` overload instead of dump method (PR #141127)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootDescriptor (PR #140151)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootDescriptor (PR #140151)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootDescriptor (PR #140151)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootDescriptor (PR #140151)   Finn Plummer via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   Finn Plummer via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   Finn Plummer via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   Finn Plummer via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootDescriptor (PR #140151)   Finn Plummer via llvm-commits
• [llvm] [NFC][HLSL][RootSignature] Use `operator<<` overload instead of dump method (PR #141127)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of flags to RootDescriptor (PR #140152)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of flags to RootDescriptor (PR #140152)   Finn Plummer via llvm-commits
• [llvm] [SCEVPatternMatch] Introduce m_scev_AffineAddRec (PR #140377)   Florian Hahn via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Florian Hahn via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Florian Hahn via llvm-commits
• [llvm] [Local] Move OverflowTracking to Local.h, move logic to helpers (NFC) (PR #140403)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [Local] Move OverflowTracking to Local.h, move logic to helpers (NFC) (PR #140403)   Florian Hahn via llvm-commits
• [llvm] [Local] Move OverflowTracking to Local.h, move logic to helpers (NFC) (PR #140403)   Florian Hahn via llvm-commits
• [llvm] [Local] Move OverflowTracking to Local.h, move logic to helpers (NFC) (PR #140403)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlan-level constant folder (PR #125365)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlan-level constant folder (PR #125365)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlan-level constant folder (PR #125365)   Florian Hahn via llvm-commits
• [llvm] [LICM] Use OverflowTracking to preserve NUW/NSW when reassociating. (PR #140404)   Florian Hahn via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Florian Hahn via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Florian Hahn via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Florian Hahn via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   Florian Hahn via llvm-commits
• [llvm] 705e27c - [LoopPeel] Add tests for peeling from end with variable trip counts.   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Florian Hahn via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Florian Hahn via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Florian Hahn via llvm-commits
• [llvm] [LAA] Tweak debug output for UTC stability (PR #140764)   Florian Hahn via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Florian Hahn via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Florian Hahn via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   Florian Hahn via llvm-commits
• [llvm] [SCCPSolver] Mark several functions const (NFC) (PR #140926)   Florian Hahn via llvm-commits
• [llvm] 793bb6b - Revert "[VPlan] Move predication to VPlanTransform (NFC). (#128420)"   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   Florian Hahn via llvm-commits
• [llvm] bf15aad - [VPlan] Don't try to narrow predicated VPReplicateRecipe.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add narrowToSingleScalarRecipe transform. (PR #139150)   Florian Hahn via llvm-commits
• [llvm] 4f869e0 - [LoopPeel] Add test for peeling last iteration with non-trivial BTC.   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] 95ba550 - Reapply "[VPlan] Move predication to VPlanTransform (NFC). (#128420)"   Florian Hahn via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Change cost of (s|z)ext <4 x i8> -> <4 x i32> to 2. (PR #141029)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Change cost of (s|z)ext <4 x i8> -> <4 x i32> to 2. (PR #141029)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]FindLastIV (NFC) (PR #141082)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Prefer empty m_Cmp on unused result (NFC) (PR #141071)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [IndVars] Improve code; use SCEVPatternMatch (NFC) (PR #139533)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] 4a6b1fb - [LAA] Remove dead SE arg from canCheckPtrAtRT (NFC).   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]FindLastIV (NFC) (PR #141082)   Florian Hahn via llvm-commits
• [llvm] [LAA] Strip isNoWrapGEP: dead code (NFC) (PR #140308)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Florian Hahn via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]AnyOf (PR #118393)   Florian Hahn via llvm-commits
• [llvm] [Reassociate] Move Disjoint flag handling to OverflowTracking. (PR #140406)   Florian Hahn via llvm-commits
• [llvm] 16fdb4f - [VectorCombine] Add tests with combine-able vector-extends.   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Florian Hahn via llvm-commits
• [llvm] [Local] Verify opcodes match for all insts passed to mergeFlags (NFC). (PR #141231)   Florian Hahn via llvm-commits
• [llvm] [Reassociate] Move Disjoint flag handling to OverflowTracking. (PR #140406)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Florian Hahn via llvm-commits
• [llvm] [Reassociate] Move Disjoint flag handling to OverflowTracking. (PR #140406)   Florian Hahn via llvm-commits
• [llvm] [Local] Verify opcodes match for all insts passed to mergeFlags (NFC). (PR #141231)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] 3c9812e - [LoopPeel] Add tests for peeling last iteration with multiple exits.   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Support peeling last iteration with multiple exits. (PR #141247)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Florian Hahn via llvm-commits
• [llvm] 672e926 - Reapply "[VPlan] Support cloning initial VPlan (NFC)."   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Florian Hahn via llvm-commits
• [llvm] a9b2998 - [VPlan] Skip cost assert if VPlan converted to single-scalar recipes.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in IRBuilder (PR #141225)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Strip dead includes in VPRecipeBuilder (NFC) (PR #141239)   Florian Hahn via llvm-commits
• [llvm] 69f2ff3 - [LV] Add test case showing unnecessary broadcast of invariant GEP idx.   Florian Hahn via llvm-commits
• [llvm] e089d48 - [VPlan] VPWidenGEPRecipe uses first lane of invariant indices (NFC)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [SwitchLowering] Support merging 0 and power-of-2 case. (PR #139736)   Florian Hahn via llvm-commits
• [llvm] f755e66 - [LoopPeel] Make sure AddRec is for correct loop when peeling last iter.   Florian Hahn via llvm-commits
• [llvm] 364d80e - [LoopPeel] Make sure bound in exit condition is loop invariant.   Florian Hahn via llvm-commits
• [llvm] [LoopPeel] Implement initial peeling off the last loop iteration. (PR #139551)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use SINGLE-SCALAR when printing single-scalar VPInstructions. (PR #141428)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify branch to scalar ph in VPlan transform (NFC). (PR #140409)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstruction for uniform binops. (PR #141429)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   Florian Hahn via llvm-commits
• [llvm] 2d261dc - [AArch64] Add tests with switches with 0 and power-of-2 constants.   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for cmp reductions with decreasing IVs. (PR #140451)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for cmp reductions with decreasing IVs. (PR #140451)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize selecting index of min/max element. (PR #141431)   Florian Hahn via llvm-commits
• [llvm] [NFC][llvm] Comment on validity of volatile ops on null (PR #139803)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Florian Mayer via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Florian Mayer via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Florian Mayer via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Florian Mayer via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Florian Mayer via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Florian Mayer via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] Improve symbol indexing (PR #135967)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] Improve symbol indexing (PR #135967)   Florian Mayer via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Florian Mayer via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Florian Mayer via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   Folkert de Vries via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   Folkert de Vries via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   Folkert de Vries via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   Folkert de Vries via llvm-commits
• [llvm] RISCV: Replace most Specifier constants with relocation types (PR #138644)   Francesco Petrogalli via llvm-commits
• [llvm] [TableGen] Add missing $ before the dag operator name (PR #140969)   Francesco Petrogalli via llvm-commits
• [llvm] [RISCV][test] Improve test robustness. [NFCI] (PR #141268)   Francesco Petrogalli via llvm-commits
• [llvm] [RISCV][test] Improve test robustness. [NFCI] (PR #141268)   Francesco Petrogalli via llvm-commits
• [llvm] [TableGen] !subst on a dag should retain name of operator (PR #141195)   Francesco Petrogalli via llvm-commits
• [llvm] [TableGen] !subst on a dag should retain name of operator (PR #141195)   Francesco Petrogalli via llvm-commits
• [llvm] [TableGen] !subst on a dag should retain name of operator (PR #141195)   Francesco Petrogalli via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Francesco Petrogalli via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Francesco Petrogalli via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Frederik Harwath via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Handle OpNegateRAState to enable optimizing binaries with pac-ret hardening (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [RISCV] [NFC] Add llvm.get.rounding test (PR #139921)   Gergely Futo via llvm-commits
• [llvm] [RISCV] Implement RISCVTargetLowering::getRoundingControlRegisters (PR #139864)   Gergely Futo via llvm-commits
• [llvm] [RISCV] Implement RISCVTargetLowering::getRoundingControlRegisters (PR #139864)   Gergely Futo via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Graham Hunter via llvm-commits
• [llvm] [LV] Initial support for stores in early exit loops (PR #137774)   Graham Hunter via llvm-commits
• [llvm] [LV] Initial support for stores in early exit loops (PR #137774)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   Graham Hunter via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add NVVMRequiresSM op traits (PR #126886)   Guray Ozen via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add NVVMRequiresSM op traits (PR #126886)   Guray Ozen via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Guray Ozen via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Guray Ozen via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Guray Ozen via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Guray Ozen via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Guray Ozen via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Guray Ozen via llvm-commits
• [llvm] [AArch64] Skip storing of stack arguments when lowering tail calls (PR #126735)   Guy David via llvm-commits
• [llvm] [AArch64] Skip storing of stack arguments when lowering tail calls (PR #126735)   Guy David via llvm-commits
• [llvm] [SLP]Fix the analysis for masked compress loads (PR #140647)   Han-Kuan Chen via llvm-commits
• [llvm] [Timers] Add a flag to set a minimum timer value for printing (PR #139306)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [llvm] 6bb05ea - [pdb] Tweak the message about overflowing the publics/globals record stream   Hans Wennborg via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Hans Wennborg via llvm-commits
• [compiler-rt] [compiler-rt] [test] Don't apply the "arm" or "armhf" patterns for targets starting with "arm64" (PR #141226)   Hans Wennborg via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   Haohai Wen via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Haohai Wen via llvm-commits
• [clang] [llvm] [llvm] properly guard dump methods in Support lib classes (PR #139938)   Harald van Dijk via llvm-commits
• [clang] [llvm] [llvm] properly guard dump methods in Support lib classes (PR #139938)   Harald van Dijk via llvm-commits
• [clang] [llvm] [llvm] properly guard dump methods in Support lib classes (PR #139938)   Harald van Dijk via llvm-commits
• [llvm] [llvm] revert preprocessor dump method guards from llvm::ScaledNumber (PR #140574)   Harald van Dijk via llvm-commits
• [llvm] [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (PR #140093)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (PR #140093)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (PR #140093)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Harrison Hao via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Harrison Hao via llvm-commits
• [llvm] [HLSL][NFC] Add resource globals created for metadata to test baseline (PR #140620)   Helena Kotas via llvm-commits
• [llvm] [HLSL][NFC] Add resource globals created for metadata to test baseline (PR #140620)   Helena Kotas via llvm-commits
• [llvm] [HLSL][NFC] Add resource globals created for metadata to test baseline (PR #140620)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Moving DXILResourceImplicitBinding pass closer to DXIL Resource Analysis (PR #140981)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Moving DXILResourceImplicitBinding pass closer to DXIL Resource Analysis (PR #140981)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Move DXILResourceImplicitBinding pass closer to DXIL Resource Analysis (PR #140981)   Helena Kotas via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Hubert Tong via llvm-commits
• [llvm] [VPlan] Speed up VPSlotTracker by using ModuleSlotTracker (PR #139881)   Igor Kirillov via llvm-commits
• [llvm] [VPlan] Speed up VPSlotTracker by using ModuleSlotTracker (PR #139881)   Igor Kirillov via llvm-commits
• [llvm] Revert "[llvm][NFC] Use `llvm::sort()`" (PR #140668)   Iris Shi via llvm-commits
• [llvm] Revert "[llvm][NFC] Use `llvm::sort()`" (PR #140668)   Iris Shi via llvm-commits
• [llvm] [llvm][NFC] Use `llvm::sort()` (PR #140335)   Iris Shi via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   Ivan R. Ivanov via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   Ivan R. Ivanov via llvm-commits
• [llvm] 50c4506 - Revert "[X86] Improve @gotpcrel on local symbol tests"   JP Lehr via llvm-commits
• [llvm] cfd1b14 - Revert "[X86] Define shouldForceRelocation"   JP Lehr via llvm-commits
• [llvm] 84841e2 - Revert "[MC] Restore MCAsmBackend::shouldForceRelocation to false"   JP Lehr via llvm-commits
• [compiler-rt] [compiler-rt] [test] Don't apply the "arm" or "armhf" patterns for targets starting with "arm64" (PR #141226)   Jacek Caban via llvm-commits
• [llvm] [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC) (PR #140484)   Jack Styles via llvm-commits
• [llvm] [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC) (PR #140484)   Jack Styles via llvm-commits
• [llvm] [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC) (PR #140484)   Jack Styles via llvm-commits
• [llvm] [mlir] [mlir][lsp] Enable registering dialects based on URI. (PR #141331)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][lsp] Enable registering dialects based on URI. (PR #141331)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][lsp] Enable registering dialects based on URI. (PR #141331)   Jacques Pienaar via llvm-commits
• [llvm] Add live in for PrivateSegmentSize in GISel path (PR #139968)   Jake Daly via llvm-commits
• [compiler-rt] [tsan] Fix nested signal handling (PR #138599)   Jakob Widauer via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   James Henderson via llvm-commits
• [clang] [lld] [llvm] Adding Matching and Inference Functionality to Propeller (PR #139008)   James Henderson via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #141078)   James Henderson via llvm-commits
• [llvm] [llvm] Fix a typo in documentation (PR #141204)   James Henderson via llvm-commits
• [compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)   Jameson Nash via llvm-commits
• [compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)   Jameson Nash via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Jameson Nash via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Jameson Nash via llvm-commits
• [compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)   Jameson Nash via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Jan André Reuter via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Jan André Reuter via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Jan André Reuter via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Jan André Reuter via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Jan André Reuter via llvm-commits
• [llvm] [MC] Fix HIP buildbot errors after 68472a3 (PR #141138)   Jan Patrick Lehr via llvm-commits
• [llvm] [MC] Fix HIP buildbot errors after 68472a3 (PR #141138)   Jan Patrick Lehr via llvm-commits
• [llvm] [MC] Fix HIP buildbot errors after 68472a3 (PR #141138)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Fold multiple aligned v_mov_b32 to v_mov_b64 on gfx942 (PR #138843)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Fold multiple aligned v_mov_b32 to v_mov_b64 on gfx942 (PR #138843)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Fold multiple aligned v_mov_b32 to v_mov_b64 on gfx942 (PR #138843)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Janek van Oirschot via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Jay Foad via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Jay Foad via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Jay Foad via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Jay Foad via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Jay Foad via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Add assertion to MachineBasicBlock::addLiveIn and friends (PR #140527)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Add assertion to MachineBasicBlock::addLiveIn and friends (PR #140527)   Jay Foad via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Jay Foad via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Jay Foad via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Add assertion to MachineBasicBlock::addLiveIn and friends (PR #140527)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)   Jay Foad via llvm-commits
• [llvm] AMDGPU: VIMAGE/VSAMPLE are bundle candidates (PR #140854)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Jay Foad via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   Jay Foad via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Extend SRA i64 simplification for shift amts in range [33:62] (PR #138913)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Jay Foad via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify definition of AddrSpaces. NFC. (PR #141030)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify definition of AddrSpaces. NFC. (PR #141030)   Jay Foad via llvm-commits
• [llvm] [TableGen] Warn on redundant intrinsic properties (PR #141056)   Jay Foad via llvm-commits
• [llvm] [TableGen] Warn on redundant intrinsic properties (PR #141056)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce FeatureISAVersion11_5_Common. NFC. (PR #141061)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Introduce FeatureISAVersion11_5_Common. NFC. (PR #141061)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Jay Foad via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Jeffrey Byrnes via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Jeffrey Byrnes via llvm-commits
• [llvm] [MC][DebugInfo] Emit linetable entries with known offsets immediately (PR #134677)   Jeremy Morse via llvm-commits
• [llvm] [MC][DebugInfo] Emit linetable entries with known offsets immediately (PR #134677)   Jeremy Morse via llvm-commits
• [llvm] [MC][DebugInfo] Emit linetable entries with known offsets immediately (PR #134677)   Jeremy Morse via llvm-commits
• [clang] [llvm] [llvm][DebugInfo][clang] Finalize all declaration subprograms in DIBuilder::finalize() (PR #139914)   Jeremy Morse via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Jeremy Morse via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Jeremy Morse via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Jeremy Morse via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Jeremy Morse via llvm-commits
• [llvm] [RISCV] add Double Trap extensions requires Zicsr (PR #141016)   Jerry Zhang Jian via llvm-commits
• [llvm] [RISCV] Move RISCVIndirectBranchTracking before Branch Relaxation (PR #139993)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Move RISCVIndirectBranchTracking before Branch Relaxation (PR #139993)   Jesse Huang via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   Jessica Clarke via llvm-commits
• [compiler-rt] [compiler-rt][RISC-V] ILP32E/LP64E Save/Restore Grouping (PR #95398)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add FeatureVendorXAndesPerf to Andes N45/NX45/A45/AX45 (PR #141007)   Jim Lin via llvm-commits
• [llvm] [RISCV] Support LLVM IR intrinsics for XAndesVDot (PR #140223)   Jim Lin via llvm-commits
• [llvm] [RISCV] Support LLVM IR intrinsics for XAndesVDot (PR #140223)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add FeatureVendorXAndesPerf to Andes N45/NX45/A45/AX45 (PR #141007)   Jim Lin via llvm-commits
• [llvm] [llvm-exegesis][Docs] --dump-object-to-disk option is specified by filename rather than bool (PR #141178)   Jim Lin via llvm-commits
• [llvm] [llvm-exegesis][Docs] --dump-object-to-disk option is specified by filename rather than bool (PR #141178)   Jim Lin via llvm-commits
• [llvm] [RISCV] Support LLVM IR intrinsics for XAndesVDot (PR #140223)   Jim Lin via llvm-commits
• [llvm] RISCV] Select NDS_BFOZ for and with trailing ones mask (PR #141398)   Jim Lin via llvm-commits
• [llvm] [RISCV] Select NDS_BFOZ for and with trailing ones mask (PR #141398)   Jim Lin via llvm-commits
• [llvm] [RISCV] Select NDS_BFOZ for and with trailing ones mask (PR #141398)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Jiongjia Lu via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   Joe Nash via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Joe Nash via llvm-commits
• [llvm] [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (PR #126779)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][GPU][FIX] Enable generic barriers in single threaded contexts (PR #140786)   Johannes Doerfert via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][GPU][FIX] Enable generic barriers in single threaded contexts (PR #140786)   Johannes Doerfert via llvm-commits
• [llvm] Don't collect from phi nodes which are not fully constructed yet (PR #140806)   Johannes Doerfert via llvm-commits
• [llvm] [LAA] Keep pointer checks on partial analysis (PR #139719)   John Brawn via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   John Brawn via llvm-commits
• [llvm] [LAA] Keep pointer checks on partial analysis (PR #139719)   John Brawn via llvm-commits
• [llvm] [LAA] Keep pointer checks on partial analysis (PR #139719)   John Brawn via llvm-commits
• [llvm] [LAA] Keep pointer checks on partial analysis (PR #139719)   John Brawn via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Jon Chesterfield via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   Jon Roelofs via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Jon Roelofs via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Jon Roelofs via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Jon Roelofs via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Jon Roelofs via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   Jon Roelofs via llvm-commits
• [llvm] [LLVM] Skip dumping inline SDag children (PR #141359)   Jon Roelofs via llvm-commits
• [llvm] [LLVM] Skip dumping inline SDag children (PR #141359)   Jon Roelofs via llvm-commits
• [llvm] [dsym][test][nfc] Remove DIE offsets. (PR #140628)   Jonas Devlieghere via llvm-commits
• [llvm] [dsym][test][nfc] Remove DIE offsets. (PR #140628)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC) (PR #140484)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC) (PR #140484)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (PR #140593)   Jonathan Thackray via llvm-commits
• [llvm] [bazel][mlir] Add missing dep for 747620d (PR #140830)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir] Add missing dep for 747620d (PR #140830)   Jordan Rupprecht via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   Jorge Gorbe Moya via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Joseph Huber via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Joseph Huber via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism and lower-case messages (PR #139275)   Joseph Huber via llvm-commits
• [llvm] [Offload] Make OffloadAPI gtest error messages more readable (PR #140728)   Joseph Huber via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism and lower-case messages (PR #139275)   Joseph Huber via llvm-commits
• [llvm] [Offload] Make OffloadAPI gtest error messages more readable (PR #140728)   Joseph Huber via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Joseph Huber via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   Joseph Huber via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   Joseph Huber via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   Joseph Huber via llvm-commits
• [llvm] [MC] Fix HIP buildbot errors after 68472a3 (PR #141138)   Joseph Huber via llvm-commits
• [llvm] [HLSL][NFC] Add resource globals created for metadata to test baseline (PR #140620)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Joshua Batista via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [UniformAnalysis] Use Immediate postDom as last join (PR #140013)   Junjie Gu via llvm-commits
• [llvm] [UniformAnalysis] Use Immediate postDom as last join (PR #140013)   Junjie Gu via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Junjie Gu via llvm-commits
• [llvm] [HLSL][NFC] Add resource globals created for metadata to test baseline (PR #140620)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (PR #140148)   Justin Bogner via llvm-commits
• [llvm] [NFC][HLSL][RootSignature] Use `operator<<` overload instead of dump method (PR #141127)   Justin Bogner via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #141078)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Scalarize Allocas as part of data scalarization (PR #140165)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Scalarize Allocas as part of data scalarization (PR #140165)   Justin Bogner via llvm-commits
• [llvm] [DirectX] change makedouble return type to overloadTy (PR #141156)   Justin Bogner via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   Justin Bogner via llvm-commits
• [clang] [compiler-rt] [Coverage] Fix mapping for do-while loops with terminating statements (PR #139777)   Justin Cady via llvm-commits
• [clang] [compiler-rt] [Coverage] Fix mapping for do-while loops with terminating statements (PR #139777)   Justin Cady via llvm-commits
• [clang] [compiler-rt] [Coverage] Fix mapping for do-while loops with terminating statements (PR #139777)   Justin Cady via llvm-commits
• [compiler-rt] [Coverage] Add testing to validate code coverage for exceptions (PR #133463)   Justin Cady via llvm-commits
• [compiler-rt] [Coverage] Add testing to validate code coverage for exceptions (PR #133463)   Justin Cady via llvm-commits
• [compiler-rt] [Coverage] Add testing to validate code coverage for exceptions (PR #133463)   Justin Cady via llvm-commits
• [clang] [llvm] [SPIRV] Add PreLegalizer pattern matching for `faceforward` (PR #139959)   Kaitlin Peng via llvm-commits
• [clang] [llvm] [SPIRV] Add PreLegalizer pattern matching for `faceforward` (PR #139959)   Kaitlin Peng via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Fix usage of kNoAsyncId in assign.cpp (PR #141077)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Fix usage of kNoAsyncId in assign.cpp (PR #141077)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Kajetan Puchalski via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Kazu Hirata via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Kazu Hirata via llvm-commits
• [lld] [lld] Use llvm::stable_sort (NFC) (PR #140488)   Kazu Hirata via llvm-commits
• [llvm] [NFC][TableGen] Use SmallVector range constructor when possible (PR #140284)   Kazu Hirata via llvm-commits
• [llvm] 195e640 - [TableGen] Fix the build   Kazu Hirata via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Avoid repeated map lookups (NFC) (PR #140662)   Kazu Hirata via llvm-commits
• [lld] [lld] Drop const from a return type (NFC) (PR #140667)   Kazu Hirata via llvm-commits
• [llvm] [CGData] Return ArrayRef<std::string> in getNames (NFC) (PR #140675)   Kazu Hirata via llvm-commits
• [llvm] [CGData] Return ArrayRef<std::string> in getNames (NFC) (PR #140675)   Kazu Hirata via llvm-commits
• [llvm] [CGData] Return ArrayRef<std::string> in getNames (NFC) (PR #140675)   Kazu Hirata via llvm-commits
• [llvm] [CGData] Return ArrayRef<std::string> in getNames (NFC) (PR #140675)   Kazu Hirata via llvm-commits
• [llvm] [mlir] [TableGen] Tach getInputFilename to return StringRef (NFC) (PR #140690)   Kazu Hirata via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #140691)   Kazu Hirata via llvm-commits
• [llvm] [mlir] [TableGen] Tach getInputFilename to return StringRef (NFC) (PR #140690)   Kazu Hirata via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #140691)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #140742)   Kazu Hirata via llvm-commits
• [llvm] [bugpoint] Use a range-based for loop (NFC) (PR #140743)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #140742)   Kazu Hirata via llvm-commits
• [llvm] [bugpoint] Use a range-based for loop (NFC) (PR #140743)   Kazu Hirata via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Kazu Hirata via llvm-commits
• [llvm] [llvm-mca] Drop const from a return type (NFC) (PR #140836)   Kazu Hirata via llvm-commits
• [polly] [polly] Drop const from return types (NFC) (PR #140837)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #140838)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo] Use std::map::try_emplace (NFC) (PR #140839)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Use range-based for loops (NFC) (PR #140840)   Kazu Hirata via llvm-commits
• [llvm] [llvm-mca] Drop const from a return type (NFC) (PR #140836)   Kazu Hirata via llvm-commits
• [polly] [polly] Drop const from return types (NFC) (PR #140837)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #140838)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo] Use std::map::try_emplace (NFC) (PR #140839)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Use range-based for loops (NFC) (PR #140840)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #140843)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #140844)   Kazu Hirata via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Kazu Hirata via llvm-commits
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• [llvm] [llvm] Fix typos in documentation (PR #140844)   Kazu Hirata via llvm-commits
• [llvm] a28d753 - [Vectorize] Fix a warning   Kazu Hirata via llvm-commits
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• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Kazu Hirata via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Kazu Hirata via llvm-commits
• [llvm] [SCCPSolver] Mark several functions const (NFC) (PR #140926)   Kazu Hirata via llvm-commits
• [llvm] [SCCPSolver] Mark several functions const (NFC) (PR #140926)   Kazu Hirata via llvm-commits
• [llvm] [BOLT] Use llvm::is_contained (NFC) (PR #140984)   Kazu Hirata via llvm-commits
• [llvm] [BOLT] Avoid creating a temporary instance of std::string (NFC) (PR #140987)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #141078)   Kazu Hirata via llvm-commits
• [llvm] 30a9d9d - [Analysis] Fix warnings   Kazu Hirata via llvm-commits
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• [llvm] [llvm] Use llvm::erase_if (NFC) (PR #141185)   Kazu Hirata via llvm-commits
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• [llvm] [MCA] Use a range-based for loop (NFC) (PR #141187)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #141190)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Fix a typo in documentation (PR #141204)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #141078)   Kazu Hirata via llvm-commits
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• [llvm] [llvm] Fix a typo in documentation (PR #141204)   Kazu Hirata via llvm-commits
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• [lld] [lld] Use llvm::less_second (NFC) (PR #141349)   Kazu Hirata via llvm-commits
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• [llvm] [TableGen] Remove unused includes (NFC) (PR #141356)   Kazu Hirata via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   Kazu Hirata via llvm-commits
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• [llvm] [Support] Use std::map::try_emplace (NFC) (PR #141374)   Kazu Hirata via llvm-commits
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• [llvm] [ARM] Remove unused includes (NFC) (PR #141377)   Kazu Hirata via llvm-commits
• [llvm] [RISCV] Remove unused includes (NFC) (PR #141378)   Kazu Hirata via llvm-commits
• [llvm] [X86] Remove unused includes (NFC) (PR #141379)   Kazu Hirata via llvm-commits
• [llvm] [RISCV] Use llvm::is_contained (NFC) (PR #141372)   Kazu Hirata via llvm-commits
• [llvm] [Support] Use std::map::try_emplace (NFC) (PR #141374)   Kazu Hirata via llvm-commits
• [llvm] [AArch64] Remove unused includes (NFC) (PR #141375)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Remove unused includes (NFC) (PR #141376)   Kazu Hirata via llvm-commits
• [llvm] [ARM] Remove unused includes (NFC) (PR #141377)   Kazu Hirata via llvm-commits
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• [llvm] [X86] Remove unused includes (NFC) (PR #141379)   Kazu Hirata via llvm-commits
• [lld] [lld] Fix a typo in documentation (PR #141383)   Kazu Hirata via llvm-commits
• [llvm] [ExecutionEngine] Use llvm::none_of (NFC) (PR #141387)   Kazu Hirata via llvm-commits
• [lld] [lld] Remove unused includes (NFC) (PR #141388)   Kazu Hirata via llvm-commits
• [llvm] [llvm-objcopy] Remove unused includes (NFC) (PR #141389)   Kazu Hirata via llvm-commits
• [llvm] [llvm-objdump] Remove unused includes (NFC) (PR #141390)   Kazu Hirata via llvm-commits
• [lld] [lld] Fix a typo in documentation (PR #141383)   Kazu Hirata via llvm-commits
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• [llvm] [VectorCombine] Support nary operands and intrinsics in scalarizeOpOrCmp (PR #138406)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Support nary operands and intrinsics in scalarizeOpOrCmp (PR #138406)   Luke Lau via llvm-commits
• [llvm] [IR] Add llvm.vector.[de]interleave{4,6,8} (PR #139893)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Remove dead poison check. NFCI (PR #141264)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Remove dead poison check. NFCI (PR #141264)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   Luke Lau via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Remove dead poison check. NFCI (PR #141264)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold shuffled intrinsic operands with constant operands (PR #141300)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Luke Lau via llvm-commits
• [llvm] [IR] Add llvm.vector.[de]interleave{4,6,8} (PR #139893)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Luke Lau via llvm-commits
• [llvm] [BOLT][AArch64] Add tests for unsupported conditional tailcalls (PR #139565)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Fix crash for conditional tail calls (PR #140669)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Add tests for unsupported conditional tailcalls (PR #139565)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT, test] Add --image-base to tests that use --section-start (PR #140570)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Optimize the codegen of createLoadImmediate for AArch64. (PR #137413)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix references in ignored functions in CFG state (PR #140678)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix references in ignored functions in CFG state (PR #140678)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Never call fixBranches() on non-simple functions (PR #141112)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Never call fixBranches() on non-simple functions (PR #141112)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][heatmap] Produce zoomed-out heatmaps (PR #140153)   Maksim Panchenko via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Malay Sanghi via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Malay Sanghi via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   Manish Kausik H via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   Manish Kausik H via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   Manish Kausik H via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   Manish Kausik H via llvm-commits
• [llvm] Don't collect from phi nodes which are not fully constructed yet (PR #140806)   Manuel Drehwald via llvm-commits
• [llvm] [SPIRV] Addition of @llvm.lround.* and @llvm.llround.* intrinsic (PR #129240)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] Rename GsymDIContext to GsymContext (PR #140227)   Mariusz Kwiczala via llvm-commits
• [llvm] Revert "[X86] Improve @gotpcrel on local symbol tests" (PR #141021)   Mariusz Sikora via llvm-commits
• [llvm] Revert "[X86] Improve @gotpcrel on local symbol tests" (PR #141021)   Mariusz Sikora via llvm-commits
• [llvm] Revert "[X86] Improve @gotpcrel on local symbol tests" (PR #141021)   Mariusz Sikora via llvm-commits
• [llvm] Revert "[X86] Improve @gotpcrel on local symbol tests" (PR #141021)   Mariusz Sikora via llvm-commits
• [llvm] Revert "[X86] Improve @gotpcrel on local symbol tests" (PR #141021)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Introduce FeatureISAVersion11_5_Common. NFC. (PR #141061)   Mariusz Sikora via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   Martijn Courteaux via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Martin Storsjö via llvm-commits
• [llvm] [LLVM][Cygwin] add workaround for blocking connect/accept in AF_UNIX sockets (PR #140353)   Martin Storsjö via llvm-commits
• [clang] [flang] [lld] [lldb] [llvm] [mlir] [polly] [CMake] respect LLVMConfig.cmake's LLVM_DEFINITIONS in standalone builds (PR #138587)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on Windows (PR #139945)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on Windows (PR #139945)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on Windows (PR #139945)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on Windows (PR #139945)   Martin Storsjö via llvm-commits
• [clang] [libcxx] [llvm] Add unnecessary-virtual-specifier to -Wextra (PR #138741)   Martin Storsjö via llvm-commits
• [llvm] [LLVM][Cygwin] add workaround for blocking connect/accept in AF_UNIX sockets (PR #140353)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Martin Storsjö via llvm-commits
• [clang] [libcxx] [llvm] Add unnecessary-virtual-specifier to -Wextra (PR #138741)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Martin Storsjö via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Martin Storsjö via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Don't apply the "arm" or "armhf" patterns for targets starting with "arm64" (PR #141226)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Don't apply the "arm" or "armhf" patterns for targets starting with "arm64" (PR #141226)   Martin Storsjö via llvm-commits
• [llvm] fix zstd_shared detection on mingw (PR #139945)   Martin Storsjö via llvm-commits
• [llvm] [PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (PR #136145)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (PR #136145)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (PR #136145)   Maryam Moghadas via llvm-commits
• [llvm] update_mir_test_checks: keep commment embedded in MIR (PR #140016)   Matt Arsenault via llvm-commits
• [llvm] Revert "[InlineSpiller] Check rematerialization before folding operand (#134015)" (PR #137801)   Matt Arsenault via llvm-commits
• [llvm] IR: Reorder ConstantData enum values (PR #138638)   Matt Arsenault via llvm-commits
• [llvm] IR: Reorder ConstantData enum values (PR #138638)   Matt Arsenault via llvm-commits
• [llvm] IR: Reorder ConstantData enum values (PR #138638)   Matt Arsenault via llvm-commits
• [llvm] IR: Remove redundant UseList check in addUse (PR #138676)   Matt Arsenault via llvm-commits
• [llvm] IR: Remove redundant UseList check in addUse (PR #138676)   Matt Arsenault via llvm-commits
• [llvm] IR: Remove redundant UseList check in addUse (PR #138676)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MachineModuleSlotTracker (PR #140530)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Skip storing of stack arguments when lowering tail calls (PR #126735)   Matt Arsenault via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (PR #140536)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for G_SHUFFLE_VECTOR (PR #139505)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV] Add PreLegalizer pattern matching for `faceforward` (PR #139959)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Check for subreg match when folding through reg_sequence (PR #140582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Check for subreg match when folding through reg_sequence (PR #140582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Check for subreg match when folding through reg_sequence (PR #140582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Matt Arsenault via llvm-commits
• [llvm] [CGData] Return ArrayRef<std::string> in getNames (NFC) (PR #140675)   Matt Arsenault via llvm-commits
• [llvm] [CGData] Return ArrayRef<std::string> in getNames (NFC) (PR #140675)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [TableGen] Tach getInputFilename to return StringRef (NFC) (PR #140690)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #140691)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Fix ZExt known bits for scalable vectors. (PR #140213)   Matt Arsenault via llvm-commits
• [llvm] [bugpoint] Use a range-based for loop (NFC) (PR #140743)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #140742)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Handle addrspacecast null to p7 (PR #140775)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Handle addrspacecast null to p7 (PR #140775)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Skip storing of stack arguments when lowering tail calls (PR #126735)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Matt Arsenault via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Matt Arsenault via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Move all pure AMDGPUAttributor related test files to `llvm/test/Transforms/Attributor/AMDGPU/` (PR #140815)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Fix ShuffleVector assert (PR #139769)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #140844)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #140843)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: VIMAGE/VSAMPLE are bundle candidates (PR #140854)   Matt Arsenault via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Stop trying to insert pointer bitcasts (PR #140873)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Stop trying to insert pointer bitcasts (PR #140873)   Matt Arsenault via llvm-commits
• [llvm] InferAddressSpaces: Stop trying to insert pointer bitcasts (PR #140873)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SDAG] Fix selection of extend of v1if16 SETCC (PR #140274)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Matt Arsenault via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   Matt Arsenault via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   Matt Arsenault via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   Matt Arsenault via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Matt Arsenault via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Matt Arsenault via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Matt Arsenault via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Matt Arsenault via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix computation of waves/EU maximum (PR #140921)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix computation of waves/EU maximum (PR #140921)   Matt Arsenault via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Matt Arsenault via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Matt Arsenault via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Matt Arsenault via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   Matt Arsenault via llvm-commits
• [llvm] [SCCPSolver] Mark several functions const (NFC) (PR #140926)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Fix opsel for scaled MFMA operations (PR #140183)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Fix opsel for scaled MFMA operations (PR #140183)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Fix opsel for scaled MFMA operations (PR #140183)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Fix opsel for scaled MFMA operations (PR #140183)   Matt Arsenault via llvm-commits
• [llvm] Add live in for PrivateSegmentSize in GISel path (PR #139968)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Make v2f32 -> v2f16 legal when target supports v_cvt_pk_f16_f32 (PR #139956)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Matt Arsenault via llvm-commits
• [llvm] [UniformAnalysis] Use Immediate postDom as last join (PR #140013)   Matt Arsenault via llvm-commits
• [llvm] [UniformAnalysis] Use Immediate postDom as last join (PR #140013)   Matt Arsenault via llvm-commits
• [llvm] [UniformAnalysis] Use Immediate postDom as last join (PR #140013)   Matt Arsenault via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   Matt Arsenault via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Matt Arsenault via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (PR #140002)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (PR #140002)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extend SRA i64 simplification for shift amts in range [33:62] (PR #138913)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extend SRA i64 simplification for shift amts in range [33:62] (PR #138913)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Matt Arsenault via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MachineModuleSlotTracker (PR #140530)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Avoid MachineModuleInfo in MachineModuleSlotTracker (PR #140530)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Matt Arsenault via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Simplify definition of AddrSpaces. NFC. (PR #141030)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Matt Arsenault via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Matt Arsenault via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Matt Arsenault via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (PR #139085)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Matt Arsenault via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   Matt Arsenault via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fix comment typo that incorrectly described fold (NFC) (PR #141105)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Form v_med_f32 from minimumnum/maximumnum immediate pattern (PR #141048)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Form v_med_f32 from minimumnum/maximumnum immediate pattern (PR #141048)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Form v_med_f32 from minimumnum/maximumnum immediate pattern (PR #141048)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Move `flat_atomic.ll` to `llvm/test/CodeGen/AMDGPU/` (PR #141126)   Matt Arsenault via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Matt Arsenault via llvm-commits
• [llvm] [MC] Fix HIP buildbot errors after 68472a3 (PR #141138)   Matt Arsenault via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle hazard in v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16. (PR #140218)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Move `flat_atomic.ll` to `llvm/test/CodeGen/AMDGPU/` (PR #141126)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Matt Arsenault via llvm-commits
• [llvm] [MC] Remove unused includes (NFC) (PR #141321)   Matt Arsenault via llvm-commits
• [llvm] [IPO] Teach AbstractAttribute::getName to return StringRef (NFC) (PR #141313)   Matt Arsenault via llvm-commits
• [llvm] [IPO] Teach AbstractAttribute::getName to return StringRef (NFC) (PR #141313)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Remove unused includes (NFC) (PR #141319)   Matt Arsenault via llvm-commits
• [llvm] [llvm-reduce] Remove unused includes (NFC) (PR #141322)   Matt Arsenault via llvm-commits
• [llvm] github: Add llvm-reduce to PR autolabeler (PR #141335)   Matt Arsenault via llvm-commits
• [llvm] github: Add llvm-reduce to PR autolabeler (PR #141335)   Matt Arsenault via llvm-commits
• [llvm] github: Add llvm-reduce to PR autolabeler (PR #141335)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Remove unused includes (NFC) (PR #141320)   Matt Arsenault via llvm-commits
• [lld] [lld] Use llvm::any_of (NFC) (PR #141316)   Matt Arsenault via llvm-commits
• [llvm] [XRay] Use llvm::is_contained (NFC) (PR #141318)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Matt Arsenault via llvm-commits
• [llvm] github: Add llvm-reduce to PR autolabeler (PR #141335)   Matt Arsenault via llvm-commits
• [llvm] [Bitcode] Remove unused includes (NFC) (PR #141354)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objdump] Remove unused includes (NFC) (PR #141390)   Matt Arsenault via llvm-commits
• [lld] [lld] Fix a typo in documentation (PR #141383)   Matt Arsenault via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objcopy] Remove unused includes (NFC) (PR #141389)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add export clustering post-RA scheduler test (NFC) (PR #141400)   Matt Arsenault via llvm-commits
• [llvm] [ExecutionEngine] Use llvm::none_of (NFC) (PR #141387)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cluster export instruction in PostRA Scheduler (PR #141399)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cluster export instruction in PostRA Scheduler (PR #141399)   Matt Arsenault via llvm-commits
• [lld] [lld] Remove unused includes (NFC) (PR #141421)   Matt Arsenault via llvm-commits
• [llvm] [IVDescriptor][LV] Return Instruction::Or for IAnyOf/FAnyOf in getOpcode(), nfc (PR #140242)   Mel Chen via llvm-commits
• [llvm] [VPlan] Clean up the function VPInstruction::generate for ComputeReductionResult, nfc (PR #140245)   Mel Chen via llvm-commits
• [llvm] [VPlan] Clean up the function VPInstruction::generate for ComputeReductionResult, nfc (PR #140245)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] [LV] Support strided load with a stride of -1 (PR #128718)   Mel Chen via llvm-commits
• [llvm] IVDesc: unify RecurKinds IAnyOf and FAnyOf (PR #118393)   Mel Chen via llvm-commits
• [llvm] [VPlan] Support VPWidenCastRecipe in narrowToSingleScalarRecipes. (PR #141080)   Mel Chen via llvm-commits
• [llvm] [IVDesc] Prefer empty m_Cmp on unused result (NFC) (PR #141071)   Mel Chen via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Mel Chen via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Mel Chen via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Mel Chen via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Mel Chen via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]AnyOf (PR #118393)   Mel Chen via llvm-commits
• [clang] [llvm] Revert "[lit][clang] Avoid realpath on Windows due to MAX_PATH limitations" (PR #139739)   Michael Jabbour via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   Michael Jabbour via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   Michael Jabbour via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   Michael Jabbour via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   Michael Jabbour via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   Michael Jabbour via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Michal Paszkowski via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Michał Górny via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   Michał Górny via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Michał Górny via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Michał Górny via llvm-commits
• [lld] [LLD][CMake][MSVC] Install PDBs alongside executables (PR #126680)   Miguel A. Arroyo via llvm-commits
• [lld] [LLD][CMake][MSVC] Install PDBs alongside executables (PR #126680)   Miguel A. Arroyo via llvm-commits
• [llvm] [VPlan] Add narrowToSingleScalarRecipe transform. (PR #139150)   Mikael Holmén via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Mikael Holmén via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Mikael Holmén via llvm-commits
• [llvm] [VPlan] Add narrowToSingleScalarRecipe transform. (PR #139150)   Mikael Holmén via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Mikael Holmén via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Min-Yih Hsu via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Min-Yih Hsu via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] b3c3297 - [RISCV] Fix missing WriteRes for Q extensions in SiFiveP800 scheudling model   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Min-Yih Hsu via llvm-commits
• [llvm] [GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Min-Yih Hsu via llvm-commits
• [llvm] [IA] Add support for [de]interleave{3,5,7} (PR #139373)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Correct operand names for vmv.s.x and vfmv.s.f pseudos. NFC (PR #140970)   Min-Yih Hsu via llvm-commits
• [llvm] [IR] Add llvm.vector.[de]interleave{4,6,8} (PR #139893)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Support LLVM IR intrinsics for XAndesVDot (PR #140223)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis][Docs] --dump-object-to-disk option is specified by filename rather than bool (PR #141178)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Remove redundant vsetvli by repeating the coalesce phase (PR #141298)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Remove redundant vsetvli by repeating the coalesce phase (PR #141298)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Remove redundant vsetvli by repeating the coalesce phase (PR #141298)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [clang][RISCV] Emit RISCV function-signature-based CFI label in llvm::Function metadata (PR #111661)   Ming-Yi Lai via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Mingming Liu via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Mingming Liu via llvm-commits
• [llvm] Revert "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141157)   Mingming Liu via llvm-commits
• [llvm] Revert "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141157)   Mingming Liu via llvm-commits
• [llvm] Re-apply "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141166)   Mingming Liu via llvm-commits
• [llvm] Re-apply "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141166)   Mingming Liu via llvm-commits
• [llvm] Re-apply "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141275)   Mingming Liu via llvm-commits
• [llvm] Re-apply "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141275)   Mingming Liu via llvm-commits
• [llvm] Re-apply "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141275)   Mingming Liu via llvm-commits
• [llvm] [mlir] Emitc.convert (PR #136621)   Mircea Trofin via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   Mircea Trofin via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   Mircea Trofin via llvm-commits
• [llvm] [PGO] Don't unconditionally request BBInfo in verifyFuncBFI() (PR #140804)   Mircea Trofin via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   Mircea Trofin via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   Mircea Trofin via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   Mircea Trofin via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   Mircea Trofin via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   Mircea Trofin via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   Mircea Trofin via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   Mircea Trofin via llvm-commits
• [llvm] Minor typo fix in IR2Vec section of MLGO doc (PR #141162)   Mircea Trofin via llvm-commits
• [llvm] Minor typo fix in IR2Vec section of MLGO doc (PR #141162)   Mircea Trofin via llvm-commits
• [llvm] Changing creation of TensorSpec in a type agnostic manner. (PR #141161)   Mircea Trofin via llvm-commits
• [llvm] [MLInlineAdvisor] Changing creation of TensorSpec in a type agnostic manner. (PR #141161)   Mircea Trofin via llvm-commits
• [llvm] [MLInlineAdvisor] Changing creation of TensorSpec in a type agnostic manner. (PR #141161)   Mircea Trofin via llvm-commits
• [llvm] [docs][mlgo] Document custom builds (PR #141243)   Mircea Trofin via llvm-commits
• [llvm] [docs][mlgo] Document custom builds (PR #141243)   Mircea Trofin via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   Mircea Trofin via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   Mircea Trofin via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Mirko Brkušanin via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Mirko Brkušanin via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU] Introduce FeatureISAVersion11_5_Common. NFC. (PR #141061)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][NFC] Rename IEEEMinMax to IEEEMinMaxInsts (PR #141081)   Mirko Brkušanin via llvm-commits
• [clang] [lld] [llvm] [polly] Fix regression tests with bad FileCheck checks (PR #140373)   Mohamed Emad via llvm-commits
• [clang] [lld] [llvm] [polly] Fix regression tests with bad FileCheck checks (PR #140373)   Mohamed Emad via llvm-commits
• [clang] [lld] [llvm] [polly] Fix regression tests with bad FileCheck checks (PR #140373)   Mohamed Emad via llvm-commits
• [clang] [lld] [llvm] [polly] Fix regression tests with bad FileCheck checks (PR #140373)   Mohamed Emad via llvm-commits
• [compiler-rt] [compiler-rt][MSVC][CMake] Wrap Linker flags for ICX (PR #118496)   Mészáros Gergely via llvm-commits
• [compiler-rt] [compiler-rt][MSVC][CMake] Wrap Linker flags for ICX (PR #118496)   Mészáros Gergely via llvm-commits
• [compiler-rt] [compiler-rt][MSVC][CMake] Wrap Linker flags for ICX (PR #118496)   Mészáros Gergely via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   Nabeel Omer via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Nicholas Guy via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Nick Sarnie via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Nick Sarnie via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Nick Sarnie via llvm-commits
• [llvm] a04cff1 - [gn] port 3bae8e2ef2ff0   Nico Weber via llvm-commits
• [llvm] f78a081 - [gn] port d561d595c4ee (clang riscv_andes_vector.td)   Nico Weber via llvm-commits
• [llvm] 08b21c8 - [gn] fix mistake in f78a081cdb3   Nico Weber via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Nico Weber via llvm-commits
• [llvm] eb37abe - [gn] port 50127ac054a0 (AttributeSpellingList.inc)   Nico Weber via llvm-commits
• [llvm] fd1c4c3 - [gn] port 97dee78eb364 (ClangDocTests config.h)   Nico Weber via llvm-commits
• [llvm] fe09550 - [gn] port 7dc7c155251   Nico Weber via llvm-commits
• [llvm] 9d10305 - [gn build] Port 51a03ed27282   Nico Weber via llvm-commits
• [llvm] 7c093ed - [gn build] Port 58ab005d8db2   Nico Weber via llvm-commits
• [llvm] 710ef17 - [gn build] Port 760bf4f116f9   Nico Weber via llvm-commits
• [llvm] 21cbc8a - [gn build] Port 9502d1bcb27d   Nico Weber via llvm-commits
• [llvm] d045eb1 - [gn build] Port ed75e2114fd4   Nico Weber via llvm-commits
• [llvm] 01cb390 - [gn] follow up to CLANG_DOC_TEST_ASSET_DIR   Nico Weber via llvm-commits
• [llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)   Nicolai Hähnle via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Nikita Popov via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   Nikita Popov via llvm-commits
• [llvm] [NFC][llvm] Comment on validity of volatile ops on null (PR #139803)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Comment on validity of volatile ops on null (PR #139803)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Comment on validity of volatile ops on null (PR #139803)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Support target extension types in vectors (PR #140630)   Nikita Popov via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Nikita Popov via llvm-commits
• [llvm] [MachO] Improve bounds check (PR #141083)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Only consider provenance capture in store speculation (PR #138548)   Nikita Popov via llvm-commits
• [llvm] [IRMover] Don't consider opaque types isomorphic to other types (PR #138241)   Nikita Popov via llvm-commits
• [llvm] [Inline] Only consider provenance captures for scoped alias metadata (PR #138540)   Nikita Popov via llvm-commits
• [llvm] [IndVars] Improve code; use SCEVPatternMatch (NFC) (PR #139533)   Nikita Popov via llvm-commits
• [llvm] [IndVars] Improve code; use SCEVPatternMatch (NFC) (PR #139533)   Nikita Popov via llvm-commits
• [llvm] [IndVars] Improve code; use SCEVPatternMatch (NFC) (PR #139533)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Increase coverage of shuffle-gep (PR #139725)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Preserve GEP no-wrap flags (PR #141113)   Nikita Popov via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Nikita Popov via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Nikita Popov via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Nikita Popov via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Nikita Popov via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Nikita Popov via llvm-commits
• [llvm] [LAA] Strip isNoWrapGEP: dead code (NFC) (PR #140308)   Nikita Popov via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Nikita Popov via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove dead poison check. NFCI (PR #141264)   Nikita Popov via llvm-commits
• [llvm] IR: Make Module::getOrInsertGlobal() return a GlobalVariable. (PR #141323)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Nikita Popov via llvm-commits
• [llvm] [IR] Add llvm.vector.[de]interleave{4,6,8} (PR #139893)   Nikita Popov via llvm-commits
• [llvm] [IR] Add llvm.vector.[de]interleave{4,6,8} (PR #139893)   Nikita Popov via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   Nikita Popov via llvm-commits
• [llvm] [AArch64] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Nikita Popov via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nikita Popov via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nikita Popov via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nikita Popov via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nikita Popov via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nikita Popov via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Update comments for PredicateAssume (PR #139269)   Nikita Popov via llvm-commits
• [llvm] [NewGVN] Precommit test (PR #141362)   Nikita Popov via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Nikita Popov via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   Nikita Popov via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Update comments for PredicateAssume (NFC) (PR #139269)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Update comments for PredicateAssume (NFC) (PR #139269)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Forward memcpy source to load instruction (PR #140249)   Nikita Popov via llvm-commits
• [libcxx] [llvm] [libc++] Bump the docker image hash (PR #140517)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libc++] Bump the docker image hash (PR #140517)   Nikolas Klauser via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   Nikolay Panchenko via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nuno Lopes via llvm-commits
• [llvm] LangRef: storing poison in memory is UB (PR #141339)   Nuno Lopes via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Nuno Lopes via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Oliver Hunt via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Oliver Hunt via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Oliver Hunt via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Oliver Hunt via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Oliver Hunt via llvm-commits
• [llvm] [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (PR #140593)   Oliver Stannard via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Add debuginfo C support for a SetType, Subrangetype, dynamic array type and replace arrays (PR #135607)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Add debuginfo C support for a SetType, Subrangetype, dynamic array type and replace arrays (PR #135607)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Merge debug locs on common hoisted code (PR #140063)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Oscar Smith via llvm-commits
• [llvm] [BOLT][AArch64] Add tests for unsupported conditional tailcalls (PR #139565)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Fix crash for conditional tail calls (PR #140669)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add tests for unsupported conditional tailcalls (PR #139565)   Paschalis Mpeis via llvm-commits
• [llvm] Add initial support for SPE brstack format (PR #129231)   Paschalis Mpeis via llvm-commits
• [llvm] [bazel][mlir] Add missing dep for 747620d (PR #140830)   Pat Doyle via llvm-commits
• [llvm] [bazel][test] Continue fixing bazel build from 97dee78 (PR #141336)   Pat Doyle via llvm-commits
• [llvm] [bazel][test] Continue fixing bazel build from 97dee78 (PR #141336)   Pat Doyle via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   Paul Kirth via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   Paul Kirth via llvm-commits
• [llvm] Resolve Failing LIT test on Fuchsia (PR #141253)   Paul Kirth via llvm-commits
• [llvm] Resolve Failing LIT test on Fuchsia (PR #141253)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [compiler-rt] [asan][test] Disable asan_lsan_deadlock test (PR #141145)   Paul Kirth via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Paul Walker via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   Paul Walker via llvm-commits
• [llvm] [LLVM][AArch64] Correctly lower funnel shifts by zero. (PR #140058)   Paul Walker via llvm-commits
• [llvm] [LLVM][AArch64] Correctly lower funnel shifts by constants. (PR #140058)   Paul Walker via llvm-commits
• [llvm] [LLVM][AArch64] Correctly lower funnel shifts by constants. (PR #140058)   Paul Walker via llvm-commits
• [llvm] [AArch64] Remove unused ISD nodes (NFC) (PR #140706)   Paul Walker via llvm-commits
• [clang] [flang] [llvm] [Clang][Driver][fveclib] Fix target parsing for -fveclib=AMDLIBM option (PR #140544)   Paul Walker via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][SROA] Teach SROA how to "bitcast" between fixed and scalable vectors. (PR #130973)   Paul Walker via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   Paul Walker via llvm-commits
• [llvm] [AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (PR #140062)   Paul Walker via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Paul Walker via llvm-commits
• [llvm] [AArch64] Consistently use/don't use glue with AArch64ISD nodes (NFC) (PR #140715)   Paul Walker via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   Paul Walker via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [RISCV][NFC] Fix the mismatch in comment (PR #140511)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][NFC] Fix the mismatch in comment (PR #140511)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Sort RISCVSystemOperands to match the RISC-V Privilege Specification. (PR #140967)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_STORE to widen MSTORE in type legalization when possible. (PR #140991)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_STORE to widen MSTORE in type legalization when possible. (PR #140991)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_STORE to widen MSTORE in type legalization when possible. (PR #140991)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Use RISCVTargetInstrInfo::copyPhysReg in RISCVMakeCompressible. NFC (PR #141296)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Petar Avramovic via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Collingbourne via llvm-commits
• [llvm] IR: Make Module::getOrInsertGlobal() return a GlobalVariable. (PR #141323)   Peter Collingbourne via llvm-commits
• [llvm] AArch64: Clear hasSideEffects on AUT and AUTPAC. (PR #141330)   Peter Collingbourne via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (WORK IN PROGRESS) (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (WORK IN PROGRESS) (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (WORK IN PROGRESS) (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (WORK IN PROGRESS) (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (WORK IN PROGRESS) (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (PR #137727)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (PR #137727)   Peter Klausler via llvm-commits
• [llvm] [ML Inliner] Fix inconsistancy between CallGraph and FunctionLevels (PR #122830)   Peter Rong via llvm-commits
• [llvm] [ML Inliner] Fix inconsistancy between CallGraph and FunctionLevels (PR #122830)   Peter Rong via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Peter Smith via llvm-commits
• [lld] [ELF] Error if a section address is smaller than image base (PR #140187)   Peter Smith via llvm-commits
• [llvm] Add llvm-project archive issues for Chromium bug tracker (PR #132030)   Peter Smith via llvm-commits
• [llvm] Add llvm-project archive issues for Chromium bug tracker (PR #132030)   Peter Smith via llvm-commits
• [llvm] Add llvm-project archive issues for Chromium bug tracker (PR #132030)   Peter Smith via llvm-commits
• [llvm] Add llvm-project archive issues for Chromium bug tracker (PR #132030)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Peter Smith via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Smith via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Smith via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Smith via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Smith via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Smith via llvm-commits
• [lld] ELF: Add branch-to-branch optimization. (PR #138366)   Peter Smith via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   Petr Hosek via llvm-commits
• [clang] [flang] [lld] [lldb] [llvm] [mlir] [polly] [CMake] respect LLVMConfig.cmake's LLVM_DEFINITIONS in standalone builds (PR #138587)   Petr Hosek via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [libcxxabi][libunwind] Support for using LLVM libc (PR #134893)   Petr Hosek via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (PR #140631)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)   Philip Reames via llvm-commits
• [llvm] [Docs][RISCV] Move Zilsd to 'Supported' status. NFC (PR #140757)   Philip Reames via llvm-commits
• [llvm] 8708c42 - [RISCV] Add zvqdotq tests using partial.reduce.add [nfc]   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   Philip Reames via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   Philip Reames via llvm-commits
• [llvm] 04d10f1 - [RISCV] Expand zvqdotq partial.reduce test variants   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add tests for widening fixed vector masked loads/stores. NFC (PR #140949)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Philip Reames via llvm-commits
• [llvm] c21416d - [RISCV][TTI] Add test coverage for getPartialReductionCost [nfc]   Philip Reames via llvm-commits
• [llvm] [RISCV] Correct operand names for vmv.s.x and vfmv.s.f pseudos. NFC (PR #140970)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   Philip Reames via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   Philip Reames via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Philip Reames via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Philip Reames via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Philip Reames via llvm-commits
• [llvm] [AArch64][SelectionDAG] Add type legalization for partial reduce wide adds (PR #141075)   Philip Reames via llvm-commits
• [llvm] [AArch64][SelectionDAG] Add type legalization for partial reduce wide adds (PR #141075)   Philip Reames via llvm-commits
• [llvm] [AArch64][SelectionDAG] Add type legalization for partial reduce wide adds (PR #141075)   Philip Reames via llvm-commits
• [llvm] [Local] Verify opcodes match for all insts passed to mergeFlags (NFC). (PR #141231)   Philip Reames via llvm-commits
• [llvm] [WIP][SDAG] Add partial_reduce_sumla node (PR #141267)   Philip Reames via llvm-commits
• [llvm] [WIP][SDAG] Add partial_reduce_sumla node (PR #141267)   Philip Reames via llvm-commits
• [llvm] [TTI] Provide a cost for memset_pattern which matches the libcall (PR #139978)   Philip Reames via llvm-commits
• [llvm] [MCP] Handle iterative simplification during forward copy prop (PR #140267)   Philip Reames via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Adjust costing in getPartialReductionCost for zvqdotq (PR #141430)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   Philip Reames via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Phoebe Wang via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   Phoebe Wang via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Phoebe Wang via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Phoebe Wang via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Phoebe Wang via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Phoebe Wang via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Phoebe Wang via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Phoebe Wang via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   Pierre van Houtryve via llvm-commits
• [llvm] Update security group affiliation (PR #141027)   Pietro Albini via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Piotr Fusik via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Remove redundant vsetvli by repeating the coalesce phase (PR #141298)   Piyou Chen via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [lld] [lld][ELF] Merge equivalent symbols found during ICF (PR #139493)   Pranav Kant via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [clang] [llvm] [NFCI] Avoid adding duplicated SpecialCaseList::Sections. (PR #140478)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI] Avoid adding duplicated SpecialCaseList::Sections. (PR #140478)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI] Avoid adding duplicated SpecialCaseList::Sections. (PR #140478)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] change GlobPattern:Prefix from stringref to string. (PR #141270)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Qinkun Bao via llvm-commits
• [clang] [lld] [llvm] Adding Matching and Inference Functionality to Propeller (PR #139008)   Rahman Lavaee via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Rahman Lavaee via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Rahman Lavaee via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   Rahman Lavaee via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Use SmallVector range constructor when possible (PR #140284)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Use SmallVector range constructor when possible (PR #140284)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Use SmallVector range constructor when possible (PR #140284)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Use SmallVector range constructor when possible (PR #140284)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (PR #140002)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   Rahul Joshi via llvm-commits
• [llvm] [utils][TableGen] Remove unused parameter in DirectiveEmitter, NFC (PR #140605)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][ADT] Add support for `std::string += Twine` operator (PR #140644)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (PR #140002)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (PR #140002)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Code cleanup in StringMatcher (PR #141118)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Code cleanup in StringMatcher (PR #141118)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Code cleanup in StringMatcher (PR #141118)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Use formatv automatic index assignment in PassBuilder (PR #141286)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Use formatv automatic index assignment in PassBuilder (PR #141286)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor namespace fixes in PassBuilder (PR #141288)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Extend "Use Namespace Qualifiers" to variables (PR #141289)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodingStandard] Extend "Use Namespace Qualifiers" to variables (PR #141289)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Use formatv automatic index assignment in PassBuilder (PR #141286)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor namespace fixes in PassBuilder (PR #141288)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor namespace fixes in PassBuilder (PR #141288)   Rahul Joshi via llvm-commits
• [llvm] [AArch64] Extend usage of `XAR` instruction for fixed-length operations (PR #139460)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [AArch64] Extend usage of `XAR` instruction for fixed-length operations (PR #139460)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [AArch64] Extend usage of `XAR` instruction for fixed-length operations (PR #139460)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: storing poison in memory is UB (PR #141339)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   Ralf Jung via llvm-commits
• [llvm] LangRef: storing poison in memory is UB (PR #141339)   Ralf Jung via llvm-commits
• [llvm] [LAA] Clean up APInt-overflow related code (NFC) (PR #140048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Clean up APInt-overflow related code (NFC) (PR #140048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer, fixing freeze (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer, fixing freeze (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer, fixing freeze (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Introduce m_scev_AffineAddRec (PR #140377)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer, fixing freeze (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce VPlan-level constant folder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce VPlan-level constant folder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Improve code; use SCEVPatternMatch (NFC) (PR #139540)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold isPredicatedInst into isMaskRequired (PR #134261)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Keep pointer checks on partial analysis (PR #139719)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve code in findForkedSCEVs (NFC) (PR #140384)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce VPlan-level constant folder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce constant folder in simplifyRecipe (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce constant folder in simplifyRecipe (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce constant folder in simplifyRecipe (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Rewrite findForkedPointer (NFCI) (PR #140298)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IndVars] Improve code in isLoopCounter (NFC) (PR #139533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Refine loop-invariance checks (PR #127516)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Tweak debug output for UTC stability (PR #140764)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Introduce new analysis (PR #139120)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Strip isNoWrapGEP: dead code (NFC) (PR #140308)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   Ramkumar Ramachandra via llvm-commits
• [llvm] IVDesc: unify RecurKinds IAnyOf and FAnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] IVDesc: unify RecurKinds IAnyOf and FAnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] IVDesc: unify RecurKinds IAnyOf and FAnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds IAnyOf and FAnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Prefer empty m_Cmp on unused result (NFC) (PR #141071)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds IAnyOf and FAnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlanUtils] Use TypeSwitch to simplify isSingleScalar(). nfc (PR #141074)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Support VPWidenCastRecipe in narrowToSingleScalarRecipes. (PR #141080)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]FindLastIV (NFC) (PR #141082)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IR] Strip dead code post ConstExpr removals (NFC) (PR #139524)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Increase coverage of shuffle-gep (PR #139725)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Strip dead check in processLoopMemSet (NFC) (PR #141100)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Preserve GEP no-wrap flags (PR #141113)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]AnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IndVars] Improve code; use SCEVPatternMatch (NFC) (PR #139533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Strip isNoWrapGEP: dead code (NFC) (PR #140308)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]FindLastIV (NFC) (PR #141082)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Preserve GEP no-wrap flags (PR #141113)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Keep pointer checks on partial analysis (PR #139719)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]AnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]AnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]AnyOf (PR #118393)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in IRBuilder (PR #141225)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in IRBuilder (PR #141225)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Reuse IRBuilder with InsertPointGuard (NFC) (PR #141236)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip dead includes in VPRecipeBuilder (NFC) (PR #141239)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve cast code in VPlanRecipes (NFC) (PR #141240)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ValueTracking] Make the MaxAnalysisRecursionDepth overridable (PR #137721)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in IRBuilder (PR #141225)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in IRBuilder (PR #141225)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip dead includes in VPRecipeBuilder (NFC) (PR #141239)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   Ramkumar Ramachandra via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Reid Kleckner via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Reid Kleckner via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Reid Kleckner via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Reid Kleckner via llvm-commits
• [llvm] [AArch64] Neoverse V2 FeatureDisableLatencySchedHeuristic (PR #140897)   Ricardo Jesus via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Richard Howell via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Richard Howell via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Richard Howell via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Richard Howell via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: reject known out-of-bounds index (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (PR #139700)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   Robert Imschweiler via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Rohit Aggarwal via llvm-commits
• [llvm] Update the base and index value for masked gather (PR #130920)   Rohit Aggarwal via llvm-commits
• [llvm] Update the base and index value for masked gather (PR #130920)   Rohit Aggarwal via llvm-commits
• [clang] [flang] [llvm] [Clang][Driver][fveclib] Fix target parsing for -fveclib=AMDLIBM option (PR #140544)   Rohit Aggarwal via llvm-commits
• [clang] [flang] [llvm] [Clang][Driver][fveclib] Fix target parsing for -fveclib=AMDLIBM option (PR #140544)   Rohit Aggarwal via llvm-commits
• [clang] [flang] [llvm] [Clang][Driver][fveclib] Fix target parsing for -fveclib=AMDLIBM option (PR #140544)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)   Rohit Aggarwal via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Ross Brunton via llvm-commits
• [llvm] [Offload] Add Error Codes to PluginInterface (PR #138258)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism and lower-case messages (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism and lower-case messages (PR #139275)   Ross Brunton via llvm-commits
• [llvm] [Offload] Make OffloadAPI error messages more readable (PR #140728)   Ross Brunton via llvm-commits
• [llvm] [Offload] Make OffloadAPI error messages more readable (PR #140728)   Ross Brunton via llvm-commits
• [llvm] [Offload] Make OffloadAPI gtest error messages more readable (PR #140728)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Ross Brunton via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   Ross Brunton via llvm-commits
• [llvm] [LoopInterchange] Remove 'I' dependency (PR #140709)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Remove 'I' dependency (PR #140709)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Remove 'I' dependency (PR #140709)   Ryotaro Kasuga via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   S. VenkataKeerthy via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   S. VenkataKeerthy via llvm-commits
• [llvm] Changing creation of TensorSpec in a type agnostic manner. (PR #141161)   S. VenkataKeerthy via llvm-commits
• [llvm] Minor typo fix in IR2Vec section of MLGO doc (PR #141162)   S. VenkataKeerthy via llvm-commits
• [llvm] [MLInlineAdvisor] Changing creation of TensorSpec in a type agnostic manner. (PR #141161)   S. VenkataKeerthy via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] revert preprocessor dump method guards from llvm::ScaledNumber (PR #140574)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (PR #140653)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Use `LLVM_BUILD_DEBUG` in class definitions (PR #140265)   Saleem Abdulrasool via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Saleem Abdulrasool via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DWARFLinker, llvm/DWP, and llvm/Demangle for DLL export (PR #140782)   Saleem Abdulrasool via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Sam Clegg via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Sam Clegg via llvm-commits
• [lld] [lldb] [NFC] Address more bit-field storage sizes (PR #140493)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   Sam Clegg via llvm-commits
• [llvm] RISCV, LoongArch: Encode RELAX relocation implicitly (PR #140494)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (PR #140631)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)   Sam Elliott via llvm-commits
• [llvm] [Docs][RISCV] Move Zilsd to 'Supported' status. NFC (PR #140757)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Sort RISCVSystemOperands to match the RISC-V Privilege Specification. (PR #140967)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   Sam Elliott via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Sam Elliott via llvm-commits
• [llvm] [TableGen] Remove wrong comment for CodeGenTarget ctor (PR #141024)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Correctly account for the copy cost of GPR pairs in RISCVMakeCompressible. (PR #141251)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Prevent copying dummy_reg_pair_with_x0 in RISCVMakeCompressible. (PR #141261)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Prevent using dummy_reg_pair_with_x0 in more places. (PR #141273)   Sam Elliott via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Sam Elliott via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Sam Elliott via llvm-commits
• [llvm] RISCV: Remove shouldForceRelocation and unneeded relocations (PR #140692)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use RISCVTargetInstrInfo::copyPhysReg in RISCVMakeCompressible. NFC (PR #141296)   Sam Elliott via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove unused includes (NFC) (PR #141378)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use llvm::is_contained (NFC) (PR #141372)   Sam Elliott via llvm-commits
• [llvm] [TableGen] Remove wrong comment for CodeGenTarget ctor (PR #141024)   Sam Elliott via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)   Sam Tebbs via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Fixed control-div early stop (PR #139667)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove unused ISD nodes (NFC) (PR #140706)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Split AArch64ISD::COND_SMSTART/STOP off AArch64::SMSTART/STOP (NFC) (PR #140711)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)   Sander de Smalen via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   Santanu Das via llvm-commits
• [llvm] [DirectX] scalarize the dx.isinf intrinsic (PR #140638)   Sarah Spall via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Sarah Spall via llvm-commits
• [llvm] [HLSL] Move DXILResourceImplicitBinding pass closer to DXIL Resource Analysis (PR #140981)   Sarah Spall via llvm-commits
• [llvm] [DirectX] change makedouble return type to overloadTy (PR #141156)   Sarah Spall via llvm-commits
• [llvm] [DirectX] change makedouble return type to overloadTy (PR #141156)   Sarah Spall via llvm-commits
• [llvm] [flang][rt] Fix the use of kNoAsyncId -> kNoAsyncObject (PR #141079)   Scott Manley via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Sebastian Kreutzer via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   Sebastian Kreutzer via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   Sebastian Kreutzer via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   Sebastian Kreutzer via llvm-commits
• [compiler-rt] [compiler-rt][XRay] Make `xray_interface.h` C compliant (PR #140068)   Sebastian Kreutzer via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   Sebastian Kreutzer via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   Sebastian Kreutzer via llvm-commits
• [llvm] [DA] handle memory accesses with different offsets and strides (PR #123436)   Sebastian Pop via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Sergei Barannikov via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   Sergei Barannikov via llvm-commits
• [llvm] [mlir] [WIP][MLIR][OpenMP] Support Generic-SPMD optimization for OpenMP dialect (PR #140918)   Sergio Afonso via llvm-commits
• [lld] [RISCV][lld] Guarding lld relaxation for RISCV (PR #130265)   Sharjeel Khan via llvm-commits
• [lld] [RISCV][lld] Guarding lld relaxation for RISCV (PR #130265)   Sharjeel Khan via llvm-commits
• [llvm] [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (PR #126779)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (PR #140093)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (PR #140093)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (PR #140093)   Shilei Tian via llvm-commits
• [llvm] [Offload] Use new error code handling mechanism (PR #139275)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Update tests to use autogened CHECKs (PR #140648)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Shilei Tian via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Shilei Tian via llvm-commits
• [llvm] [HIPSTDPAR] Add handling for math builtins (PR #140158)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (PR #126779)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (PR #126779)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (PR #126779)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (PR #126779)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Move all pure AMDGPUAttributor related test files to `llvm/test/Transforms/Attributor/AMDGPU/` (PR #140815)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Move all pure AMDGPUAttributor related test files to `llvm/test/Transforms/Attributor/AMDGPU/` (PR #140815)   Shilei Tian via llvm-commits
• [llvm] [OpenMP][GPU][FIX] Enable generic barriers in single threaded contexts (PR #140786)   Shilei Tian via llvm-commits
• [llvm] [GISel] Fix ShuffleVector assert (PR #139769)   Shilei Tian via llvm-commits
• [llvm] [GISel] Fix ShuffleVector assert (PR #139769)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] remove move instruction if there is no user of it (PR #136735)   Shilei Tian via llvm-commits
• [llvm] 0f2a469 - Revert "[AMDGPU] remove move instruction if there is no user of it (#136735)"   Shilei Tian via llvm-commits
• [llvm] [llvm-mca] Drop const from a return type (NFC) (PR #140836)   Shilei Tian via llvm-commits
• [polly] [polly] Drop const from return types (NFC) (PR #140837)   Shilei Tian via llvm-commits
• [llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #140838)   Shilei Tian via llvm-commits
• [llvm] [CodeGen] Use range-based for loops (NFC) (PR #140840)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Move all pure AMDGPUAttributor related test files to `llvm/test/Transforms/Attributor/AMDGPU/` (PR #140815)   Shilei Tian via llvm-commits
• [llvm] InferAddressSpaces: Stop trying to insert pointer bitcasts (PR #140873)   Shilei Tian via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Shilei Tian via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Shilei Tian via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix computation of waves/EU maximum (PR #140921)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   Shilei Tian via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Move `flat_atomic.ll` to `llvm/test/CodeGen/AMDGPU/` (PR #141126)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Move `flat_atomic.ll` to `llvm/test/CodeGen/AMDGPU/` (PR #141126)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Move `flat_atomic.ll` to `llvm/test/CodeGen/AMDGPU/` (PR #141126)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)   Shilei Tian via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   Shimin Cui via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Allow znver3/4/5 targets to use double-shift instructions by default (PR #132720)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Allow znver3/4/5 targets to use double-shift instructions by default (PR #132720)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] 52e1995 - [X86] Add tests showing failure to combine AVX512 shuffles to match "cross lane" SHLDQ/SRLDQ patterns using VALIGN   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (PR #140536)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Simon Pilgrim via llvm-commits
• [llvm] f3d36b1 - [X86] Add test coverage for #140534   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only elemnt0 is demanded (PR #140563)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Handle the case for gather where index is SHL (PR #139703)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (PR #140563)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][AMDGPU] Narrow Phi of Shuffles. (PR #140188)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (PR #140028)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (PR #140028)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (PR #140028)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (PR #140563)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (PR #140563)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (PR #140563)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (PR #140028)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Allow znver3/4/5 targets to use double-shift instructions by default (PR #132720)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineAdd - use SDPatternMatch to simplify "(add (zext (vXi1 X)), Y) -> (sub Y, (sext (vXi1 X)))" matching. (PR #140731)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   Simon Pilgrim via llvm-commits
• [llvm] [SLP][NFC]Make TreeEntry a class and store "need-to-schedule" state (PR #140734)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineAdd - use SDPatternMatch to simplify "(add (zext (vXi1 X)), Y) -> (sub Y, (sext (vXi1 X)))" matching. (PR #140731)   Simon Pilgrim via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV8F32Shuffle - use lowerShufflePairAsUNPCKAndPermute on AVX1 targets (PR #140881)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV8F32Shuffle - use lowerShufflePairAsUNPCKAndPermute on AVX1 targets (PR #140881)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use concatSubVectors instead of direct fold to X86ISD::SUBV_BROADCAST_LOAD (PR #140919)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use concatSubVectors instead of direct fold to X86ISD::SUBV_BROADCAST_LOAD (PR #140919)   Simon Pilgrim via llvm-commits
• [llvm] c42c91c - [X86] icmp-abs-C-vec.ll - regenerate test checks for TERNLOG comments   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - use isElementEquivalent to help identify hidden splat/broadcasts (PR #141035)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - use isElementEquivalent to help identify hidden splat/broadcasts (PR #141035)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (PR #141055)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (PR #141055)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (PR #141055)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (PR #141055)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV4F64Shuffle - prefer BLEND before UNPCK shuffle matching (PR #141073)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] APInt::clearBitsSlowCase - fix cut+paste typo when merging lo/himasks (PR #141108)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (PR #139741)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerVECTOR_SHUFFLE - canonicalize zeros/ones/fp splat constants to ensure no undefs (PR #141214)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerVECTOR_SHUFFLE - canonicalize zeros/ones/fp splat constants to ensure no undefs (PR #141214)   Simon Pilgrim via llvm-commits
• [llvm] 23a341e - [X86] vector-shuffle-combining-avx512bwvl.ll - regenerate test check   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support nary operands and intrinsics in scalarizeOpOrCmp (PR #138406)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support nary operands and intrinsics in scalarizeOpOrCmp (PR #138406)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make `(a & x) | (~a & y) -> (a & (x ^ y)) ^ y` available for all targets (PR #137641)   Simon Pilgrim via llvm-commits
• [llvm] 6680772 - OffloadBundle.h - fix "not all control paths return a value" MSVC warning   Simon Pilgrim via llvm-commits
• [llvm] 63eb004 - VPlanRecipes.cpp - fix "not all control paths return a value" MSVC warning   Simon Pilgrim via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   Simon Tatham via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   Simon Tatham via llvm-commits
• [llvm] [ARM] Remove kill flags in ReplaceConstByVPNOTs. (PR #140082)   Simon Tatham via llvm-commits
• [llvm] [ARM] Remove unused class member in ARMConstantIslandPass (PR #141093)   Simon Tatham via llvm-commits
• [llvm] [AMDGPU] Handle hazard in v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16. (PR #140218)   Siu Chi Chan via llvm-commits
• [llvm] [AArch64] Neoverse V2 FeatureDisableLatencySchedHeuristic (PR #140897)   Sjoerd Meijer via llvm-commits
• [llvm] [MachineScheduler][AArch64] Skip Neoverse V2 Pre-RA MISched for large vector intrinsic codes (PR #139557)   Sjoerd Meijer via llvm-commits
• [llvm] [MachineScheduler][AArch64] Skip Neoverse V2 Pre-RA MISched for large vector intrinsic codes (PR #139557)   Sjoerd Meijer via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Slava Zakharin via llvm-commits
• [llvm] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move Radix tree methods to their own header and cpp. (PR #140501)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move Radix tree methods to their own header and cpp. (PR #140501)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move Radix tree methods to their own header and cpp. (PR #140501)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move getGUID out of IndexedMemProfRecord (PR #140502)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move getGUID out of IndexedMemProfRecord (PR #140502)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move getGUID out of IndexedMemProfRecord (PR #140502)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move IndexedMemProfData to its own header. (PR #140503)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move IndexedMemProfData to its own header. (PR #140503)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move IndexedMemProfData to its own header. (PR #140503)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Add the LLVM license text and minor clean up. (PR #140504)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Add the LLVM license text and minor clean up. (PR #140504)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Add the LLVM license text and minor clean up. (PR #140504)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Snehasish Kumar via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   Snehasish Kumar via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   Snehasish Kumar via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (PR #140505)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Snehasish Kumar via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add NVVMRequiresSM op traits (PR #126886)   Srinivasa Ravi via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add NVVMRequiresSM op traits (PR #126886)   Srinivasa Ravi via llvm-commits
• [llvm] [mlir] [MLIR][NVVM] Add NVVMRequiresSM op traits (PR #126886)   Srinivasa Ravi via llvm-commits
• [clang] [lld] [llvm] Adding Matching and Inference Functionality to Propeller (PR #139008)   Sriraman Tallam via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   Stanislav Mekhanoshin via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Stephen Tozer via llvm-commits
• [llvm] [BranchFolding] Kill common hoisted debug instructions (PR #140091)   Stephen Tozer via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [compiler-rt] [tsan] Fix nested signal handling (PR #138599)   Steven Wu via llvm-commits
• [compiler-rt] [tsan] Fix nested signal handling (PR #138599)   Steven Wu via llvm-commits
• [compiler-rt] [TSan][Test] Disable signal_recursive.cpp test on Darwin (PR #141135)   Steven Wu via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Steven Wu via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   Steven Wu via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils (PR #141258)   Steven Wu via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils (PR #141258)   Steven Wu via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   Sudharsan Veeravalli via llvm-commits
• [llvm] [NFC][MemProf] Move Radix tree methods to their own header and cpp. (PR #140501)   Sudharsan Veeravalli via llvm-commits
• [llvm] [LLVM] [NFC] - Remove duplicate #include headers from the files of llvm dir (PR #141057)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   Sudharsan Veeravalli via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Sumit Agarwal via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Sumit Agarwal via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   Sumit Agarwal via llvm-commits
• [llvm] [SPIR-V] Clarify builtin default value handling; NFC (PR #139691)   Sven van Haastregt via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Teresa Johnson via llvm-commits
• [llvm] [NFC][MemProf] Fix typo in type name (PR #140500)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   Teresa Johnson via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   Teresa Johnson via llvm-commits
• [llvm] [DataLayout] Remove `clear` and `reset` methods (NFC) (PR #102993)   Tim Besard via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Tim Gymnich via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #140691)   Tim Gymnich via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Tim Gymnich via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Tim Gymnich via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   Tim Gymnich via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Tim Gymnich via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Tim Gymnich via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Tim Gymnich via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   Tim Gymnich via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Tim Gymnich via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   Tim Gymnich via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   Tim Gymnich via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   Tim Gymnich via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #141190)   Tim Gymnich via llvm-commits
• [llvm] [MCA] Use a range-based for loop (NFC) (PR #141187)   Tim Gymnich via llvm-commits
• [llvm] [llvm] Fix a typo in documentation (PR #141204)   Tim Gymnich via llvm-commits
• [llvm] [llvm] Use llvm::erase_if (NFC) (PR #141185)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   Tim Gymnich via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 (PR #141257)   Tim Gymnich via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 (PR #141257)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 (PR #141257)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 (PR #141257)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] GenericFloatingPointPredicateUtils to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] GenericFloatingPointPredicateUtils to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Move GenericFloatingPointPredicateUtils to IR to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] Move GenericFloatingPointPredicateUtils to IR to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] Move GenericFloatingPointPredicateUtils to IR to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] Move GenericFloatingPointPredicateUtils to IR to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils 2 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils 2 (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Move GenericFloatingPointPredicateUtils to IR to fix linkage (PR #141260)   Tim Gymnich via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils (PR #141258)   Tim Gymnich via llvm-commits
• [lld] [lld] Use llvm::less_second (NFC) (PR #141349)   Tim Gymnich via llvm-commits
• [llvm] [Bitcode] Remove unused includes (NFC) (PR #141354)   Tim Gymnich via llvm-commits
• [llvm] [llvm] Use std::tie to implement comparison functors (NFC) (PR #141353)   Tim Gymnich via llvm-commits
• [llvm] [LTO] Remove unused includes (NFC) (PR #141355)   Tim Gymnich via llvm-commits
• [llvm] [TableGen] Remove unused includes (NFC) (PR #141356)   Tim Gymnich via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   Tim Gymnich via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   Tim Gymnich via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   Tim Gymnich via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   Tim Gymnich via llvm-commits
• [llvm] Fix GenericFloatingPointPredicateUtils (PR #141258)   Tim Gymnich via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   Tim Gymnich via llvm-commits
• [llvm] [RISCV] Use llvm::is_contained (NFC) (PR #141372)   Tim Gymnich via llvm-commits
• [llvm] [Support] Use std::map::try_emplace (NFC) (PR #141374)   Tim Gymnich via llvm-commits
• [llvm] [AArch64] Remove unused includes (NFC) (PR #141375)   Tim Gymnich via llvm-commits
• [llvm] [RISCV] Remove unused includes (NFC) (PR #141378)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU] Remove unused includes (NFC) (PR #141376)   Tim Gymnich via llvm-commits
• [llvm] [ARM] Remove unused includes (NFC) (PR #141377)   Tim Gymnich via llvm-commits
• [llvm] [X86] Remove unused includes (NFC) (PR #141379)   Tim Gymnich via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   Tim Gymnich via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Tobias Hieta via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Tobias Stadler via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Tobias Stadler via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   Tobias Stadler via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support MLIR lowering of linear clause for omp.wsloop (PR #139385)   Tom Eccles via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Tom Eccles via llvm-commits
• [llvm] [utils][TableGen] Clean up code in DirectiveEmitter (PR #140772)   Tom Eccles via llvm-commits
• [llvm] [flang-rt] Fix usage of kNoAsyncId in assign.cpp (PR #141077)   Tom Eccles via llvm-commits
• [llvm] Non constant size and offset in DWARF (PR #141106)   Tom Tromey via llvm-commits
• [llvm] Non constant size and offset in DWARF (PR #141106)   Tom Tromey via llvm-commits
• [llvm] [TableGen] Remove wrong comment for CodeGenTarget ctor (PR #141024)   Tomer Shafir via llvm-commits
• [llvm] [TableGen] Remove wrong comment for CodeGenTarget ctor (PR #141024)   Tomer Shafir via llvm-commits
• [clang] [llvm] Revert "[lit][clang] Avoid realpath on Windows due to MAX_PATH limitations" (PR #139739)   Tristan Labelle via llvm-commits
• [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)   Udit Kumar Agarwal via llvm-commits
• [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)   Udit Kumar Agarwal via llvm-commits
• [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)   Udit Kumar Agarwal via llvm-commits
• [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)   Udit Kumar Agarwal via llvm-commits
• [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)   Udit Kumar Agarwal via llvm-commits
• [llvm] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [llvm] Add API to get decompressed size of a zstd compressed buffer. (PR #107020)   Udit Kumar Agarwal via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [CMake] Fix config when static zstd libraries are not found (PR #113584)   Udit Kumar Agarwal via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Support PrintBranchImmAsAddress in disassembler (PR #141064)   Ulrich Weigand via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Support PrintBranchImmAsAddress in disassembler (PR #141064)   Ulrich Weigand via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with arm64 (PR #141115)   Usama Hameed via llvm-commits
• [compiler-rt] [compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with arm64 (PR #141115)   Usama Hameed via llvm-commits
• [compiler-rt] Revert "[compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with ar… (PR #141280)   Usama Hameed via llvm-commits
• [compiler-rt] Revert "[compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with ar… (PR #141280)   Usama Hameed via llvm-commits
• [llvm] [AArch64] Use i32 extract from UADDV in popcount lowering. (PR #140718)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [FuncAttrs] Relax norecurse attribute inference (PR #139943)   Usha Gupta via llvm-commits
• [llvm] [SPIRV] FIX print the symbolic operand for opcode for the operation OpSpecConstantOp (PR #135756)   VISHAKH PRAKASH via llvm-commits
• [flang] [llvm] [flang][cuda] Use a reference for asyncObject (PR #140614)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Use a reference for asyncObject (PR #140614)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Use a reference for asyncObject (PR #140614)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang][cuda] Use nullptr for comparison (PR #140767)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [utils][TableGen] Clean up code in DirectiveEmitter (PR #140772)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang][rt] Fix the use of kNoAsyncId -> kNoAsyncObject (PR #141079)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][runtime] Replace recursion with iterative work queue (PR #137727)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Vassil Vassilev via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Vassil Vassilev via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Vassil Vassilev via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Vassil Vassilev via llvm-commits
• [clang] [llvm] [AMDGPU] Fix opsel for scaled MFMA operations (PR #140183)   Vigneshwar Jayakumar via llvm-commits
• [clang] [llvm] [AMDGPU] Fix opsel for scaled MFMA operations (PR #140183)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   Viktoria Maximova via llvm-commits
• [llvm] Reland [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141279)   Viktoria Maximova via llvm-commits
• [llvm] Reland [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141279)   Viktoria Maximova via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   Vincent Lee via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [UBSan] Implement src:*=sanitize for UBSan (PR #140529)   Vitaly Buka via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Vitaly Buka via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Vitaly Buka via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Vitaly Buka via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Vitaly Buka via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   Vitaly Buka via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Vito Kortbeek via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Vito Kortbeek via llvm-commits
• [llvm] [CodeGen][MachineLoop] Fix getLoopID (PR #137820)   Vito Kortbeek via llvm-commits
• [llvm] [llvm][NFC] Use `llvm::sort()` (PR #140335)   Vladimir Vereschaka via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (PR #140285)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [llvm][DebugInfo][clang] Finalize all declaration subprograms in DIBuilder::finalize() (PR #139914)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [llvm][DebugInfo][clang] Finalize all declaration subprograms in DIBuilder::finalize() (PR #139914)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [clang] Simplify device kernel attributes (PR #137882)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIRV] Lower `spirv.Layout` type (PR #140059)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIRV] Lower `spirv.Layout` type (PR #140059)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Consistent handling of TargetExtTypes in emit-intrinsics (PR #135682)   Vyacheslav Levytskyy via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Walter J.T.V via llvm-commits
• [llvm] 581d175 - [LoongArch] Document the inline asm `q` constraint   Weining Lu via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of {G}CSRXCHG (PR #140862)   WÁNG Xuěruì via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   WÁNG Xuěruì via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   WÁNG Xuěruì via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   WÁNG Xuěruì via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   Xi Ruoyao via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly] Set the target-cpu in LTO config (PR #140010)   YAMAMOTO Takashi via llvm-commits
• [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)   Yaxun Liu via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (PR #139861)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implemented missed optimization in muldivrem (PR #140916)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implemented missed optimization in muldivrem (PR #140916)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implemented missed optimization in muldivrem (PR #140916)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Implemented missed optimization in muldivrem (PR #140916)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Propagate FMF from select instead of fcmp (PR #141010)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Yingwei Zheng via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Yingwei Zheng via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Yingwei Zheng via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   Yingwei Zheng via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   Yingwei Zheng via llvm-commits
• [llvm] [Local] Verify opcodes match for all insts passed to mergeFlags (NFC). (PR #141231)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold shuffled intrinsic operands with constant operands (PR #141300)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   Yingwei Zheng via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFP_TO_INT_SAT (PR #139217)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   YunQiang Su via llvm-commits
• [llvm] MIPS: Add 64r2 test to CodeGen/fp-maximumnum-minimumnum.ll (PR #141218)   YunQiang Su via llvm-commits
• [llvm] MIPS: Add 64r2 test to CodeGen/fp-maximumnum-minimumnum.ll (PR #141218)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (PR #139237)   YunQiang Su via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Yury Plyakhin via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Yury Plyakhin via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Yury Plyakhin via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Yury Plyakhin via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Yury Plyakhin via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   Yury Plyakhin via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   Yusuke MINATO via llvm-commits
• [clang] [llvm] [clang] Support ASan on WASI (PR #139014)   Yuta Saito via llvm-commits
• [clang] [llvm] [clang] Support ASan on WASI (PR #139014)   Yuta Saito via llvm-commits
• [clang] [compiler-rt] [Coverage] Fix mapping for do-while loops with terminating statements (PR #139777)   Zequan Wu via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   Zequan Wu via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   Zhaoxuan Jiang via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   Zhaoxuan Jiang via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   Zhaoxuan Jiang via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   Zhaoxuan Jiang via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   Zhaoxuan Jiang via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   Zhaoxuan Jiang via llvm-commits
• [llvm] Add debuginfo C support for a SetType, Subrangetype, dynamic array type and replace arrays (PR #135607)   peter mckinna via llvm-commits
• [llvm] Fix typo in type name (PR #140500)   via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   via llvm-commits
• [llvm] [GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (PR #140508)   via llvm-commits
• [llvm] 0719879 - [SPIR-V] Clarify builtin default value handling; NFC (#139691)   via llvm-commits
• [llvm] [RISCV][NFC] Fix the mismatch in comment (PR #140511)   via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   via llvm-commits
• [llvm] f594cd0 - [IVDescriptor][LV] Return Instruction::Or for IAnyOf/FAnyOf in getOpcode(), nfc (#140242)   via llvm-commits
• [llvm] 1b711b2 - [VPlan] Clean up the function VPInstruction::generate for ComputeReductionResult, nfc (#140245)   via llvm-commits
• [llvm] FEAT: Sink constant offsets down a GEP chain to tail for reduction of register usage. (PR #140027)   via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   via llvm-commits
• [llvm] [Verifier] Add checks for range attribute on ImmArg (PR #140522)   via llvm-commits
• [flang] [llvm] [mlir] [WIP] Implement workdistribute construct (PR #140523)   via llvm-commits
• [llvm] 1ead4a8 - IR: Reorder ConstantData enum values (#138638)   via llvm-commits
• [llvm] 868e1fc - IR: Remove redundant UseList check in addUse (#138676)   via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] 61d3ad9 - [SCEVPatternMatch] Introduce m_scev_AffineAddRec (#140377)   via llvm-commits
• [llvm] d067014 - [APInt] Added APInt::clearBits() method (#137098)   via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   via llvm-commits
• [compiler-rt] e8a3074 - [builtins][AArch32] Fix __gnu_* functions (#137638)   via llvm-commits
• [compiler-rt] [builtins][AArch32] Fix __gnu_* functions (PR #137638)   via llvm-commits
• [llvm] [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (PR #140536)   via llvm-commits
• [llvm] 70501ed - [LoopVectorizer] Prune VFs based on plan register pressure (#132190)   via llvm-commits
• [llvm] 992458d - [RISCV][NFC] Fix the mismatch in comment (#140511)   via llvm-commits
• [llvm] MachineScheduler: Improve instruction clustering (PR #137784)   via llvm-commits
• [llvm] fix for Issue #139786 - Missed Optimization: max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   via llvm-commits
• [llvm] [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (PR #140538)   via llvm-commits
• [lld] 91a7085 - [lld] Use llvm::stable_sort (NFC) (#140488)   via llvm-commits
• [llvm] [ConstraintElim] Do not allow overflows in `Decomposition` (PR #140541)   via llvm-commits
• [llvm] 2c6b239 - [DA] handle memory accesses with different offsets and strides (#123436)   via llvm-commits
• [llvm] 4bdd116 - [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (#137425)   via llvm-commits
• [flang] [llvm] [mlir] [WIP] Implement workdistribute construct (PR #140523)   via llvm-commits
• [compiler-rt] [compiler-rt][MSVC][CMake] Wrap Linker flags for ICX (PR #118496)   via llvm-commits
• [llvm] [SLP][NFC]Store operand entries in the map (PR #140549)   via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake option to enable execute-only code generation on AArch64 (PR #140555)   via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only elemnt0 is demanded (PR #140563)   via llvm-commits
• [llvm] 21b4059 - [SPARC] Print target address when disassembling branches and calls (#140340)   via llvm-commits
• [llvm] [SPARC] Print target address when disassembling branches and calls (PR #140340)   via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   via llvm-commits
• [llvm] Limit Number of Values used for SCEV Calculation (PR #140565)   via llvm-commits
• [llvm] 35a9631 - [X86][SelectionDAG] Handle the case for gather where index is SHL (#139703)   via llvm-commits
• [llvm] e8a2ce1 - [AArch64] When printing SYS aliases, use explicit `NeedsReg` flag from tablegen (NFC) (#140484)   via llvm-commits
• [llvm] 5c37840 - [NFC][AMDGPU] Add test for unfold-masked-merge-scalar-variablemask.ll (#140093)   via llvm-commits
• [llvm] [BOLT, test] Add --image-base to tests that use --section-start (PR #140570)   via llvm-commits
• [llvm] [AArch64] TableGen-erate SDNode descriptions (PR #140472)   via llvm-commits
• [llvm] 12fb0d4 - [DirectX] Legalize memcpy (#139173)   via llvm-commits
• [llvm] [llvm] revert preprocessor dump method guards from llvm::ScaledNumber (PR #140574)   via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   via llvm-commits
• [llvm] e33e623 - [NVPTX] Consistently check fast-math flags when lowering div (#136890)   via llvm-commits
• [llvm] AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (PR #140580)   via llvm-commits
• [llvm] [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (PR #140283)   via llvm-commits
• [llvm] [NFC][TableGen] Use SmallVector range constructor when possible (PR #140284)   via llvm-commits
• [llvm] AMDGPU: Add more mfma with constant splat input tests (PR #140581)   via llvm-commits
• [llvm] [VectorCombine][AMDGPU] Narrow Phi of Shuffles. (PR #140188)   via llvm-commits
• [llvm] [SLP][NFC]Store operand entries in the map (PR #140549)   via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   via llvm-commits
• [llvm] [Github] Tweak the good-first-issue message not to require assignment. (PR #139858)   via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   via llvm-commits
• [llvm] [Github] Tweak the good-first-issue message not to require assignment. (PR #139858)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] dd0a1c5 - [llvm] revert preprocessor dump method guards from llvm::ScaledNumber (#140574)   via llvm-commits
• [compiler-rt] [compiler-rt][MSVC][CMake] Wrap Linker flags for ICX (PR #118496)   via llvm-commits
• [llvm] [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (PR #140593)   via llvm-commits
• [llvm] [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (PR #140593)   via llvm-commits
• [llvm] [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (PR #140593)   via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (PR #140289)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (PR #140595)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (PR #140595)   via llvm-commits
• [llvm] 811b809 - [RISCV] [NFC] Add llvm.get.rounding test (#139921)   via llvm-commits
• [llvm] 0f38543 - [NFC][TableGen] Use SmallVector range constructor when possible (#140284)   via llvm-commits
• [llvm] 3932360 - [LLVM][TableGen] Rename `ListInit::getValues()` to `getElements()` (#140289)   via llvm-commits
• [llvm] 29fd767 - [NFC][TableGen] Create valid Dag in VarLenCodeEmitter (#140283)   via llvm-commits
• [clang] [compiler-rt] [Coverage] Fix mapping for do-while loops with terminating statements (PR #139777)   via llvm-commits
• [llvm] 2b7cc2b - AMDGPU: Add more mfma with constant splat input tests (#140581)   via llvm-commits
• [llvm] 3601849 - AMDGPU: Check for subreg match when folding through reg_sequence (#140582)   via llvm-commits
• [compiler-rt] 025639b - [Coverage] Fix mapping for do-while loops with terminating statements (#139777)   via llvm-commits
• [llvm] [utils][TableGen] Remove unused parameter in DirectiveEmitter, NFC (PR #140605)   via llvm-commits
• [llvm] Revert "[InlineSpiller] Check rematerialization before folding operand (#134015)" (PR #137801)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [flang] [llvm] [flang][cuda] Use a reference for asyncObject (PR #140614)   via llvm-commits
• [llvm] [NVPTX] Unify and extend barrier{.cta} intrinsic support (PR #140615)   via llvm-commits
• [llvm] 553d4c1 - [llvm] annotate interfaces in llvm/ADT for DLL export (#136629)   via llvm-commits
• [llvm] c92ff61 - [Local] Move OverflowTracking to Local.h, move logic to helpers (NFC) (#140403)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] [HLSL][NFC] Add resource globals created for metadata to test baseline (PR #140620)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   via llvm-commits
• [llvm] e3b167c - [RISCV] Implement RISCVTargetLowering::getRoundingControlRegisters (#139864)   via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   via llvm-commits
• [flang] [llvm] [flang] Extension: allow char string edit descriptors in input formats (PR #140624)   via llvm-commits
• [llvm] [dsym][test][nfc] Remove DIE offsets. (PR #140628)   via llvm-commits
• [llvm] [LLVM] Support target extension types in vectors (PR #140630)   via llvm-commits
• [llvm] [LLVM] Support target extension types in vectors (PR #140630)   via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (PR #140631)   via llvm-commits
• [llvm] [LLVM] Support target extension types in vectors (PR #140630)   via llvm-commits
• [llvm] [DirectX] scalarize the dx.isinf intrinsic (PR #140638)   via llvm-commits
• [llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)   via llvm-commits
• [llvm] [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (PR #140625)   via llvm-commits
• [llvm] b586ddf - [HLSL][NFC] Add resource globals created for metadata to test baseline (#140620)   via llvm-commits
• [llvm] 7268c4e - [NFC][MemProf] Fix typo in type name (#140500)   via llvm-commits
• [llvm] a53b306 - [NFC][MemProf] Move Radix tree methods to their own header and cpp. (#140501)   via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   via llvm-commits
• [llvm] ad3c1d2 - [NFC][MemProf] Move getGUID out of IndexedMemProfRecord (#140502)   via llvm-commits
• [llvm] 0528848 - [NFC][MemProf] Move IndexedMemProfData to its own header. (#140503)   via llvm-commits
• [clang] [llvm] [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (PR #140253)   via llvm-commits
• [llvm] c2fd63c - [NFC][MemProf] Add the LLVM license text and minor clean up. (#140504)   via llvm-commits
• [llvm] ad45031 - [dsym][test][nfc] Remove DIE offsets. (#140628)   via llvm-commits
• [llvm] 4cfbe55 - [NFC][MemProf] Move types shared between Analysis, ProfileData and ModuleSummary (Core) to a separate header (#140505)   via llvm-commits
• [llvm] [SLP]Fix the analysis for masked compress loads (PR #140647)   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] 30ebcf6 - [SLP][NFC]Store operand entries in the map   via llvm-commits
• [llvm] [NFC][AMDGPU] Update tests to use autogened CHECKs (PR #140648)   via llvm-commits
• [llvm] e9c0840 - [RISCV] Add LD_RV32/SD_RV32 to RISCVInstrInfo::canFoldIntoAddrMode. (#140631)   via llvm-commits
• [llvm] dbfd0fd - [LangRef] Clarify that `ptrtoint` behaves like a capturing bitcast   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] [ProfileData] Restore Core as a dependency for the ProfileData library (PR #140650)   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] 90daed3 - [ProfileData] Restore Core as a dependency for the ProfileData library (#140650)   via llvm-commits
• [llvm] 07e2ba4 - [AMDGPU] Set AS8 address width to 48 bits   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] ae46353 - RISCV,LoongArch: Encode RELAX relocation implicitly   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] b8e5307 - update_mir_test_checks: keep comment embedded in MIR (#140016)   via llvm-commits
• [llvm] update_mir_test_checks: keep commment embedded in MIR (PR #140016)   via llvm-commits
• [llvm] FEAT: Sink constant offsets down a GEP chain to tail for reduction of register usage. (PR #140027)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] 755acb1 - [SPIR-V] Add SPV_INTEL_2d_block_io extension (#140140)   via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_2d_block_io extension (PR #140140)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] e264cff - [NFC][AMDGPU] Update tests to use autogened CHECKs (#140648)   via llvm-commits
• [clang] [flang] [llvm] Add IR Profile-Guided Optimization (IR PGO) support to the Flang compiler (PR #136098)   via llvm-commits
• [lld] [lld] Drop const from a return type (NFC) (PR #140667)   via llvm-commits
• [llvm] bdf03fc - Revert "[llvm][NFC] Use `llvm::sort()`" (#140668)   via llvm-commits
• [llvm] Revert "[llvm][NFC] Use `llvm::sort()`" (PR #140668)   via llvm-commits
• [llvm] Revert "[llvm][NFC] Use `llvm::sort()`" (PR #140668)   via llvm-commits
• [llvm] Revert "[llvm][NFC] Use `llvm::sort()`" (PR #140668)   via llvm-commits
• [llvm] [BOLT][AArch64] Fix crash for conditional tail calls (PR #140669)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [clang] [llvm] Boxu.zhang.llvm (PR #140671)   via llvm-commits
• [clang] [llvm] Boxu.zhang.llvm (PR #140671)   via llvm-commits
• [clang] [llvm] Boxu.zhang.llvm (PR #140671)   via llvm-commits
• [clang] [llvm] Boxu.zhang.llvm (PR #140671)   via llvm-commits
• [clang] [llvm] Boxu.zhang.llvm (PR #140671)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be c… (PR #140674)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A25/AX25 processor definition (PR #140681)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] f8e2e70 - [CGData] Return ArrayRef<std::string> in getNames (NFC) (#140675)   via llvm-commits
• [llvm] [LoongArch] Remove wrong vector shuffle lowering for lasx. (PR #140688)   via llvm-commits
• [llvm] [LoongArch] Remove wrong vector shuffle lowering for lasx. (PR #140688)   via llvm-commits
• [llvm] [LoongArch] Remove wrong vector shuffle lowering for lasx. (PR #140688)   via llvm-commits
• [flang] [llvm] [mlir] [WIP] Implement workdistribute construct (PR #140523)   via llvm-commits
• [llvm] [LoongArch] Introduce `32s` target feature for LA32S ISA extensions (PR #139695)   via llvm-commits
• [llvm] [LoongArch] Introduce `32s` target feature for LA32S ISA extensions (PR #139695)   via llvm-commits
• [llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)   via llvm-commits
• [llvm] d644597 - [GlobalISel] Add computeNumSignBits for G_SHUFFLE_VECTOR (#139505)   via llvm-commits
• [llvm] [mlir] [TableGen] Tach getInputFilename to return StringRef (NFC) (PR #140690)   via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #140691)   via llvm-commits
• [llvm] RISCV: Remove unneeded relocations when mixing relax/norelax code (PR #140692)   via llvm-commits
• [llvm] [Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO (PR #139830)   via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] 57aa7fa - [X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [llvm] [LoongArch] Introduce `32s` target feature for LA32S ISA extensions (PR #139695)   via llvm-commits
• [llvm] [LoongArch] Introduce `32s` target feature for LA32S ISA extensions (PR #139695)   via llvm-commits
• [llvm] [LoongArch] Introduce `32s` target feature for LA32S ISA extensions (PR #139695)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] b95ad8e - [DAGCombine] Use isLegalExtLoad for MatchLoadCombine (#140536)   via llvm-commits
• [llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)   via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and elemental copies in Assign (PR #140569)   via llvm-commits
• [llvm] [X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (PR #140028)   via llvm-commits
• [llvm] Revert "Reduce llvm-gsymutil memory usage" (PR #140696)   via llvm-commits
• [llvm] Revert "Reduce llvm-gsymutil memory usage" (PR #140696)   via llvm-commits
• [llvm] Revert "Reduce llvm-gsymutil memory usage" (PR #140696)   via llvm-commits
• [llvm] [LoongArch] Introduce `32s` target feature for LA32S ISA extensions (PR #139695)   via llvm-commits
• [llvm] Revert "Reduce llvm-gsymutil memory usage" (PR #140696)   via llvm-commits
• [llvm] [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (PR #140698)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [llvm] [SDAG] Ensure load is included in output chain of sincos expansion (PR #140525)   via llvm-commits
• [llvm] 4060d38 - [BranchFolding] Merge debug locs on common hoisted code (#140063)   via llvm-commits
• [llvm] 5dfaf84 - [LLVM][AArch64] Correctly lower funnel shifts by constants. (#140058)   via llvm-commits
• [llvm] [LoopInterchange] Remove 'I' dependency (PR #140709)   via llvm-commits
• [llvm] [AArch64] Split AArch64ISD::COND_SMSTART/STOP off AArch64::SMSTART/STOP (NFC) (PR #140711)   via llvm-commits
• [llvm] [AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (PR #140713)   via llvm-commits
• [llvm] 3918ef3 - [SLP]Fix the analysis for masked compress loads   via llvm-commits
• [llvm] 5ed0b3a - Revert "Reduce llvm-gsymutil memory usage" (#140696)   via llvm-commits
• [llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)   via llvm-commits
• [llvm] [AArch64] Use i32 extract from UADDV in popcount lowering. (PR #140718)   via llvm-commits
• [llvm] f057a58 - [DebugInfo] Update DebugInfoFinder to take retainedNodes into account (#140285)   via llvm-commits
• [llvm] 9053947 - [utils][TableGen] Remove unused parameter in DirectiveEmitter, NFC (#140605)   via llvm-commits
• [llvm] 46ab684 - [utils][TableGen] Unify name qualifications in DirectiveEmitter (#140606)   via llvm-commits
• [llvm] d56d537 - [Clang] Allow vector and matrix type attributes for sub-byte _BitInt (#140253)   via llvm-commits
• [llvm] cf1f116 - [VPlan] Introduce constant folder in simplifyRecipe (#125365)   via llvm-commits
• [llvm] [Offload] Make OffloadAPI error messages more readable (PR #140728)   via llvm-commits
• [llvm] [X86] combineAdd - use SDPatternMatch to simplify "(add (zext (vXi1 X)), Y) -> (sub Y, (sext (vXi1 X)))" matching. (PR #140731)   via llvm-commits
• [llvm] 86f2fdd - [TableGen] Tach getInputFilename to return StringRef (NFC) (#140690)   via llvm-commits
• [llvm] ba52b56 - [Analysis] Avoid repeated hash lookups (NFC) (#140691)   via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] MachineScheduler: Reset next cluster candidate for each node (PR #139513)   via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   via llvm-commits
• [llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)   via llvm-commits
• [clang] [llvm] [CodeGen] Expose the extensibility of PassConfig to plugins (PR #139059)   via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   via llvm-commits
• [llvm] [SLP][NFC]Make TreeEntry a class and store "need-to-schedule" state (PR #140734)   via llvm-commits
• [llvm] [SLP][NFC]Make TreeEntry a class and store "need-to-schedule" state (PR #140734)   via llvm-commits
• [llvm] a0058d1 - [SLP][NFC]Make TreeEntry a class and store "need-to-schedule" state   via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   via llvm-commits
• [llvm] [AArch64] Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #138447)   via llvm-commits
• [llvm] [AArch64] Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #138447)   via llvm-commits
• [llvm] 621a5a9 - [X86] combineAdd - use SDPatternMatch to simplify "(add (zext (vXi1 X)), Y) -> (sub Y, (sext (vXi1 X)))" matching. (#140731)   via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #140742)   via llvm-commits
• [llvm] [llvm] Use llvm::is_contained (NFC) (PR #140742)   via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   via llvm-commits
• [llvm] [LV] Stengthen loop-invariance checks in isPredicatedInst (PR #140744)   via llvm-commits
• [llvm] 09fd8f0 - [X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (#140538)   via llvm-commits
• [llvm] [SLP]Initial support for copyable elements (non-schedulable only) (PR #140279)   via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (PR #140516)   via llvm-commits
• [llvm] [LoongArch] Remove wrong vector shuffle lowering for lasx. (PR #140688)   via llvm-commits
• [llvm] [LoongArch] Remove wrong vector shuffle lowering for lasx. (PR #140688)   via llvm-commits
• [llvm] 95e4db8 - [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address   via llvm-commits
• [llvm] 4a0ae4f - [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (#140640)   via llvm-commits
• [llvm] 17e293d - [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (#140593)   via llvm-commits
• [llvm] [LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (PR #140593)   via llvm-commits
• [llvm] b92b548 - [RISCV] Add scheduling model for SiFive P800 processors (#139316)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (PR #140752)   via llvm-commits
• [llvm] [Docs][RISCV] Move Zilsd to 'Supported' status. NFC (PR #140757)   via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [llvm] 7e9d9db - [AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (#140752)   via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   via llvm-commits
• [llvm] [AMDGPU][True16] set true16 mode as default on gfx110x (PR #140736)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   via llvm-commits
• [llvm] 47b89fb - [AArch64] Use i32 extract from UADDV in popcount lowering. (#140718)   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] 0cf6b4f - [Docs][RISCV] Move Zilsd to 'Supported' status. NFC (#140757)   via llvm-commits
• [llvm] [llvm-objdump] --adjust-vma: Call getInstruction with adjusted address (PR #140471)   via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   via llvm-commits
• [llvm] [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (PR #140770)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   via llvm-commits
• [llvm] [utils][TableGen] Clean up code in DirectiveEmitter (PR #140772)   via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   via llvm-commits
• [llvm] a9ee8e4 - Create a EncodingConverter class with both iconv and icu support. (#138893)   via llvm-commits
• [llvm] [AMDGPU][LowerBufferFatPointers] Handle addrspacecast null to p7 (PR #140775)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] AMDGPU: Add regression test for multiple frame index lowering (PR #140784)   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] [OpenMP][GPU][FIX] Enable generic barriers in single threaded contexts (PR #140786)   via llvm-commits
• [lld] [lld][macho] Support order cstrings with -order_file_cstring (PR #140307)   via llvm-commits
• [llvm] [llvm] prepare explicit template instantiations in llvm/DebugInfo for DLL export annotations (PR #140785)   via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   via llvm-commits
• [llvm] [VPlan] Connect Entry to scalar preheader during initial construction. (PR #140132)   via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   via llvm-commits
• [lld] [lld] check cache before real_path in loadDylib (PR #140791)   via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   via llvm-commits
• [llvm] 26d9cb1 - [MC][DebugInfo] Emit linetable entries with known offsets immediately (#134677)   via llvm-commits
• [llvm] 5aa3171 - AMDGPU: Add regression test for multiple frame index lowering (#140784)   via llvm-commits
• [clang] [libcxx] [llvm] libcxx: std::ostream::sentry should be exported (PR #140169)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle unconverted ptrmask (PR #140802)   via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   via llvm-commits
• [llvm] [CFGMST] Remove special case for entry block with no successors (PR #140804)   via llvm-commits
• [llvm] Don't collect from phi nodes which are not fully constructed yet (PR #140806)   via llvm-commits
• [llvm] Don't collect from phi nodes which are not fully constructed yet (PR #140806)   via llvm-commits
• [llvm] Reduce llvm-gsymutil memory usage (PR #140740)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140807)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140807)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140807)   via llvm-commits
• [llvm] cbac2a9 - [llvm] Use llvm::is_contained (NFC) (#140742)   via llvm-commits
• [llvm] e25abd0 - [bugpoint] Use a range-based for loop (NFC) (#140743)   via llvm-commits
• [llvm] 98595cf - [llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (#140653)   via llvm-commits
• [llvm] a690852 - [llvm-exegesis] Error instead of aborting on verification failure (#137581)   via llvm-commits
• [llvm] a414877 - [x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (#126631)   via llvm-commits
• [llvm] d299242 - [Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (#126779)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Move all pure AMDGPUAttributor related test files to `llvm/test/Transforms/Attributor/AMDGPU/` (PR #140815)   via llvm-commits
• [llvm] 6b9da28 - [AMDGPU][LowerBufferFatPointers] Handle addrspacecast null to p7 (#140775)   via llvm-commits
• [llvm] 13c467b - [AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (#140770)   via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   via llvm-commits
• [llvm] [CI] Add link to issue tracker upon job failures (PR #140817)   via llvm-commits
• [lld] 80f0ffb - [lld][WebAssembly] Set the target-cpu in LTO config (#140010)   via llvm-commits
• [llvm] [NFC][Support] Apply clang-format to regcomp.c (PR #140769)   via llvm-commits
• [llvm] [llvm-remarkutil] Add an instruction-mix tool (PR #140598)   via llvm-commits
• [llvm] [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (PR #140827)   via llvm-commits
• [llvm] ada2fbf - [GISel] Fix ShuffleVector assert (#139769)   via llvm-commits
• [llvm] 3cf6565 - [LoongArch] Remove wrong vector shuffle lowering for lasx. (#140688)   via llvm-commits
• [llvm] [LoongArch] Remove wrong vector shuffle lowering for lasx. (PR #140688)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [bazel][mlir] Add missing dep for 747620d (PR #140830)   via llvm-commits
• [llvm] [bazel][mlir] Add missing dep for 747620d (PR #140830)   via llvm-commits
• [llvm] [CodeGen][NewPM] Port `AsmPrinter` to new pass manager (PR #99320)   via llvm-commits
• [llvm] [Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO (PR #139830)   via llvm-commits
• [llvm] [Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO (PR #139830)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [llvm] [llvm-remarkutil] Make invalid states un-representable in the count tool (PR #140829)   via llvm-commits
• [llvm] [LoongArch] Add patterns for vstelm instructions (PR #139201)   via llvm-commits
• [llvm] [llvm-mca] Drop const from a return type (NFC) (PR #140836)   via llvm-commits
• [llvm] [DebugInfo] Use std::map::try_emplace (NFC) (PR #140839)   via llvm-commits
• [clang] [lld] [llvm] Adding Matching and Inference Functionality to Propeller (PR #139008)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   via llvm-commits
• [llvm] 211ee04 - [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (#137221)   via llvm-commits
• [llvm] a4782ff - [llvm-mca] Drop const from a return type (NFC) (#140836)   via llvm-commits
• [polly] adbe155 - [polly] Drop const from return types (NFC) (#140837)   via llvm-commits
• [llvm] 51b288d - [CodeGen] Avoid repeated hash lookups (NFC) (#140838)   via llvm-commits
• [llvm] 557448e - [DebugInfo] Use std::map::try_emplace (NFC) (#140839)   via llvm-commits
• [llvm] 1fd2436 - [CodeGen] Use range-based for loops (NFC) (#140840)   via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #140843)   via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #140843)   via llvm-commits
• [llvm] [llvm] Use *Map::try_emplace (NFC) (PR #140843)   via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #140844)   via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #140844)   via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #140844)   via llvm-commits
• [clang] [lld] [llvm] Adding Matching and Inference Functionality to Propeller (PR #139008)   via llvm-commits
• [clang] [lld] [llvm] Adding Matching and Inference Functionality to Propeller (PR #139008)   via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   via llvm-commits
• [llvm] [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (PR #140851)   via llvm-commits
• [llvm] f87bcf1 - [LoongArch] Add patterns for vstelm instructions (#139201)   via llvm-commits
• [llvm] [LoongArch] Add patterns for vstelm instructions (PR #139201)   via llvm-commits
• [llvm] AMDGPU: VIMAGE/VSAMPLE are bundle candidates (PR #140854)   via llvm-commits
• [llvm] AMDGPU: VIMAGE/VSAMPLE are bundle candidates (PR #140854)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of {G}CSRXCHG (PR #140862)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of {G}CSRXCHG (PR #140862)   via llvm-commits
• [llvm] fe6290e - [llvm] Use *Map::try_emplace (NFC) (#140843)   via llvm-commits
• [llvm] 9f4cea2 - [llvm] Fix typos in documentation (#140844)   via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] d827588 - [VectorCombine] Scalarize binop-like intrinsics (#138095)   via llvm-commits
• [llvm] dec214d - [X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] 5b5c57d - Add llvm-project archive issues for Chromium bug tracker (#132030)   via llvm-commits
• [llvm] 1a08aa2 - [AArch64] Split AArch64ISD::COND_SMSTART/STOP off AArch64::SMSTART/STOP (NFC) (#140711)   via llvm-commits
• [llvm] InferAddressSpaces: Stop trying to insert pointer bitcasts (PR #140873)   via llvm-commits
• [llvm] 7a8090c - [AArch64] Remove unused ISD nodes (NFC) (#140706)   via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   via llvm-commits
• [llvm] [Offload] Use llvm::Error throughout liboffload internals (PR #140879)   via llvm-commits
• [llvm] bb27916 - [LAA] Tweak debug output for UTC stability (#140764)   via llvm-commits
• [llvm] [X86] lowerV8F32Shuffle - use lowerShufflePairAsUNPCKAndPermute on AVX1 targets (PR #140881)   via llvm-commits
• [llvm] [flang-rt] Optimise ShallowCopy and use it in CopyInAssign (PR #140569)   via llvm-commits
• [llvm] 4091b5d - [X86] lowerV8F32Shuffle - use lowerShufflePairAsUNPCKAndPermute on AVX1 targets (#140881)   via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   via llvm-commits
• [llvm] ff46a47 - [SPIRV] Addition of matrix multiply accumulate operands (#138665)   via llvm-commits
• [llvm] [SPIRV] Addition of matrix multiply accumulate operands (PR #138665)   via llvm-commits
• [llvm] [pdb] Provide a better error message when overflowing the public/global symbol record stream (PR #140884)   via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   via llvm-commits
• [llvm] [Offload] Allow allocations to be freed without knowing their type (PR #140889)   via llvm-commits
• [llvm] [TargetParser] Normalize "aarch64-amazon-linux" to "aarch64-amazon-linux-gnu" (PR #140070)   via llvm-commits
• [llvm] BOLT PowerPC Port (PR #140894)   via llvm-commits
• [llvm] [AArch64][PAC] Protect the entire function if pac-ret+leaf is passed (PR #140895)   via llvm-commits
• [llvm] BOLT PowerPC Port (PR #140894)   via llvm-commits
• [llvm] b5e3d8e - [LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (#140625)   via llvm-commits
• [llvm] fb627e3 - [LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (#140827)   via llvm-commits
• [llvm] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (PR #140896)   via llvm-commits
• [llvm] [AArch64] Neoverse V2 FeatureDisableLatencySchedHeuristic (PR #140897)   via llvm-commits
• [llvm] 2cf6099 - [NFC][Support] Apply clang-format to regcomp.c (#140769)   via llvm-commits
• [llvm] dc29901 - [AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (#139700)   via llvm-commits
• [llvm] [LV] Add early-exit-with-store tests (PR #140899)   via llvm-commits
• [llvm] BOLT PowerPC Port (PR #140894)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (PR #140900)   via llvm-commits
• [llvm] cb57578 - [llvm-debuginfo-analyzer] Support DW_TAG_module (#137228)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] b263c08 - [VPlan] Move predication to VPlanTransform (NFC). (#128420)   via llvm-commits
• [llvm] github: Add mips backend to PR autolabeler (PR #140909)   via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   via llvm-commits
• [llvm] 2e2bbca - AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (#140900)   via llvm-commits
• [llvm] 735209c - [NVPTX] Unify and extend barrier{.cta} intrinsic support (#140615)   via llvm-commits
• [llvm] d13947b - [InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (#139861)   via llvm-commits
• [llvm] [InstCombine] Implemented missed optimization in muldivrem (PR #140916)   via llvm-commits
• [llvm] [InstCombine] Implemented missed optimization in muldivrem (PR #140916)   via llvm-commits
• [llvm] 5a3776a - [SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (#140851)   via llvm-commits
• [llvm] [X86] combineINSERT_SUBVECTOR - use concatSubVectors instead of direct fold to X86ISD::SUBV_BROADCAST_LOAD (PR #140919)   via llvm-commits
• [llvm] [AMDGPU] Fix computation of waves/EU maximum (PR #140921)   via llvm-commits
• [llvm] [RISCV] Support scalable vectors for the zvqdotq lowering paths (PR #140922)   via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   via llvm-commits
• [llvm] [IR] Remove redundant intrinsic properties. NFC. (PR #140923)   via llvm-commits
• [llvm] [SCCPSolver] Mark several functions const (NFC) (PR #140926)   via llvm-commits
• [lld] 0edc8b5 - [ELF] Error if a section address is smaller than image base   via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   via llvm-commits
• [llvm] [NFC][ADT/Support] Add {} for else when if body has {} (PR #140758)   via llvm-commits
• [clang] [llvm] Add support for Windows Secure Hot-Patching (PR #138972)   via llvm-commits
• [llvm] 91b2e5b - Add live in for PrivateSegmentSize in GISel path (#139968)   via llvm-commits
• [llvm] Add live in for PrivateSegmentSize in GISel path (PR #139968)   via llvm-commits
• [llvm] d997b4f - Reduce llvm-gsymutil memory usage (#140740)   via llvm-commits
• [llvm] [LLVM][Cygwin] add workaround for blocking connect/accept in AF_UNIX sockets (PR #140353)   via llvm-commits
• [llvm] [LLVM][Cygwin] add workaround for blocking connect/accept in AF_UNIX sockets (PR #140353)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   via llvm-commits
• [llvm] [GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (PR #140935)   via llvm-commits
• [llvm] e12cbd8 - [AMDGPU] Fix scale opsel flags for scaled MFMA operations (#140183)   via llvm-commits
• [llvm] [GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (PR #140935)   via llvm-commits
• [llvm] [GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (PR #140935)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_expf constexpr. (PR #140841)   via llvm-commits
• [llvm] 68995b1 - [RISCV] Support scalable vectors for the zvqdotq lowering paths (#140922)   via llvm-commits
• [llvm] 0954c9d - Add macro to suppress -Wunnecessary-virtual-specifier (#139614)   via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   via llvm-commits
• [llvm] [HLSL] Move FNeg legalization to the DXILLegalization pass (PR #140942)   via llvm-commits
• [llvm] [PowerPC] vector shift word/double by element size - 1 use all ones (PR #139794)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [lld] [lld][macho] Strip .__uniq. and .llvm. hashes in -order_file (PR #140670)   via llvm-commits
• [clang] [llvm] Add macro to suppress -Wunnecessary-virtual-specifier (PR #139614)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit reg (PR #140946)   via llvm-commits
• [llvm] [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (PR #140950)   via llvm-commits
• [llvm] 77c8d21 - [GlobalISel] Fix ZExt known bits for scalable vectors. (#140213)   via llvm-commits
• [llvm] [RISCV] Add tests for widening fixed vector masked loads/stores. NFC (PR #140949)   via llvm-commits
• [llvm] [NVPTX] Add intrinsic support for specialized prmt variants (PR #140951)   via llvm-commits
• [llvm] f1d03de - [X86] combineINSERT_SUBVECTOR - use concatSubVectors instead of direct fold to X86ISD::SUBV_BROADCAST_LOAD (#140919)   via llvm-commits
• [llvm] Fix references to required libraries when building LLVM with ASAN and MultiThreaded[Debug] on Windows (PR #139657)   via llvm-commits
• [llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)   via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] Extend llvm objdump fatbin (PR #140286)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] a76bf4d - [NFC][ADT/Support] Add {} for else when if body has {} (#140758)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] 99779b4 - [SCCPSolver] Mark several functions const (NFC) (#140926)   via llvm-commits
• [llvm] [MIPS][float] Fixed SingleFloat codegen on N32/N64 targets (PR #140575)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing for empty RootDescriptors (PR #140147)   via llvm-commits
• [llvm] b499f7f - [HLSL][RootSignature] Add parsing for empty RootDescriptors (#140147)   via llvm-commits
• [llvm] d00d74b - [llvm] add GenericFloatingPointPredicateUtils (#140254)   via llvm-commits
• [llvm] 7f62800 - [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (#140946)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [LoopPeel] Remove known trip count restriction when peeling last. (PR #140792)   via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [llvm] add GenericFloatingPointPredicateUtils (PR #140254)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [lld] b4d2e50 - [LLVM] Use `reportFatalUsageError` for LTO usage errors (#140955)   via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] 60ad6e3 - [SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (#140595)   via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   via llvm-commits
• [llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [llvm] [RISCV] Correct operand names for vmv.s.x and vfmv.s.f pseudos. NFC (PR #140970)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)   via llvm-commits
• [llvm] Revert "[llvm] add GenericFloatingPointPredicateUtils (#140254)" (PR #140968)   via llvm-commits
• [llvm] c47a5fb - Revert "[llvm] add GenericFloatingPointPredicateUtils (#140254)" (#140968)   via llvm-commits
• [llvm] Revert "[llvm] add GenericFloatingPointPredicateUtils (#140254)" (PR #140968)   via llvm-commits
• [llvm] Revert "[llvm] add GenericFloatingPointPredicateUtils (#140254)" (PR #140968)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implement `refract` intrinsic (PR #136026)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implement `refract` intrinsic (PR #136026)   via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   via llvm-commits
• [llvm] Revert #140650 and #140505 (PR #140973)   via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   via llvm-commits
• [llvm] [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (PR #140974)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DebugInfo for DLL export (PR #140778)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DebugInfo for DLL export (PR #140778)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/DebugInfo for DLL export (PR #140778)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ExecutionEngine for DLL export (PR #140809)   via llvm-commits
• [llvm] 066221f - Revert #140650 and #140505 (#140973)   via llvm-commits
• [llvm] 1b34722 - [AMDGPU] Fix computation of waves/EU maximum (#140921)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] 569b6f6 - [RISCV] Add Andes A25/AX25 processor definition (#140681)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [HLSL] Moving DXILResourceImplicitBinding pass closer to DXIL Resource Analysis (PR #140981)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] [BOLT] Use llvm::is_contained (NFC) (PR #140984)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of {G}CSRXCHG (PR #140862)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of {G}CSRXCHG (PR #140862)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   via llvm-commits
• [llvm] Check for immediates using isLegalICmpImmediate (PR #140999)   via llvm-commits
• [llvm] Check for immediates using isLegalICmpImmediate (PR #140999)   via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   via llvm-commits
• [llvm] 851da60 - Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (#141000)   via llvm-commits
• [lld] [llvm] Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (PR #141000)   via llvm-commits
• [llvm] Check for immediates using isLegalICmpImmediate (PR #140999)   via llvm-commits
• [llvm] Check for immediates using isLegalICmpImmediate (PR #140999)   via llvm-commits
• [polly] bcdce98 - Fix regression tests with bad FileCheck checks (#140373)   via llvm-commits
• [clang] [lld] [llvm] [polly] Fix regression tests with bad FileCheck checks (PR #140373)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] 04211ba - [RISCV] Add FeatureVendorXAndesPerf to Andes N45/NX45/A45/AX45 (#141007)   via llvm-commits
• [llvm] 11953c6 - [ARM] Remove kill flags in ReplaceConstByVPNOTs. (#140082)   via llvm-commits
• [llvm] 213d0d2 - [pdb] Provide a better error message when overflowing the public/global symbol record stream (#140884)   via llvm-commits
• [llvm] [InstCombine] Generalize ignoreSignBitOfZero/NaN to handle more cases (PR #141015)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] [RISCV] add Double Trap extensions requires Zicsr (PR #141016)   via llvm-commits
• [llvm] a2aa881 - [GlobalISel] Add a update_givaluetracking_test_checks.py script (#140296)   via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   via llvm-commits
• [llvm] Revert "[X86] Improve @gotpcrel on local symbol tests" (PR #141021)   via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   via llvm-commits
• [llvm] 52698a1 - [IR] Remove redundant intrinsic properties. NFC. (#140923)   via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   via llvm-commits
• [llvm] [TableGen] Remove wrong comment for CodeGenTarget ctor (PR #141024)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] [NFC][AMDGPU] Convert amdpal.ll to autogenerated CHECK lines (PR #141026)   via llvm-commits
• [llvm] [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (PR #141028)   via llvm-commits
• [llvm] b5e2a23 - [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (#140896)   via llvm-commits
• [llvm] [AArch64] Change cost of (s|z)ext <4 x i8> -> <4 x i32> to 2. (PR #141029)   via llvm-commits
• [llvm] [AArch64] Change cost of (s|z)ext <4 x i8> -> <4 x i32> to 2. (PR #141029)   via llvm-commits
• [llvm] [AMDGPU] Simplify definition of AddrSpaces. NFC. (PR #141030)   via llvm-commits
• [llvm] [LoongArch] Fix assertion failure for annotate tablejump (PR #140907)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] e1db811 - [AMDGPU] Simplify definition of AddrSpaces. NFC. (#141030)   via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - use isElementEquivalent to help identify hidden splat/broadcasts (PR #141035)   via llvm-commits
• [llvm] bd8578c - [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (#140862)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] 4e186f2 - [LoongArch] Fix assertion failure for annotate tablejump (#140907)   via llvm-commits
• [llvm] [LoongArch] Fix assertion failure for annotate tablejump (PR #140907)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141031)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] [GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (PR #140935)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] b9a7098 - [X86] lowerShuffleAsSplitOrBlend - use isElementEquivalent to help identify hidden splat/broadcasts (#141035)   via llvm-commits
• [llvm] AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (PR #141047)   via llvm-commits
• [llvm] [AArch64][SME] Simplify initialization of TPIDR2 block (PR #141049)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] 34a55c9 - [BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (#141028)   via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (PR #141055)   via llvm-commits
• [llvm] [TableGen] Warn on redundant intrinsic properties (PR #141056)   via llvm-commits
• [llvm] [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (PR #141055)   via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   via llvm-commits
• [llvm] [LLVM] Cleanup - Remove duplicate #include headers from the files of llvm-project/llvm dir (PR #141057)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] [LoongArch][NFC] Improve csrxchg instrinsic test case (PR #141060)   via llvm-commits
• [llvm] [LoongArch][NFC] Improve csrxchg instrinsic test case (PR #141060)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [AMDGPU] Introduce FeatureISAVersion11_5_Common. NFC. (PR #141061)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] 83de1ef - [LangRef] Comment on validity of volatile ops on null (#139803)   via llvm-commits
• [llvm] [SystemZ] Support PrintBranchImmAsAddress in disassembler (PR #141064)   via llvm-commits
• [llvm] [LangRef] Comment on validity of volatile ops on null (PR #139803)   via llvm-commits
• [llvm] 9cac4bf - [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (#139110)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [llvm] Reland [llvm] add GenericFloatingPointPredicateUtils #140254 (PR #141065)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] 6eb4adf - [AMDGPU] Introduce FeatureISAVersion11_5_Common. NFC. (#141061)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   via llvm-commits
• [llvm] 03cc50f - [X86] lowerShuffleAsSplitOrBlend - prefer splitting AVX1-only shuffles if the operands can be freely split (#141055)   via llvm-commits
• [llvm] [IVDesc] Prefer empty m_Cmp on unused result (NFC) (PR #141071)   via llvm-commits
• [clang] [llvm] [openmp] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [llvm] Fix typos in documentation (PR #141078)   via llvm-commits
• [llvm] [VPlan] Support VPWidenCastRecipe in narrowToSingleScalarRecipes. (PR #141080)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] [AMDGPU][NFC] Rename IEEEMinMax to IEEEMinMaxInsts (PR #141081)   via llvm-commits
• [llvm] fb21efa - [SystemZ] Support PrintBranchImmAsAddress in disassembler (#141064)   via llvm-commits
• [llvm] [IVDesc] Unify RecurKinds [I|F]FindLastIV (NFC) (PR #141082)   via llvm-commits
• [llvm] [MachO] Improve bounds check (PR #141083)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] eee9582 - [SimplifyCFG] Only consider provenance capture in store speculation (#138548)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] 1fdf02a - [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140002)   via llvm-commits
• [llvm] [AMDGPU] Handle CreateBinOp not returning BinaryOperator (PR #137791)   via llvm-commits
• [llvm] [AMDGPU] Handle CreateBinOp not returning BinaryOperator (PR #137791)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] aac843c - [RISCV] Sort RISCVSystemOperands to match the RISC-V Privilege Specification. (#140967)   via llvm-commits
• [llvm] 9a77af3 - [X86] lowerV4F64Shuffle - prefer BLEND before UNPCK shuffle matching (#141073)   via llvm-commits
• [llvm] [ARM] Remove unused class member in ARMConstantIslandPass (PR #141093)   via llvm-commits
• [llvm] [RISCV][MC] Support Base P non-GPR pair instructions (PR #137927)   via llvm-commits
• [llvm] [doc][mlgo] Document the logger (serialization) and expose the doc (PR #141094)   via llvm-commits
• [llvm] Fix build for GenericFloatingPointPredicateUtils #140254 (PR #141095)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] ed75e21 - Fix build for GenericFloatingPointPredicateUtils #140254 (#141095)   via llvm-commits
• [llvm] 758fea0 - [InferAddressSpaces] Handle llvm.lifetime (#141045)   via llvm-commits
• [llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [LLVM][Windows] Elide `PrettyStackTrace` output for usage errors (PR #140956)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [lld] [llvm] [LLVM] Use `reportFatalUsageError` for LTO usage errors (PR #140955)   via llvm-commits
• [llvm] [ADT][bugfix] Fixed extra leading zero in uhextostr (PR #141097)   via llvm-commits
• [llvm] 58ab005 - Adding IR2Vec as an analysis pass (#134004)   via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   via llvm-commits
• [llvm] [LoopIdiom] Strip dead check in processLoopMemSet (NFC) (PR #141100)   via llvm-commits
• [llvm] [llvm][Comment] removing out-of-date comment, ARM backend no longer uses ScheduleDAGRRList (PR #117803)   via llvm-commits
• [llvm] TableGen support for RegisterBankInfo (PR #71357)   via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit Per-Function Line Table Offsets and End Sequences (PR #110192)   via llvm-commits
• [llvm] [AMDGPU][MISched] Allow memory ops of different base pointers to be clustered (PR #140674)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] [InstCombine] Fix comment typo (PR #141105)   via llvm-commits
• [llvm] [InstCombine] Fix comment typo (NFC) (PR #141105)   via llvm-commits
• [llvm] [InstCombine] Fix comment typo (NFC) (PR #141105)   via llvm-commits
• [llvm] [InstCombine] Fix comment typo (NFC) (PR #141105)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] Non constant size and offset in DWARF (PR #141106)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] [InstCombine] Fix comment typo that incorrectly described fold (NFC) (PR #141105)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [llvm] [BOLT] Never call fixBranches() on non-simple functions (PR #141112)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [InstCombine] Preserve GEP no-wrap flags (PR #141113)   via llvm-commits
• [llvm] [InstCombine] Fix comment typo that incorrectly described fold (NFC) (PR #141105)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] f07fc38 - [IndVars] Improve code; use SCEVPatternMatch (NFC) (#139533)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] eaf911b - [InstCombine] Fix comment typo that incorrectly described fold (NFC) (#141105)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] [SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions (PR #141121)   via llvm-commits
• [llvm] ced6076 - [SPIR-V] Support `SPV_INTEL_int4` extension (#141031)   via llvm-commits
• [llvm] 57e9097 - AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum (#141047)   via llvm-commits
• [llvm] db0bac0 - AMDGPU: Form v_med_f32 from minimumnum/maximumnum immediate pattern (#141048)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] [NFC][HLSL][RootSignature] Use `operator<<` overload instead of dump method (PR #141127)   via llvm-commits
• [llvm] 45f6036 - [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (#139997)   via llvm-commits
• [llvm] f3eea12 - [NVPTX] Add intrinsic support for specialized prmt variants (#140951)   via llvm-commits
• [llvm] Adding IR2Vec as an analysis pass (PR #134004)   via llvm-commits
• [llvm] [SCEVPatternMatch] Extend m_scev_AffineAddRec with Loop (PR #141132)   via llvm-commits
• [llvm] Check for immediates using isLegalICmpImmediate (PR #140999)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [llvm] [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (PR #141101)   via llvm-commits
• [compiler-rt] [TSan][Test] Disable signal_recursive.cpp test on Darwin (PR #141135)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [MC] Fix HIP buildbot errors after 68472a3 (PR #141138)   via llvm-commits
• [clang] [llvm] [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (PR #140964)   via llvm-commits
• [llvm] 23f0fbf - [APInt] APInt::clearBitsSlowCase - fix cut+paste typo when merging lo/himasks (#141108)   via llvm-commits
• [llvm] 19a4e52 - [llvm] Fix typos in documentation (#141078)   via llvm-commits
• [llvm] 9d3ce55 - [MC] Fix HIP buildbot errors after 68472a3 (#141138)   via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Disable V_CNDMASK_B32 conversion with sext (PR #140760)   via llvm-commits
• [llvm] 0c42aef - [HLSL][RootSignature] Add parsing of Register in params for RootDescriptors (#140148)   via llvm-commits
• [llvm] [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (PR #141141)   via llvm-commits
• [compiler-rt] [asan][test] Fix flake in asan_lsan_deadlock test (PR #141145)   via llvm-commits
• [llvm] 5a1311d - [LAA] Strip isNoWrapGEP: dead code (NFC) (#140308)   via llvm-commits
• [llvm] b81170e - [IVDesc] Unify RecurKinds [I|F]FindLastIV (NFC) (#141082)   via llvm-commits
• [llvm] f398f2a - [InstCombine] Preserve GEP no-wrap flags (#141113)   via llvm-commits
• [llvm] [AArch64] Check for immediates using isLegalICmpImmediate (PR #140999)   via llvm-commits
• [compiler-rt] a2ce564 - [compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with arm64 (#141115)   via llvm-commits
• [llvm] [CorrelatedValuePropagation] Run CVP before first SimplifyCFG (PR #141125)   via llvm-commits
• [llvm] Use getSignedTargetConstant for offset (PR #141149)   via llvm-commits
• [llvm] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)   via llvm-commits
• [llvm] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] [BPF] Handle unreachable with a kfunc call (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [NFC][TableGen] Code cleanup in StringMatcher (PR #141118)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [lld] [LLD][MachO][NFC] Refactor LOH code (PR #141153)   via llvm-commits
• [lld] [LLD][MachO][NFC] Refactor LOH code (PR #141153)   via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] [libc][bazel] Add bazel targets for libc/include/... tests. (PR #141150)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [DirectX] change makedouble return type to overloadTy (PR #141156)   via llvm-commits
• [llvm] 523d6c3 - [NFC][TableGen] Code cleanup in StringMatcher (#141118)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] d0acddb - Revert "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (#141157)   via llvm-commits
• [llvm] Revert "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (PR #141157)   via llvm-commits
• [llvm] 1a4d588 - [TableGen] Add missing $ before the dag operator name (#140969)   via llvm-commits
• [compiler-rt] e9304cb - [TSan][Test] Disable signal_recursive.cpp test on Darwin (#141135)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] Changing creation of TensorSpec in a type agnostic manner. (PR #141161)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] Minor typo fix in IR2Vec section of MLGO doc (PR #141162)   via llvm-commits
• [llvm] d659648 - Minor typo fix in IR2Vec section of MLGO doc (#141162)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [MemProf] Attach value profile metadata to the IR using CalleeGuids. (PR #141164)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AArch64] Check for negative numbers when adjusting icmps (PR #140999)   via llvm-commits
• [llvm] [AArch64] Check for negative numbers when adjusting icmps (PR #140999)   via llvm-commits
• [llvm] [AArch64] Check for negative numbers when adjusting icmps (PR #140999)   via llvm-commits
• [llvm] [AArch64] Check for negative numbers when adjusting icmps (PR #140999)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] [LoongArch][NFC] Improve csrxchg instrinsic test case (PR #141060)   via llvm-commits
• [llvm] 0635ef8 - [LoongArch][NFC] Improve csrxchg instrinsic test case (#141060)   via llvm-commits
• [llvm] [LoongArch][NFC] Improve csrxchg instrinsic test case (PR #141060)   via llvm-commits
• [llvm] [llvm-exegesis][Docs] --dump-object-to-disk option is specified by filename rather than bool (PR #141178)   via llvm-commits
• [llvm] [RISCV] Custom lower fixed length partial.reduce to zvqdotq (PR #141180)   via llvm-commits
• [llvm] b79a624 - [clang] Support ASan on WASI (#139014)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] [BOLT] Remove redundant control flow statements (NFC) (PR #141182)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] 2b64b15 - [HLSL][RootSignature] Add parsing of optional parameters for RootDescriptor (#140151)   via llvm-commits
• [llvm] 5d76555 - [NFC][HLSL][RootSignature] Use `operator<<` overload instead of dump method (#141127)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] [AArch64] Convert comparisons with 1 and -1 to 0 if it is profitable (PR #141151)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [clang] [llvm] [Options] Add same-address constraint to the description of '-m[no]ld-seq-sa' (PR #141192)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] 73b8330 - [MLInlineAdvisor] Changing creation of TensorSpec in a type agnostic manner. (#141161)   via llvm-commits
• [llvm] 689342d - [Clang][LoongArch] Add inline asm support for the `q` constraint (#141037)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Add inline asm support for the `q` constraint (PR #141037)   via llvm-commits
• [llvm] [LoongArch] Fix assertion failure for annotate tablejump (PR #140907)   via llvm-commits
• [llvm] [LoongArch] Fix assertion failure for annotate tablejump (PR #140907)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [llvm] [HVX] Support lowering of setuo, seto. (PR #140765)   via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   via llvm-commits
• [lld] [lld][COFF] Remove duplicate strtab entries (PR #141197)   via llvm-commits
• [clang] [llvm] Reland "Add macro to suppress -Wunnecessary-virtual-specifier" (PR #141091)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] [AMDGPU] Promote nestedGEP allocas to vectors (PR #141199)   via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Mips/Linux (PR #141201)   via llvm-commits
• [llvm] Revert "[OHOS] Add support for OpenHarmony" (PR #141198)   via llvm-commits
• [llvm] 782c066 - [MCA] Use a range-based for loop (NFC) (#141187)   via llvm-commits
• [llvm] cc78177 - [llvm] Use *Map::try_emplace (NFC) (#141190)   via llvm-commits
• [llvm] [llvm] Fix a typo in documentation (PR #141204)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for lowering shuffle as lane permute and shuffle. (PR #141205)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for lowering shuffle as lane permute and shuffle. (PR #141205)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for lowering shuffle as lane permute and shuffle. (PR #141205)   via llvm-commits
• [llvm] 34deb76 - [X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (#139741)   via llvm-commits
• [llvm] a58e2d1 - [RISCV] Add compress patterns for qc.extu and qc.mvltui (#140682)   via llvm-commits
• [llvm] [RISCV] Add compress patterns for qc.extu and qc.mvltui (PR #140682)   via llvm-commits
• [llvm] [llvm-pdbutil] Add output file option for pdb2yaml (PR #82300)   via llvm-commits
• [llvm] [llvm-pdbutil] Fix register enum field dumping/parsing (PR #82299)   via llvm-commits
• [llvm] bb7e559 - [AMDGPU] Correct bitshift legality transformation for small vectors (#140940)   via llvm-commits
• [llvm] [AMDGPU] Correct bitshift legality transformation for small vectors (PR #140940)   via llvm-commits
• [llvm] [X86] lowerVECTOR_SHUFFLE - canonicalize zeros/ones/fp splat constants to ensure no undefs (PR #141214)   via llvm-commits
• [llvm] Fix the usage issue of getRegMask. (PR #141215)   via llvm-commits
• [llvm] Fix the usage issue of getRegMask. (PR #141215)   via llvm-commits
• [llvm] 69d6c1f - Revert "[SPIR-V] Support `SPV_INTEL_int4` extension" (#141219)   via llvm-commits
• [llvm] Revert "[SPIR-V] Support `SPV_INTEL_int4` extension" (PR #141219)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [llvm] 6e574a4 - [X86] lowerVECTOR_SHUFFLE - canonicalize zeros/ones/fp splat constants to ensure no undefs (#141214)   via llvm-commits
• [llvm] b6c9c76 - [Verifier] Add checks for range attribute on ImmArg (#140522)   via llvm-commits
• [llvm] [VPlan] Use InstSimplifyFolder in tryToConstantFold (PR #141222)   via llvm-commits
• [llvm] 0240129 - [IVDesc] Unify RecurKinds [I|F]AnyOf (#118393)   via llvm-commits
• [llvm] [VectorCombine] Support nary operands and intrinsics in scalarizeOpOrCmp (PR #138406)   via llvm-commits
• [llvm] [VectorCombine] Support nary operands and intrinsics in scalarizeOpOrCmp (PR #138406)   via llvm-commits
• [llvm] 0f1277d - [NFC][AMDGPU] Move `flat_atomic.ll` to `llvm/test/CodeGen/AMDGPU/` (#141126)   via llvm-commits
• [llvm] [WIP] ABI Lowering Library (PR #140112)   via llvm-commits
• [llvm] 760bf4f - [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (#134611)   via llvm-commits
• [llvm] [VectorCombine] Fold chain of (scalar load)->ext->ext to load->ext. (PR #141109)   via llvm-commits
• [llvm] [Local] Verify opcodes match for all insts passed to mergeFlags (NFC). (PR #141231)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add constant-folding for unary NVVM intrinsics (PR #141233)   via llvm-commits
• [llvm] Add constant-folding for unary NVVM intrinsics (PR #141233)   via llvm-commits
• [llvm] 34813d9 - [Reassociate] Move Disjoint flag handling to OverflowTracking. (#140406)   via llvm-commits
• [llvm] a21fb74 - [RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (#140974)   via llvm-commits
• [llvm] bbca78f - [PowerPC] vector shift word/double by element size - 1 use all ones (#139794)   via llvm-commits
• [llvm] [PowerPC] vector shift word/double by element size - 1 use all ones (PR #139794)   via llvm-commits
• [llvm] [LV] Reuse IRBuilder with InsertPointGuard (NFC) (PR #141236)   via llvm-commits
• [llvm] [VPlan] Strip dead includes in VPRecipeBuilder (NFC) (PR #141239)   via llvm-commits
• [llvm] 1bdec97 - [DirectX] change makedouble return type to overloadTy (#141156)   via llvm-commits
• [llvm] [VPlan] Improve cast code in VPlanRecipes (NFC) (PR #141240)   via llvm-commits
• [llvm] [VPlan] Improve cast code in VPlanRecipes (NFC) (PR #141240)   via llvm-commits
• [llvm] 52c2e45 - [NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)   via llvm-commits
• [llvm] [docs][mlgo] Document custom builds (PR #141243)   via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   via llvm-commits
• [llvm] 3f15b66 - [SPARC] Use op-then-halve instructions when we have VIS3   via llvm-commits
• [llvm] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)   via llvm-commits
• [llvm] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] 51a03ed - Extend llvm objdump fatbin (#140286)   via llvm-commits
• [llvm] 7549f42 - [HLSL][RootSignature] Add parsing of flags to RootDescriptor (#140152)   via llvm-commits
• [llvm] [LoopPeel] Support peeling last iteration with multiple exits. (PR #141247)   via llvm-commits
• [compiler-rt] a2f72ed - [compiler-rt] [test] Don't apply the "arm" or "armhf" patterns for targets starting with "arm64" (#141226)   via llvm-commits
• [llvm] [RISCV] Correctly account for the copy cost of GPR pairs in RISCVMakeCompressible. (PR #141251)   via llvm-commits
• [compiler-rt] 0cf3c43 - [HWASan] Improve symbol indexing (#135967)   via llvm-commits
• [compiler-rt] [HWASan] Improve symbol indexing (PR #135967)   via llvm-commits
• [llvm] Resolve Failing LIT test on Fuchsia (PR #141253)   via llvm-commits
• [llvm] [libc][bazel] Support generating public libc headers in Bazel builds. (PR #141256)   via llvm-commits
• [llvm] [libc][bazel] Support generating public libc headers in Bazel builds. (PR #141256)   via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 (PR #141257)   via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   via llvm-commits
• [llvm] Revert add GenericFloatingPointPredicateUtils #140254 #141257 (PR #141258)   via llvm-commits
• [llvm] GenericFloatingPointPredicateUtils to fix linkage (PR #141260)   via llvm-commits
• [llvm] GenericFloatingPointPredicateUtils to fix linkage (PR #141260)   via llvm-commits
• [llvm] [RISCV] Prevent copying dummy_reg_pair_with_x0 in RISCVMakeCompressible. (PR #141261)   via llvm-commits
• [llvm] Move GenericFloatingPointPredicateUtils to IR to fix linkage (PR #141260)   via llvm-commits
• [llvm] 6e91fb1 - [llvm] Use llvm::erase_if (NFC) (#141185)   via llvm-commits
• [llvm] 961613b - [llvm] Fix a typo in documentation (#141204)   via llvm-commits
• [llvm] [libc][bazel] Support generating public libc headers in Bazel builds. (PR #141256)   via llvm-commits
• [llvm] [libc][bazel] Support generating public libc headers in Bazel builds. (PR #141256)   via llvm-commits
• [llvm] dc8f2f0 - Move GenericFloatingPointPredicateUtils to fix linkage (#141258)   via llvm-commits
• [llvm] [PowerPC] Update DMF VSX ACC data transfer instructions (PR #138897)   via llvm-commits
• [llvm] [PowerPC ]Add a NFC test case for the function atomic_compare_exchange_weak (PR #141263)   via llvm-commits
• [llvm] [InstCombine] Remove dead poison check. NFCI (PR #141264)   via llvm-commits
• [llvm] [WIP][SDAG] Add partial_reduce_sumla node (PR #141267)   via llvm-commits
• [llvm] This commit reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] [RISCV] Print using dummy_reg_pair_with_x0 in more places. (PR #141273)   via llvm-commits
• [llvm] 7b4d2a0 - Resolve Failing LIT test on Fuchsia (#141253)   via llvm-commits
• [llvm] a2d717d - [RISCV] Prevent copying dummy_reg_pair_with_x0 in RISCVMakeCompressible. (#141261)   via llvm-commits
• [llvm] 75d62ee - [RISCV] Correctly account for the copy cost of GPR pairs in RISCVMakeCompressible. (#141251)   via llvm-commits
• [llvm] [NVPTX] Add -nvptx-prec-divf32=3 to disable ftz for f32 fdiv (PR #141276)   via llvm-commits
• [llvm] [NVPTX] Add pm_event intrinsics (PR #141278)   via llvm-commits
• [llvm] Reland [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141279)   via llvm-commits
• [llvm] Reland [SPIR-V] Support `SPV_INTEL_int4` extension (PR #141279)   via llvm-commits
• [compiler-rt] afd3133 - Revert "[compiler-rt][cmake] Test COMPILER_RT_HAS_AARCH64_SME with ar… (#141280)   via llvm-commits
• [llvm] [PowerPC] extend smaller splats into bigger splats (PR #141282)   via llvm-commits
• [llvm] [PowerPC] extend smaller splats into bigger splats (PR #141282)   via llvm-commits
• [llvm] 9f5a670 - [TableGen] !subst on a dag should retain name of operator (#141195)   via llvm-commits
• [llvm] [X86][NFC] Added/Updated SINCOS function testcases (PR #141283)   via llvm-commits
• [llvm] [X86][NFC] Added/Updated SINCOS function testcases (PR #141283)   via llvm-commits
• [llvm] 6520b21 - [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (#127749)   via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [X86][NFC] Added/Updated SINCOS function testcases (PR #141283)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] 7b2fc48 - [InstCombine] Remove dead poison check. NFCI (#141264)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] c6be456 - [docs][mlgo] Document custom builds (#141243)   via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [compiler-rt] 1590ef3 - [asan][test] Disable asan_lsan_deadlock test (#141145)   via llvm-commits
• [lld] e100f54 - [LLD][CMake][MSVC] Install PDBs alongside executables (#126680)   via llvm-commits
• [llvm] [PowerPC] extend smaller splats into bigger splats (PR #141282)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [libc][bazel] Support generating public libc headers in Bazel builds. (PR #141256)   via llvm-commits
• [llvm] cd60ee9 - [RISCV] Prevent using dummy_reg_pair_with_x0 in more places. (#141273)   via llvm-commits
• [llvm] 77a3f81 - [RISCV] Custom lower fixed length partial.reduce to zvqdotq (#141180)   via llvm-commits
• [llvm] [RISCV][test] Improve test robustness. [NFCI] (PR #141268)   via llvm-commits
• [llvm] [SPIR-V] Consistent handling of TargetExtTypes in emit-intrinsics (PR #135682)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)   via llvm-commits
• [llvm] [LLVM] Add color to SDNode ID's when dumping (PR #141295)   via llvm-commits
• [llvm] [RISCV] Use RISCVTargetInstrInfo::copyPhysReg in RISCVMakeCompressible. NFC (PR #141296)   via llvm-commits
• [llvm] [RISCV] Use RISCVTargetInstrInfo::copyPhysReg in RISCVMakeCompressible. NFC (PR #141296)   via llvm-commits
• [llvm] [LOH] Emit hints for LDP/STP instructions (PR #141297)   via llvm-commits
• [llvm] [RISCV][InsertVSETVLI] Remove redundant vsetvli by repeating the coalesce phase (PR #141298)   via llvm-commits
• [llvm] [InstCombine] Fold shuffled intrinsic operands with constant operands (PR #141300)   via llvm-commits
• [llvm] [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (PR #141287)   via llvm-commits
• [llvm] [ConstantFolding] Add folding for [de]interleave2, insert and extract (PR #141301)   via llvm-commits
• [llvm] [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (PR #141303)   via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   via llvm-commits
• [llvm] e9dbf31 - [NFCI][Sanitizer] Convert Matcher::Globs from StringMap to vector. (#140964)   via llvm-commits
• [llvm] bb03cdc - RISCV: Remove shouldForceRelocation and unneeded relocations   via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   via llvm-commits
• [llvm] 7e09a00 - [llvm-exegesis][Docs] --dump-object-to-disk option is specified by filename rather than bool (#141178)   via llvm-commits
• [llvm] [SandboxIR][Region] Auxiliary vector metadata now requires a region (PR #137443)   via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   via llvm-commits
• [llvm] [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (PR #141311)   via llvm-commits
• [llvm] [IPO] Teach AbstractAttribute::getName to return StringRef (NFC) (PR #141313)   via llvm-commits
• [lld] [lld] Use llvm::any_of (NFC) (PR #141316)   via llvm-commits
• [llvm] [XRay] Use llvm::is_contained (NFC) (PR #141318)   via llvm-commits
• [llvm] [Analysis] Remove unused includes (NFC) (PR #141319)   via llvm-commits
• [llvm] [CodeGen] Remove unused includes (NFC) (PR #141320)   via llvm-commits
• [llvm] [CodeGen] Remove unused includes (NFC) (PR #141320)   via llvm-commits
• [llvm] [MC] Remove unused includes (NFC) (PR #141321)   via llvm-commits
• [llvm] IR: Make Module::getOrInsertGlobal() return a GlobalVariable. (PR #141323)   via llvm-commits
• [llvm] IR: Make Module::getOrInsertGlobal() return a GlobalVariable. (PR #141323)   via llvm-commits
• [llvm] IR: Make Module::getOrInsertGlobal() return a GlobalVariable. (PR #141323)   via llvm-commits
• [llvm] ccffa1d - [MC] Don't pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup (#141311)   via llvm-commits
• [llvm] AArch64: Clear hasSideEffects on AUT and AUTPAC. (PR #141330)   via llvm-commits
• [llvm] MCAsmBackend: Simplify applyFixup (PR #141333)   via llvm-commits
• [llvm] [NFC] Refactoring DXContainerYaml Root Parameter representation (PR #138318)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] 871b0a3 - MCAsmBackend: Simplify applyFixup (#141333)   via llvm-commits
• [llvm] github: Add llvm-reduce to PR autolabeler (PR #141335)   via llvm-commits
• [llvm] e03b1b8 - [CodeGen][MachineLoop] Fix getLoopID (#137820)   via llvm-commits
• [llvm] 92cebab - [IPO] Teach AbstractAttribute::getName to return StringRef (NFC) (#141313)   via llvm-commits
• [llvm] ef2531b - [llvm-reduce] Remove unused includes (NFC) (#141322)   via llvm-commits
• [lld] 407df06 - [lld] Use llvm::any_of (NFC) (#141316)   via llvm-commits
• [llvm] d71dcfa - [XRay] Use llvm::is_contained (NFC) (#141318)   via llvm-commits
• [llvm] 0918361 - [Analysis] Remove unused includes (NFC) (#141319)   via llvm-commits
• [llvm] 3bc174b - [CodeGen] Remove unused includes (NFC) (#141320)   via llvm-commits
• [llvm] 2faa45c - [MC] Remove unused includes (NFC) (#141321)   via llvm-commits
• [llvm] [X86][NFC] Added/Updated SINCOS function testcases (PR #141283)   via llvm-commits
• [llvm] a6ca703 - MIPS: Add 64r2 test to CodeGen/fp-maximumnum-minimumnum.ll (#141218)   via llvm-commits
• [llvm] af2a957 - [AArch64] Consistently use/don't use glue with AArch64ISD nodes (NFC) (#140715)   via llvm-commits
• [llvm] BOLT PowerPC Port (PR #140894)   via llvm-commits
• [llvm] LangRef: allocated objects can grow (PR #141338)   via llvm-commits
• [llvm] LangRef: storing poison in memory is UB (PR #141339)   via llvm-commits
• [llvm] github: Add llvm-reduce to PR autolabeler (PR #141335)   via llvm-commits
• [llvm] 4b4699a - [InstCombine] Don't cover up poison elements for shifts when folding shuffles thru binops (#141303)   via llvm-commits
• [llvm] Reorganizes LINK_COMPONENTS into three sections. (PR #141271)   via llvm-commits
• [llvm] [CMake] Move common target dependencies into ${TARGET_LIBRARIES} (PR #141271)   via llvm-commits
• [llvm] [CMake] Move common target dependencies into ${TARGET_LIBRARIES} (PR #141271)   via llvm-commits
• [llvm] 8f9549c - [InstCombine] Refactor fixed and scalable binop shuffle combine. NFCI (#141287)   via llvm-commits
• [llvm] [PredicateInfo] Update comments for PredicateAssume (PR #139269)   via llvm-commits
• [llvm] 1e48418 - [VPlan] Strip dead includes in VPRecipeBuilder (NFC) (#141239)   via llvm-commits
• [lld] [lld] Use llvm::less_second (NFC) (PR #141349)   via llvm-commits
• [lld] [lld] Use llvm::less_second (NFC) (PR #141349)   via llvm-commits
• [llvm] [llvm] Use std::tie to implement comparison functors (NFC) (PR #141353)   via llvm-commits
• [llvm] [LTO] Remove unused includes (NFC) (PR #141355)   via llvm-commits
• [llvm] [TableGen] Remove unused includes (NFC) (PR #141356)   via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   via llvm-commits
• [llvm] [Transforms] Remove unused includes (NFC) (PR #141357)   via llvm-commits
• [llvm] [CMake] Move common target dependencies into ${TARGET_LIBRARIES} (PR #141271)   via llvm-commits
• [lld] 1f3b6d8 - [lld] Use llvm::less_second (NFC) (#141349)   via llvm-commits
• [llvm] 47b9837 - [llvm] Use std::tie to implement comparison functors (NFC) (#141353)   via llvm-commits
• [llvm] 13c3df9 - [Bitcode] Remove unused includes (NFC) (#141354)   via llvm-commits
• [llvm] 64e8935 - [LTO] Remove unused includes (NFC) (#141355)   via llvm-commits
• [llvm] 252bd80 - [TableGen] Remove unused includes (NFC) (#141356)   via llvm-commits
• [llvm] 0ef8ef6 - [Transforms] Remove unused includes (NFC) (#141357)   via llvm-commits
• [llvm] 346a72f - [LLVM] Add color to SDNode ID's when dumping (#141295)   via llvm-commits
• [llvm] [LLVM] Skip dumping inline SDag children (PR #141359)   via llvm-commits
• [llvm] 6bbaef1 - Re-apply "[StaticDataLayout][PGO]Implement reader and writer change for data access profiles" (#141275)   via llvm-commits
• [llvm] dcef154 - [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (#117506)   via llvm-commits
• [llvm] [NewGVN] Precommit test (PR #141362)   via llvm-commits
• [llvm] [NewGVN] Precommit test (PR #141362)   via llvm-commits
• [llvm] [BPF] Handle traps with kfunc call __bpf_trap (PR #131731)   via llvm-commits
• [llvm] [NewGVN] Precommit test (PR #141362)   via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   via llvm-commits
• [llvm] [NFC] Fix evaluation order dependency in call arguments (PR #141366)   via llvm-commits
• [llvm] 2f3bc37 - [PredicateInfo] Update comments for PredicateAssume (NFC) (#139269)   via llvm-commits
• [llvm] [PredicateInfo] Update comments for PredicateAssume (NFC) (PR #139269)   via llvm-commits
• [llvm] [RISCV] Use llvm::is_contained (NFC) (PR #141372)   via llvm-commits
• [llvm] [Support] Use std::map::try_emplace (NFC) (PR #141374)   via llvm-commits
• [llvm] [AArch64] Remove unused includes (NFC) (PR #141375)   via llvm-commits
• [llvm] [llvm] FloatingPointPredicateUtils declare template specializations (PR #141368)   via llvm-commits
• [llvm] [AMDGPU] Remove unused includes (NFC) (PR #141376)   via llvm-commits
• [llvm] [ARM] Remove unused includes (NFC) (PR #141377)   via llvm-commits
• [llvm] [RISCV] Remove unused includes (NFC) (PR #141378)   via llvm-commits
• [llvm] [X86] Remove unused includes (NFC) (PR #141379)   via llvm-commits
• [llvm] f093d7e - fix zstd_shared detection on mingw (#139945)   via llvm-commits
• [llvm] 1ecc291 - [RISCV] Use llvm::is_contained (NFC) (#141372)   via llvm-commits
• [llvm] 448d0ec - [Support] Use std::map::try_emplace (NFC) (#141374)   via llvm-commits
• [llvm] c192d53 - [AArch64] Remove unused includes (NFC) (#141375)   via llvm-commits
• [llvm] 1e8e662 - [AMDGPU] Remove unused includes (NFC) (#141376)   via llvm-commits
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• [llvm] b77e36d - [RISCV] Remove unused includes (NFC) (#141378)   via llvm-commits
• [llvm] 13d7c60 - [X86] Remove unused includes (NFC) (#141379)   via llvm-commits
• [lld] [lld] Fix a typo in documentation (PR #141383)   via llvm-commits
• [lld] [lld] Remove unused includes (NFC) (PR #141388)   via llvm-commits
• [llvm] [llvm-objcopy] Remove unused includes (NFC) (PR #141389)   via llvm-commits
• [llvm] [llvm-objdump] Remove unused includes (NFC) (PR #141390)   via llvm-commits
• [llvm] [InstCombine] Forward memcpy source to load instruction (PR #140249)   via llvm-commits
• [llvm] [InstCombine] Forward memcpy source to load instruction (PR #140249)   via llvm-commits
• [llvm] 1593bf4 - [RISCV] Support LLVM IR intrinsics for XAndesVDot (#140223)   via llvm-commits
• [llvm] RISCV] Select NDS_BFOZ for and with trailing ones mask (PR #141398)   via llvm-commits
• [llvm] bc0c4db - [SCEV] Add dedicated AffineAddRec matcher + loop matchers (NFC). (#141141)   via llvm-commits
• [llvm] [AMDGPU] Cluster export instruction in PostRA Scheduler (PR #141399)   via llvm-commits
• [llvm] [AMDGPU] Add export clustering post-RA scheduler test (NFC) (PR #141400)   via llvm-commits
• [llvm] [NewGVN] Precommit test (PR #141362)   via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   via llvm-commits
• [llvm] c0506a1 - [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (#140621)   via llvm-commits
• [llvm] 49c39ef - [llvm] FloatingPointPredicateUtils declare template specializations (#141368)   via llvm-commits
• [llvm] [RISCV] Move RISCVIndirectBranchTracking before Branch Relaxation (PR #139993)   via llvm-commits
• [llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)   via llvm-commits
• [llvm] [AArch64] Extend usage of `XAR` instruction for fixed-length operations (PR #139460)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [llvm] [VPlan] Separate out logic to manage IR flags to VPIRFlags (NFC). (PR #140621)   via llvm-commits
• [lld] 7341031 - [lld] Fix a typo in documentation (#141383)   via llvm-commits
• [llvm] 217f622 - [ExecutionEngine] Use llvm::none_of (NFC) (#141387)   via llvm-commits
• [llvm] 36d2b1c - [llvm-objcopy] Remove unused includes (NFC) (#141389)   via llvm-commits
• [llvm] c41a4a8 - [llvm-objdump] Remove unused includes (NFC) (#141390)   via llvm-commits
• [lld] [lld] Remove unused includes (NFC) (PR #141421)   via llvm-commits
• [llvm] [InstCombine] Detect uadd with overflow idiom (PR #140178)   via llvm-commits
• [lld] 19f00c0 - [lld] Remove unused includes (NFC) (#141421)   via llvm-commits
• [llvm] [VPlan] Use SINGLE-SCALAR when printing single-scalar VPInstructions. (PR #141428)   via llvm-commits
• [llvm] [VPlan] Use VPInstruction for uniform binops. (PR #141429)   via llvm-commits
• [llvm] [RISCV][TTI] Adjust costing in getPartialReductionCost for zvqdotq (PR #141430)   via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   via llvm-commits
• [llvm] [VPlan] Construct initial once and pass clones to tryToBuildVPlan (NFC). (PR #141363)   via llvm-commits
• [llvm] 7204141 - [NVPTX][NFC] Refactor and cleanup NVPTXISelLowering call lowering 2/n (#137666)   via llvm-commits
• [llvm] [VPlan] Use SINGLE-SCALAR when printing single-scalar VPInstructions. (PR #141428)   via llvm-commits
• [llvm] [VPlan] Use SINGLE-SCALAR when printing single-scalar VPInstructions. (PR #141428)   via llvm-commits
• [llvm] [VPlan] Use SINGLE-SCALAR when printing single-scalar VPInstructions. (PR #141428)   via llvm-commits
• [llvm] [LV] Vectorize selecting index of min/max element. (PR #141431)   via llvm-commits
• [llvm] [InstCombine] Forward memcpy source to load instruction (PR #140249)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [CI][Github] Prune windows container (PR #141440)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [llvm] [AMDGPU] Use StringRef::consume_front (NFC) (PR #141442)   via llvm-commits
• [llvm] [llvm] Use llvm::any_of (NFC) (PR #141444)   via llvm-commits
• [llvm] [Scalar] Use llvm::count (NFC) (PR #141445)   via llvm-commits
• [llvm] [PowerPC] Remove unused includes (NFC) (PR #141449)   via llvm-commits
• [llvm] [SPIRV] Remove unused includes (NFC) (PR #141450)   via llvm-commits
• [clang] [llvm] [Options] Add same-address constraint to the description of '-m[no]ld-seq-sa' (PR #141192)   via llvm-commits
• [llvm] 7af14e5 - [NFC][Options] Add same-address constraint to the description of '-m[no]ld-seq-sa' (#141192)   via llvm-commits
• [clang] [llvm] [Options] Add same-address constraint to the description of '-m[no]ld-seq-sa' (PR #141192)   via llvm-commits
• [llvm] Attributor: Infer noalias.addrspace metadata for memory instructions (PR #136553)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] [X86][NFC] Use std::move to avoid copy (PR #141455)   via llvm-commits
• [llvm] [XRay] Fix tail call sleds for AArch64 (PR #141403)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] 18fced4 - [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (#141453)   via llvm-commits
• [llvm] [LLVM][MLGO] Fix: Index correctly into features to get default inlining decision (PR #141453)   via llvm-commits
• [clang] [flang] [llvm] Add IR Profile-Guided Optimization (IR PGO) support to the Flang compiler (PR #136098)   via llvm-commits
• [clang] [flang] [llvm] Add IR Profile-Guided Optimization (IR PGO) support to the Flang compiler (PR #136098)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [llvm] Add a pass "SinkGEPConstOffset" (PR #140657)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [clang] [llvm] [Clang][LoongArch] Support target attribute for function (PR #140700)   via llvm-commits
• [llvm] [PowerPC][NFC] clean up if-else block in PPCRegisterInfo.cpp (PR #140084)   zhijian lin via llvm-commits
• [llvm] [PowerPC][NFC] clean up if-else block in PPCRegisterInfo.cpp (PR #140084)   zhijian lin via llvm-commits
• [llvm] [PowerPC][NFC] clean up if-else block in PPCRegisterInfo.cpp (PR #140084)   zhijian lin via llvm-commits
• [llvm] [PowerPC ]Add a NFC test case for the function atomic_compare_exchange_weak (PR #141263)   zhijian lin via llvm-commits
• [llvm] [PowerPC ]Add a NFC test case for the function atomic_compare_exchange_weak (PR #141263)   zhijian lin via llvm-commits
• [llvm] [PowerPC ][NFC] Add a test case for the function atomic_compare_exchange_weak (PR #141263)   zhijian lin via llvm-commits