[llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)

[Vikash Gupta via llvm-commits]

vg0204 wrote:

> > 2. MachineVerifier failure (Exit Code : 2) -> due to use of register whose regUnits are completely killed in some other form (its subreg or alias). There are only such 2 tests, that can be easily modified to solve it keeping it semantically same.
> 
> I took a look at `test/CodeGen/RISCV/make-compressible-zfinx.mir`. I disagree with "can be easily modified to solve it". This is another case where regunits cannot distinguish between a subreg and a superreg.
> 
> The RISCV example is: `x10_h` is a subreg of `x10_w` which is a subreg of `x10`. But all of them have only a single regunit (number 56 in the dumps I looked at).
> 
> This has been discussed before: #96146, [#95926 (comment)](https://github.com/llvm/llvm-project/pull/95926#discussion_r1644612311) FYI @topperc, @Pierre-vh, @qcolombet
> 
> We need a proper solution for this issue _before_ continuing with the current patch.

Yes! There is one more scenario, that's not considered in this discussion when regunits are same despite different registers, when supperegs is composed of only addressable subregs. For example: in X86, both EAX and RAX have same set of regunits (HAX, AH, AL), as RAX (64bits) has got lower 32 bit subreg i.e. EAX & got nothing to represent upper 32bits. As in https://github.com/llvm/llvm-project/issues/96146, fake high regunits can now be seen. Such instance is quite commonplace.

I think as per current implementation the regunits are something that really not register composed of uniquely, but are the bare minimum chunks that can represent aliasing and overlaps (for addressable parts only OR fake registers) in registers. What do you think, as its make migration to regunit itself a very tricky thing in general.

https://github.com/llvm/llvm-project/pull/129847