[llvm] 84f06b8 - MCAsmBackend: Add member variable MCAssembler * and define getContext
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Fri May 23 23:01:35 PDT 2025
Author: Fangrui Song
Date: 2025-05-23T23:01:30-07:00
New Revision: 84f06b88b64352e35fc8363081e58fd37e326452
URL: https://github.com/llvm/llvm-project/commit/84f06b88b64352e35fc8363081e58fd37e326452
DIFF: https://github.com/llvm/llvm-project/commit/84f06b88b64352e35fc8363081e58fd37e326452.diff
LOG: MCAsmBackend: Add member variable MCAssembler * and define getContext
A lot of member functions have the MCAssembler * argument just to call
getContext. Let's cache the MCAssembler pointer.
Added:
Modified:
llvm/include/llvm/MC/MCAsmBackend.h
llvm/lib/MC/MCAsmBackend.cpp
llvm/lib/MC/MCAssembler.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
index ec70dc8811185..386bf04bb6493 100644
--- a/llvm/include/llvm/MC/MCAsmBackend.h
+++ b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -43,6 +43,8 @@ class MCAsmBackend {
protected: // Can only create subclasses.
MCAsmBackend(llvm::endianness Endian, bool LinkerRelaxation = false);
+ MCAssembler *Asm = nullptr;
+
public:
MCAsmBackend(const MCAsmBackend &) = delete;
MCAsmBackend &operator=(const MCAsmBackend &) = delete;
@@ -50,6 +52,10 @@ class MCAsmBackend {
const llvm::endianness Endian;
+ void setAssembler(MCAssembler *A) { Asm = A; }
+
+ MCContext &getContext() const;
+
/// True for RISC-V and LoongArch. Relaxable relocations are marked with a
/// RELAX relocation.
bool allowLinkerRelaxation() const { return LinkerRelaxation; }
diff --git a/llvm/lib/MC/MCAsmBackend.cpp b/llvm/lib/MC/MCAsmBackend.cpp
index 189ac883c87a9..c8d1831ae6d3e 100644
--- a/llvm/lib/MC/MCAsmBackend.cpp
+++ b/llvm/lib/MC/MCAsmBackend.cpp
@@ -29,6 +29,8 @@ MCAsmBackend::MCAsmBackend(llvm::endianness Endian, bool LinkerRelaxation)
MCAsmBackend::~MCAsmBackend() = default;
+MCContext &MCAsmBackend::getContext() const { return Asm->getContext(); }
+
std::unique_ptr<MCObjectWriter>
MCAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
auto TW = createObjectTargetWriter();
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index f71008826888f..ac67a0d2c05d9 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -82,7 +82,10 @@ MCAssembler::MCAssembler(MCContext &Context,
std::unique_ptr<MCCodeEmitter> Emitter,
std::unique_ptr<MCObjectWriter> Writer)
: Context(Context), Backend(std::move(Backend)),
- Emitter(std::move(Emitter)), Writer(std::move(Writer)) {}
+ Emitter(std::move(Emitter)), Writer(std::move(Writer)) {
+ if (this->Backend)
+ this->Backend->setAssembler(this);
+}
void MCAssembler::reset() {
RelaxAll = false;
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 74f083cc8845e..3c5509a7688ac 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -431,8 +431,8 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
SymLoc == AArch64AuthMCExpr::VK_AUTHADDR) {
const auto *Expr = dyn_cast<AArch64AuthMCExpr>(Fixup.getValue());
if (!Expr) {
- Asm.getContext().reportError(Fixup.getValue()->getLoc(),
- "expected relocatable expression");
+ getContext().reportError(Fixup.getValue()->getLoc(),
+ "expected relocatable expression");
return;
}
assert(Value == 0);
@@ -446,7 +446,7 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
return; // Doesn't change encoding.
unsigned NumBytes = getFixupKindNumBytes(Kind);
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
int64_t SignedValue = static_cast<int64_t>(Value);
// Apply any target-specific value adjustments.
Value = adjustFixupValue(Fixup, Target, Value, Ctx, TheTriple, IsResolved);
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
index 9ec7c3595e555..0a2c9cca3887a 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -141,7 +141,7 @@ void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
if (mc::isRelocation(Fixup.getKind()))
return;
- Value = adjustFixupValue(Fixup, Value, &Asm.getContext());
+ Value = adjustFixupValue(Fixup, Value, &getContext());
if (!Value)
return; // Doesn't change encoding.
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 66bbaef5d705d..09d34abf0a272 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -475,7 +475,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
// Other relocation types don't want this bit though (branches couldn't encode
// it if it *was* present, and no other relocations exist) and it can
// interfere with checking valid expressions.
- bool IsMachO = Asm.getContext().getObjectFileType() == MCContext::IsMachO;
+ bool IsMachO = getContext().getObjectFileType() == MCContext::IsMachO;
if (const auto *SA = Target.getAddSym()) {
if (IsMachO && Asm.isThumbFunc(SA) && SA->isExternal() &&
(Kind == FK_Data_4 || Kind == ARM::fixup_arm_movw_lo16 ||
@@ -1135,7 +1135,7 @@ void ARMAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
auto Kind = Fixup.getKind();
if (mc::isRelocation(Kind))
return;
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
Value = adjustFixupValue(Asm, Fixup, Target, Value, IsResolved, Ctx, STI);
if (!Value)
return; // Doesn't change encoding.
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
index dfe192ab7ee80..4235541508aae 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
@@ -391,7 +391,7 @@ void AVRAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCSubtargetInfo *STI) const {
if (mc::isRelocation(Fixup.getKind()))
return;
- adjustFixupValue(Fixup, Target, Value, &Asm.getContext());
+ adjustFixupValue(Fixup, Target, Value, &getContext());
if (Value == 0)
return; // Doesn't change encoding.
@@ -532,7 +532,7 @@ bool AVRAsmBackend::forceRelocation(const MCAssembler &Asm, const MCFragment &F,
// hopes are that the module we're currently compiling won't be actually
// linked to the final binary.
return !adjust::adjustRelativeBranch(Size, Fixup, Offset,
- Asm.getContext().getSubtargetInfo());
+ getContext().getSubtargetInfo());
}
case AVR::fixup_call:
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
index 0c710b8ecdfef..25453d99d0aab 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
@@ -197,7 +197,7 @@ void CSKYAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
MCFixupKind Kind = Fixup.getKind();
if (mc::isRelocation(Kind))
return;
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
MCFixupKindInfo Info = getFixupKindInfo(Kind);
if (!Value)
return; // Doesn't change encoding.
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
index 0aa6e63a06fe4..058f97426ed00 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
@@ -594,7 +594,7 @@ class HexagonAsmBackend : public MCAsmBackend {
if (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_SIZE) {
++relaxedCnt;
*RelaxTarget = &MCI;
- setExtender(Asm.getContext());
+ setExtender(getContext());
return true;
} else {
return false;
@@ -632,7 +632,7 @@ class HexagonAsmBackend : public MCAsmBackend {
if (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_SIZE) {
++relaxedCnt;
*RelaxTarget = &MCI;
- setExtender(Asm.getContext());
+ setExtender(getContext());
return true;
}
}
@@ -722,7 +722,7 @@ class HexagonAsmBackend : public MCAsmBackend {
break;
}
case MCFragment::FT_Relaxable: {
- MCContext &Context = Asm.getContext();
+ MCContext &Context = getContext();
auto &RF = cast<MCRelaxableFragment>(*Frags[K]);
auto &Inst = const_cast<MCInst &>(RF.getInst());
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index 46d104ce50dd2..2586039b2bb68 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -153,7 +153,7 @@ void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm,
if (mc::isRelocation(Kind))
return;
MCFixupKindInfo Info = getFixupKindInfo(Kind);
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
// Fixup leb128 separately.
if (Fixup.getTargetKind() == FK_Data_leb128)
@@ -216,7 +216,7 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
return false;
MCSection *Sec = AF.getParent();
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
const MCExpr *Dummy = MCConstantExpr::create(0, Ctx);
MCFixup Fixup = MCFixup::create(0, Dummy, ELF::R_LARCH_ALIGN);
unsigned MaxBytesToEmit = AF.getMaxBytesToEmit();
@@ -299,7 +299,7 @@ std::pair<bool, bool> LoongArchAsmBackend::relaxLEB128(const MCAssembler &Asm,
bool LoongArchAsmBackend::relaxDwarfLineAddr(const MCAssembler &Asm,
MCDwarfLineAddrFragment &DF,
bool &WasRelaxed) const {
- MCContext &C = Asm.getContext();
+ MCContext &C = getContext();
int64_t LineDelta = DF.getLineDelta();
const MCExpr &AddrDelta = DF.getAddrDelta();
@@ -383,7 +383,7 @@ bool LoongArchAsmBackend::relaxDwarfCFA(const MCAssembler &Asm,
Fixups.clear();
raw_svector_ostream OS(Data);
- assert(Asm.getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
+ assert(getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
"expected 1-byte alignment");
if (Value == 0) {
WasRelaxed = OldSize != Data.size();
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
index cf237a9ba59c2..646d7807cb5d4 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
@@ -109,7 +109,7 @@ void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved,
const MCSubtargetInfo *STI) const {
- Value = adjustFixupValue(Fixup, Value, Asm.getContext());
+ Value = adjustFixupValue(Fixup, Value, getContext());
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
if (!Value)
return; // Doesn't change encoding.
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 3cf485167a2f0..9e421c77d23bb 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -248,7 +248,7 @@ void MipsAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
bool IsResolved,
const MCSubtargetInfo *STI) const {
MCFixupKind Kind = Fixup.getKind();
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
Value = adjustFixupValue(Fixup, Value, Ctx);
if (!Value)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 1a31610a0a5e9..d919c0d2d1381 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -238,7 +238,7 @@ void RISCVAsmBackend::relaxInstruction(MCInst &Inst,
bool RISCVAsmBackend::relaxDwarfLineAddr(const MCAssembler &Asm,
MCDwarfLineAddrFragment &DF,
bool &WasRelaxed) const {
- MCContext &C = Asm.getContext();
+ MCContext &C = getContext();
int64_t LineDelta = DF.getLineDelta();
const MCExpr &AddrDelta = DF.getAddrDelta();
@@ -320,7 +320,7 @@ bool RISCVAsmBackend::relaxDwarfCFA(const MCAssembler &Asm,
Fixups.clear();
raw_svector_ostream OS(Data);
- assert(Asm.getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
+ assert(getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
"expected 1-byte alignment");
if (Value == 0) {
WasRelaxed = OldSize != Data.size();
@@ -561,7 +561,7 @@ bool RISCVAsmBackend::isPCRelFixupResolved(const MCAssembler &Asm,
// offset-affected MCAlignFragment). Complements the generic
// isSymbolRefDifferenceFullyResolvedImpl.
if (!PCRelTemp)
- PCRelTemp = Asm.getContext().createTempSymbol();
+ PCRelTemp = getContext().createTempSymbol();
PCRelTemp->setFragment(const_cast<MCFragment *>(&F));
MCValue Res;
MCExpr::evaluateSymbolicAdd(&Asm, false, MCValue::get(SymA),
@@ -584,8 +584,8 @@ bool RISCVAsmBackend::evaluateTargetFixup(const MCAssembler &Asm,
case RISCV::fixup_riscv_pcrel_lo12_s: {
AUIPCFixup = cast<RISCVMCExpr>(Fixup.getValue())->getPCRelHiFixup(&AUIPCDF);
if (!AUIPCFixup) {
- Asm.getContext().reportError(Fixup.getLoc(),
- "could not find corresponding %pcrel_hi");
+ getContext().reportError(Fixup.getLoc(),
+ "could not find corresponding %pcrel_hi");
return true;
}
@@ -687,7 +687,7 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
MCFixupKind Kind = Fixup.getKind();
if (mc::isRelocation(Kind))
return;
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
MCFixupKindInfo Info = getFixupKindInfo(Kind);
if (!Value)
return; // Doesn't change encoding.
@@ -750,7 +750,7 @@ bool RISCVAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
if (!shouldInsertExtraNopBytesForCodeAlign(AF, Count) || (Count == 0))
return false;
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
const MCExpr *Dummy = MCConstantExpr::create(0, Ctx);
// Create fixup_riscv_align fixup.
MCFixup Fixup = MCFixup::create(0, Dummy, ELF::R_RISCV_ALIGN, SMLoc());
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
index a456ae0c52e10..dcdbd2bb95adb 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
@@ -177,7 +177,7 @@ void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
assert(Offset + Size <= Data.size() && "Invalid fixup offset!");
// Big-endian insertion of Size bytes.
- Value = extractBitsForFixup(Kind, Value, Fixup, Asm.getContext());
+ Value = extractBitsForFixup(Kind, Value, Fixup, getContext());
if (BitSize < 64)
Value &= ((uint64_t)1 << BitSize) - 1;
unsigned ShiftValue = (Size * 8) - 8;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 7869856ced67d..8751e978e1e16 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -713,8 +713,8 @@ void X86AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
getFixupKindInfo(Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel) {
// check that PC relative fixup fits into the fixup size.
if (Size > 0 && !isIntN(Size * 8, SignedValue))
- Asm.getContext().reportError(
- Fixup.getLoc(), "value of " + Twine(SignedValue) +
+ getContext().reportError(Fixup.getLoc(),
+ "value of " + Twine(SignedValue) +
" is too large for field of " + Twine(Size) +
((Size == 1) ? " byte." : " bytes."));
} else {
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
index 9dc31062528fd..c77da070a595f 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
@@ -149,7 +149,7 @@ void XtensaAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
MutableArrayRef<char> Data, uint64_t Value,
bool IsResolved,
const MCSubtargetInfo *STI) const {
- MCContext &Ctx = Asm.getContext();
+ MCContext &Ctx = getContext();
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
Value = adjustFixupValue(Fixup, Value, Ctx);
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