[llvm] Adding Matching and Inference Functionality to Propeller-Patch 1 (PR #140886)
via llvm-commits
llvm-commits at lists.llvm.org
Thu May 22 06:46:49 PDT 2025
https://github.com/wdx727 updated https://github.com/llvm/llvm-project/pull/140886
>From 910ba132eaa5970e47d9857eb8b8a40265fe729b Mon Sep 17 00:00:00 2001
From: wudexin <wudexin at kuaishou.com>
Date: Wed, 21 May 2025 19:39:29 +0800
Subject: [PATCH 1/5] Add a pass to calculate the hash value of MachineBlock
and write the hash into the bb_address_map section. Related test cases and
tools will also be modified.
---
.../llvm/CodeGen/MachineBlockHashInfo.h | 108 ++++++++++++++++++
llvm/include/llvm/InitializePasses.h | 1 +
llvm/include/llvm/Object/ELFTypes.h | 5 +-
llvm/include/llvm/ObjectYAML/ELFYAML.h | 1 +
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +
llvm/lib/CodeGen/CMakeLists.txt | 1 +
llvm/lib/CodeGen/CodeGen.cpp | 1 +
llvm/lib/CodeGen/MachineBlockHashInfo.cpp | 104 +++++++++++++++++
llvm/lib/Object/ELF.cpp | 3 +-
llvm/lib/ObjectYAML/ELFEmitter.cpp | 1 +
llvm/lib/ObjectYAML/ELFYAML.cpp | 1 +
.../basic-block-address-map-pgo-features.ll | 6 +
...k-address-map-with-basic-block-sections.ll | 5 +-
.../X86/basic-block-address-map-with-mfs.ll | 3 +
.../CodeGen/X86/basic-block-address-map.ll | 6 +
...ddrmap-disassemble-symbolize-operands.yaml | 18 +++
.../elf-bbaddrmap-symbolize-relocatable.yaml | 10 +-
.../llvm-objdump/X86/elf-pgoanalysismap.yaml | 9 ++
.../ELF/bb-addr-map-pgo-analysis-map.test | 16 ++-
.../ELF/bb-addr-map-relocatable.test | 11 +-
.../tools/llvm-readobj/ELF/bb-addr-map.test | 12 +-
.../ELF/bb-addr-map-pgo-analysis-map.yaml | 10 ++
llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml | 10 ++
.../ELF/bb-addr-map-pgo-analysis-map.yaml | 9 +-
llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml | 9 +-
llvm/tools/llvm-readobj/ELFDumper.cpp | 1 +
llvm/tools/obj2yaml/elf2yaml.cpp | 3 +-
llvm/unittests/Object/ELFObjectFileTest.cpp | 87 +++++++++-----
28 files changed, 409 insertions(+), 48 deletions(-)
create mode 100644 llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
create mode 100644 llvm/lib/CodeGen/MachineBlockHashInfo.cpp
diff --git a/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h b/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
new file mode 100644
index 0000000000000..a943f71357e6e
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
@@ -0,0 +1,108 @@
+#ifndef LLVM_CODEGEN_MACHINEBLOCKHASHINFO_H
+#define LLVM_CODEGEN_MACHINEBLOCKHASHINFO_H
+
+#include "llvm/CodeGen/MachineFunctionPass.h"
+
+namespace llvm {
+
+/// An object wrapping several components of a basic block hash. The combined
+/// (blended) hash is represented and stored as one uint64_t, while individual
+/// components are of smaller size (e.g., uint16_t or uint8_t).
+struct BlendedBlockHash {
+private:
+ static uint64_t combineHashes(uint16_t Hash1, uint16_t Hash2, uint16_t Hash3,
+ uint16_t Hash4) {
+ uint64_t Hash = 0;
+
+ Hash |= uint64_t(Hash4);
+ Hash <<= 16;
+
+ Hash |= uint64_t(Hash3);
+ Hash <<= 16;
+
+ Hash |= uint64_t(Hash2);
+ Hash <<= 16;
+
+ Hash |= uint64_t(Hash1);
+
+ return Hash;
+ }
+
+ static void parseHashes(uint64_t Hash, uint16_t &Hash1, uint16_t &Hash2,
+ uint16_t &Hash3, uint16_t &Hash4) {
+ Hash1 = Hash & 0xffff;
+ Hash >>= 16;
+
+ Hash2 = Hash & 0xffff;
+ Hash >>= 16;
+
+ Hash3 = Hash & 0xffff;
+ Hash >>= 16;
+
+ Hash4 = Hash & 0xffff;
+ Hash >>= 16;
+ }
+
+public:
+ explicit BlendedBlockHash() {}
+
+ explicit BlendedBlockHash(uint64_t CombinedHash) {
+ parseHashes(CombinedHash, Offset, OpcodeHash, InstrHash, NeighborHash);
+ }
+
+ /// Combine the blended hash into uint64_t.
+ uint64_t combine() const {
+ return combineHashes(Offset, OpcodeHash, InstrHash, NeighborHash);
+ }
+
+ /// Compute a distance between two given blended hashes. The smaller the
+ /// distance, the more similar two blocks are. For identical basic blocks,
+ /// the distance is zero.
+ uint64_t distance(const BlendedBlockHash &BBH) const {
+ assert(OpcodeHash == BBH.OpcodeHash &&
+ "incorrect blended hash distance computation");
+ uint64_t Dist = 0;
+ // Account for NeighborHash
+ Dist += NeighborHash == BBH.NeighborHash ? 0 : 1;
+ Dist <<= 16;
+ // Account for InstrHash
+ Dist += InstrHash == BBH.InstrHash ? 0 : 1;
+ Dist <<= 16;
+ // Account for Offset
+ Dist += (Offset >= BBH.Offset ? Offset - BBH.Offset : BBH.Offset - Offset);
+ return Dist;
+ }
+
+ /// The offset of the basic block from the function start.
+ uint16_t Offset{0};
+ /// (Loose) Hash of the basic block instructions, excluding operands.
+ uint16_t OpcodeHash{0};
+ /// (Strong) Hash of the basic block instructions, including opcodes and
+ /// operands.
+ uint16_t InstrHash{0};
+ /// Hash of the (loose) basic block together with (loose) hashes of its
+ /// successors and predecessors.
+ uint16_t NeighborHash{0};
+};
+
+class MachineBlockHashInfo : public MachineFunctionPass {
+ DenseMap<unsigned, uint64_t> MBBHashInfo;
+
+public:
+ static char ID;
+ MachineBlockHashInfo();
+
+ StringRef getPassName() const override {
+ return "Basic Block Hash Compute";
+ }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ bool runOnMachineFunction(MachineFunction &F) override;
+
+ uint64_t getMBBHash(const MachineBasicBlock &MBB);
+};
+
+} // end namespace llvm
+
+#endif // LLVM_CODEGEN_MACHINEBLOCKHASHINFO_H
\ No newline at end of file
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 42610d505c2bd..8cb62d5baf235 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -187,6 +187,7 @@ void initializeMIRCanonicalizerPass(PassRegistry &);
void initializeMIRNamerPass(PassRegistry &);
void initializeMIRPrintingPassPass(PassRegistry &);
void initializeMachineBlockFrequencyInfoWrapperPassPass(PassRegistry &);
+void initializeMachineBlockHashInfoPass(PassRegistry&);
void initializeMachineBlockPlacementLegacyPass(PassRegistry &);
void initializeMachineBlockPlacementStatsLegacyPass(PassRegistry &);
void initializeMachineBranchProbabilityInfoWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Object/ELFTypes.h b/llvm/include/llvm/Object/ELFTypes.h
index 87e4dbe448091..8a0b257d2ca27 100644
--- a/llvm/include/llvm/Object/ELFTypes.h
+++ b/llvm/include/llvm/Object/ELFTypes.h
@@ -914,9 +914,10 @@ struct BBAddrMap {
uint32_t Size = 0; // Size of the basic block.
Metadata MD = {false, false, false, false,
false}; // Metdata for this basic block.
+ uint64_t Hash = 0; // Hash for this basic block.
- BBEntry(uint32_t ID, uint32_t Offset, uint32_t Size, Metadata MD)
- : ID(ID), Offset(Offset), Size(Size), MD(MD){};
+ BBEntry(uint32_t ID, uint32_t Offset, uint32_t Size, Metadata MD, uint64_t Hash)
+ : ID(ID), Offset(Offset), Size(Size), MD(MD), Hash(Hash){};
bool operator==(const BBEntry &Other) const {
return ID == Other.ID && Offset == Other.Offset && Size == Other.Size &&
diff --git a/llvm/include/llvm/ObjectYAML/ELFYAML.h b/llvm/include/llvm/ObjectYAML/ELFYAML.h
index dfdfa055d65fa..9427042db4303 100644
--- a/llvm/include/llvm/ObjectYAML/ELFYAML.h
+++ b/llvm/include/llvm/ObjectYAML/ELFYAML.h
@@ -162,6 +162,7 @@ struct BBAddrMapEntry {
llvm::yaml::Hex64 AddressOffset;
llvm::yaml::Hex64 Size;
llvm::yaml::Hex64 Metadata;
+ llvm::yaml::Hex64 Hash;
};
uint8_t Version;
llvm::yaml::Hex8 Feature;
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index fdb81b05d9490..2e1e191183557 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -40,6 +40,7 @@
#include "llvm/CodeGen/GCMetadataPrinter.h"
#include "llvm/CodeGen/LazyMachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineBlockHashInfo.h"
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineDominators.h"
@@ -451,6 +452,7 @@ const MCSection *AsmPrinter::getCurrentSection() const {
void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
+ AU.addRequired<MachineBlockHashInfo>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
AU.addRequired<GCModuleInfo>();
AU.addRequired<LazyMachineBlockFrequencyInfoPass>();
@@ -1479,6 +1481,8 @@ void AsmPrinter::emitBBAddrMapSection(const MachineFunction &MF) {
PrevMBBEndSymbol = MBBSymbol;
}
+ auto MBHI = &getAnalysis<MachineBlockHashInfo>();
+
if (!Features.OmitBBEntries) {
// TODO: Remove this check when version 1 is deprecated.
if (BBAddrMapVersion > 1) {
@@ -1498,6 +1502,8 @@ void AsmPrinter::emitBBAddrMapSection(const MachineFunction &MF) {
emitLabelDifferenceAsULEB128(MBB.getEndSymbol(), MBBSymbol);
// Emit the Metadata.
OutStreamer->emitULEB128IntValue(getBBAddrMapMetadata(MBB));
+ // Emit the Hash.
+ OutStreamer->emitULEB128IntValue(MBHI->getMBBHash(MBB));
}
PrevMBBEndSymbol = MBB.getEndSymbol();
diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt
index 5dd6413431255..424f7b98e2c91 100644
--- a/llvm/lib/CodeGen/CMakeLists.txt
+++ b/llvm/lib/CodeGen/CMakeLists.txt
@@ -108,6 +108,7 @@ add_llvm_component_library(LLVMCodeGen
LowerEmuTLS.cpp
MachineBasicBlock.cpp
MachineBlockFrequencyInfo.cpp
+ MachineBlockHashInfo.cpp
MachineBlockPlacement.cpp
MachineBranchProbabilityInfo.cpp
MachineCFGPrinter.cpp
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 5250534d8a4e4..f66b6af84e971 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -72,6 +72,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMIRNamerPass(Registry);
initializeMIRProfileLoaderPassPass(Registry);
initializeMachineBlockFrequencyInfoWrapperPassPass(Registry);
+ initializeMachineBlockHashInfoPass(Registry);
initializeMachineBlockPlacementLegacyPass(Registry);
initializeMachineBlockPlacementStatsLegacyPass(Registry);
initializeMachineCFGPrinterPass(Registry);
diff --git a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
new file mode 100644
index 0000000000000..1bf5466fae9b3
--- /dev/null
+++ b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
@@ -0,0 +1,104 @@
+#include "llvm/CodeGen/MachineBlockHashInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/InitializePasses.h"
+
+using namespace llvm;
+
+using OperandHashFuncTy = function_ref<uint64_t(uint64_t &, const MachineOperand &)>;
+
+uint64_t hashBlock(const MachineBasicBlock &MBB, OperandHashFuncTy OperandHashFunc) {
+ uint64_t Hash = 0;
+ for (const MachineInstr &MI : MBB) {
+ if (MI.isPseudo())
+ continue;
+ // Ignore unconditional jumps
+ if (MI.isUnconditionalBranch())
+ continue;
+ Hash = hashing::detail::hash_16_bytes(Hash, MI.getOpcode());
+ for (unsigned i = 0; i < MI.getNumOperands(); i++) {
+ Hash = OperandHashFunc(Hash, MI.getOperand(i));
+ }
+ }
+ return Hash;
+}
+
+/// Hashing a 64-bit integer to a 16-bit one.
+uint16_t hash_64_to_16(const uint64_t Hash) {
+ uint16_t Res = (uint16_t)(Hash & 0xFFFF);
+ Res ^= (uint16_t)((Hash >> 16) & 0xFFFF);
+ Res ^= (uint16_t)((Hash >> 32) & 0xFFFF);
+ Res ^= (uint16_t)((Hash >> 48) & 0xFFFF);
+ return Res;
+}
+
+uint64_t hashInstOperand(uint64_t &Hash, const MachineOperand &Operand) {
+ return hashing::detail::hash_16_bytes(Hash, hash_value(Operand));
+}
+
+INITIALIZE_PASS(MachineBlockHashInfo, "machine-block-hash",
+ "Machine Block Hash Analysis", true, true)
+
+char MachineBlockHashInfo::ID = 0;
+
+MachineBlockHashInfo::MachineBlockHashInfo() : MachineFunctionPass(ID) {
+ initializeMachineBlockHashInfoPass(*PassRegistry::getPassRegistry());
+}
+
+void MachineBlockHashInfo::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
+}
+
+bool MachineBlockHashInfo::runOnMachineFunction(MachineFunction &F) {
+ DenseMap<MachineBasicBlock *, BlendedBlockHash> BlendedHashes;
+ DenseMap<MachineBasicBlock *, uint64_t> OpcodeHashes;
+ uint16_t Offset = 0;
+ // Initialize hash components
+ for (MachineBasicBlock &MBB : F) {
+ BlendedBlockHash BlendedHash;
+ // offset of the machine basic block
+ BlendedHash.Offset = Offset;
+ Offset += MBB.size();
+ // Hashing opcodes
+ uint64_t OpcodeHash = hashBlock(MBB, [](uint64_t &Hash, const MachineOperand &Op) { return Hash; });
+ OpcodeHashes[&MBB] = OpcodeHash;
+ BlendedHash.OpcodeHash = hash_64_to_16(OpcodeHash);
+ // Hash complete instructions
+ uint64_t InstrHash = hashBlock(MBB, hashInstOperand);
+ BlendedHash.InstrHash = hash_64_to_16(InstrHash);
+ BlendedHashes[&MBB] = BlendedHash;
+ }
+
+ // Initialize neighbor hash
+ for (MachineBasicBlock &MBB : F) {
+ uint64_t Hash = OpcodeHashes[&MBB];
+ // Append hashes of successors
+ for (MachineBasicBlock *SuccMBB : MBB.successors()) {
+ uint64_t SuccHash = OpcodeHashes[SuccMBB];
+ Hash = hashing::detail::hash_16_bytes(Hash, SuccHash);
+ }
+ // Append hashes of predecessors
+ for (MachineBasicBlock *PredMBB : MBB.predecessors()) {
+ uint64_t PredHash = OpcodeHashes[PredMBB];
+ Hash = hashing::detail::hash_16_bytes(Hash, PredHash);
+ }
+ BlendedHashes[&MBB].NeighborHash = hash_64_to_16(Hash);
+ }
+
+ // Assign hashes
+ for (MachineBasicBlock &MBB : F) {
+ if (MBB.getBBID()) {
+ MBBHashInfo[MBB.getBBID()->BaseID] = BlendedHashes[&MBB].combine();
+ }
+ }
+
+ return false;
+}
+
+uint64_t MachineBlockHashInfo::getMBBHash(const MachineBasicBlock &MBB) {
+ if (MBB.getBBID()) {
+ return MBBHashInfo[MBB.getBBID()->BaseID];
+ }
+ return 0;
+}
\ No newline at end of file
diff --git a/llvm/lib/Object/ELF.cpp b/llvm/lib/Object/ELF.cpp
index bf42c92a242a1..dd585011a13ae 100644
--- a/llvm/lib/Object/ELF.cpp
+++ b/llvm/lib/Object/ELF.cpp
@@ -873,6 +873,7 @@ decodeBBAddrMapImpl(const ELFFile<ELFT> &EF,
uint32_t Offset = readULEB128As<uint32_t>(Data, Cur, ULEBSizeErr);
uint32_t Size = readULEB128As<uint32_t>(Data, Cur, ULEBSizeErr);
uint32_t MD = readULEB128As<uint32_t>(Data, Cur, ULEBSizeErr);
+ uint64_t Hash = readULEB128As<uint64_t>(Data, Cur, ULEBSizeErr);
if (Version >= 1) {
// Offset is calculated relative to the end of the previous BB.
Offset += PrevBBEndOffset;
@@ -884,7 +885,7 @@ decodeBBAddrMapImpl(const ELFFile<ELFT> &EF,
MetadataDecodeErr = MetadataOrErr.takeError();
break;
}
- BBEntries.push_back({ID, Offset, Size, *MetadataOrErr});
+ BBEntries.push_back({ID, Offset, Size, *MetadataOrErr, Hash});
}
TotalNumBlocks += BBEntries.size();
}
diff --git a/llvm/lib/ObjectYAML/ELFEmitter.cpp b/llvm/lib/ObjectYAML/ELFEmitter.cpp
index 9ae76a71ede5e..a2542b63479ee 100644
--- a/llvm/lib/ObjectYAML/ELFEmitter.cpp
+++ b/llvm/lib/ObjectYAML/ELFEmitter.cpp
@@ -1502,6 +1502,7 @@ void ELFState<ELFT>::writeSectionContent(
SHeader.sh_size += CBA.writeULEB128(BBE.AddressOffset);
SHeader.sh_size += CBA.writeULEB128(BBE.Size);
SHeader.sh_size += CBA.writeULEB128(BBE.Metadata);
+ SHeader.sh_size += CBA.writeULEB128(BBE.Hash);
}
}
if (!PGOAnalyses)
diff --git a/llvm/lib/ObjectYAML/ELFYAML.cpp b/llvm/lib/ObjectYAML/ELFYAML.cpp
index 520e956fdab9f..3c98beef16210 100644
--- a/llvm/lib/ObjectYAML/ELFYAML.cpp
+++ b/llvm/lib/ObjectYAML/ELFYAML.cpp
@@ -1882,6 +1882,7 @@ void MappingTraits<ELFYAML::BBAddrMapEntry::BBEntry>::mapping(
IO.mapRequired("AddressOffset", E.AddressOffset);
IO.mapRequired("Size", E.Size);
IO.mapRequired("Metadata", E.Metadata);
+ IO.mapRequired("Hash", E.Hash);
}
void MappingTraits<ELFYAML::PGOAnalysisMapEntry>::mapping(
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll b/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
index 63779727ec72c..dd97aecd57cf3 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
@@ -81,26 +81,32 @@ declare i32 @__gxx_personality_v0(...)
; CHECK-NEXT: .uleb128 .Lfunc_begin0-.Lfunc_begin0
; CHECK-NEXT: .uleb128 .LBB_END0_0-.Lfunc_begin0
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 1 # BB id
; CHECK-NEXT: .uleb128 .LBB0_1-.LBB_END0_0
; CHECK-NEXT: .uleb128 .LBB_END0_1-.LBB0_1
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 3 # BB id
; CHECK-NEXT: .uleb128 .LBB0_2-.LBB_END0_1
; CHECK-NEXT: .uleb128 .LBB_END0_2-.LBB0_2
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 5 # BB id
; CHECK-NEXT: .uleb128 .LBB0_3-.LBB_END0_2
; CHECK-NEXT: .uleb128 .LBB_END0_3-.LBB0_3
; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 4 # BB id
; CHECK-NEXT: .uleb128 .LBB0_4-.LBB_END0_3
; CHECK-NEXT: .uleb128 .LBB_END0_4-.LBB0_4
; CHECK-NEXT: .byte 16
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 2 # BB id
; CHECK-NEXT: .uleb128 .LBB0_5-.LBB_END0_4
; CHECK-NEXT: .uleb128 .LBB_END0_5-.LBB0_5
; CHECK-NEXT: .byte 4
+; CHECK-NEXT: .ascii "{{.*}}"
;; PGO Analysis Map
; PGO-NONE-NOT: .byte 100 # function entry count
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll b/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
index b897cf4853cac..4f13ad46838ea 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
@@ -54,18 +54,21 @@ declare i32 @__gxx_personality_v0(...)
; CHECK-NEXT: .uleb128 .Lfunc_begin0-.Lfunc_begin0
; CHECK-NEXT: .uleb128 .LBB_END0_0-.Lfunc_begin0
; CHECK-NEXT: .byte 0
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 2 # BB id
; CHECK-NEXT: .uleb128 .LBB0_1-.LBB_END0_0
; CHECK-NEXT: .uleb128 .LBB_END0_1-.LBB0_1
; CHECK-NEXT: .byte 5
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .quad _Z3bazb.cold # base address
; CHECK-NEXT: .byte 2 # number of basic blocks
; CHECK-NEXT: .byte 1 # BB id
; CHECK-NEXT: .uleb128 _Z3bazb.cold-_Z3bazb.cold
; CHECK-NEXT: .uleb128 .LBB_END0_2-_Z3bazb.cold
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 3 # BB id
; CHECK-NEXT: .uleb128 .LBB0_3-.LBB_END0_2
; CHECK-NEXT: .uleb128 .LBB_END0_3-.LBB0_3
; CHECK-NEXT: .byte 1
-
+; CHECK-NEXT: .ascii "{{.*}}"
\ No newline at end of file
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll b/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
index 2565db23c0249..304233d0865f4 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
@@ -64,16 +64,19 @@ declare i32 @qux()
; CHECK-NEXT: .uleb128 .Lfunc_begin0-.Lfunc_begin0
; CHECK-NEXT: .uleb128 .LBB_END0_0-.Lfunc_begin0
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 1 # BB id
; CHECK-NEXT: .uleb128 .LBB0_1-.LBB_END0_0
; CHECK-NEXT: .uleb128 .LBB_END0_1-.LBB0_1
; CHECK-NEXT: .byte 3
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .quad foo.cold # base address
; CHECK-NEXT: .byte 1 # number of basic blocks
; CHECK-NEXT: .byte 2 # BB id
; CHECK-NEXT: .uleb128 foo.cold-foo.cold
; CHECK-NEXT: .uleb128 .LBB_END0_2-foo.cold
; CHECK-NEXT: .byte 3
+; CHECK-NEXT: .ascii "{{.*}}"
;; PGO Analysis Map
; PGO: .ascii "\3306" # function entry count
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map.ll b/llvm/test/CodeGen/X86/basic-block-address-map.ll
index 4f12258eeeea0..7563bf9621be3 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map.ll
@@ -58,23 +58,29 @@ declare i32 @__gxx_personality_v0(...)
; CHECK-NEXT: .uleb128 .Lfunc_begin0-.Lfunc_begin0
; CHECK-NEXT: .uleb128 .LBB_END0_0-.Lfunc_begin0
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 1 # BB id
; CHECK-NEXT: .uleb128 .LBB0_1-.LBB_END0_0
; CHECK-NEXT: .uleb128 .LBB_END0_1-.LBB0_1
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 3 # BB id
; CHECK-NEXT: .uleb128 .LBB0_2-.LBB_END0_1
; CHECK-NEXT: .uleb128 .LBB_END0_2-.LBB0_2
; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 4 # BB id
; CHECK-NEXT: .uleb128 .LBB0_3-.LBB_END0_2
; CHECK-NEXT: .uleb128 .LBB_END0_3-.LBB0_3
; CHECK-NEXT: .byte 16
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 5 # BB id
; CHECK-NEXT: .uleb128 .LBB0_4-.LBB_END0_3
; CHECK-NEXT: .uleb128 .LBB_END0_4-.LBB0_4
; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .ascii "{{.*}}"
; CHECK-NEXT: .byte 2 # BB id
; CHECK-NEXT: .uleb128 .LBB0_5-.LBB_END0_4
; CHECK-NEXT: .uleb128 .LBB_END0_5-.LBB0_5
; CHECK-NEXT: .byte 5
+; CHECK-NEXT: .ascii "{{.*}}"
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml b/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml
index cc7faea67bed2..48ebfec41d9b7 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml
+++ b/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml
@@ -113,28 +113,34 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x1
- ID: 1
AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0x2
- ID: 2
AddressOffset: 0x1
Size: 0x4
Metadata: 0x0
+ Hash: 0x3
- ID: 4
AddressOffset: 0x0
Size: 0x6
Metadata: 0x1
+ Hash: 0x4
- ID: 5
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x5
- BaseAddress: 0x6000
BBEntries:
- ID: 6
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x6
- Name: .llvm_bb_addr_map.bar
Type: SHT_LLVM_BB_ADDR_MAP
Link: .text.bar
@@ -146,12 +152,15 @@ Sections:
- AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x7
- AddressOffset: 0x4
Size: 0x2
Metadata: 0x0
+ Hash: 0x8
- AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0x9
Symbols:
- Name: foo
@@ -208,28 +217,34 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x1
- ID: 1
AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0x2
- ID: 2
AddressOffset: 0x1
Size: 0x4
Metadata: 0x0
+ Hash: 0x3
- ID: 4
AddressOffset: 0x0
Size: 0x6
Metadata: 0x1
+ Hash: 0x4
- ID: 5
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x5
- BaseAddress: 0x6000
BBEntries:
- ID: 6
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x6
- Version: 1
BBRanges:
- BaseAddress: 0x5000
@@ -237,12 +252,15 @@ Sections:
- AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x7
- AddressOffset: 0x4
Size: 0x2
Metadata: 0x0
+ Hash: 0x8
- AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0x9
Symbols:
- Name: foo
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml b/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml
index 706d386e467e7..a32a26adb4a03 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml
+++ b/llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml
@@ -30,6 +30,7 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0xa
+ Hash: 0x1
- Version: 2
BBRanges:
- BBEntries:
@@ -37,6 +38,7 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0xb
+ Hash: 0x2
- Version: 2
Feature: 0x8
BBRanges:
@@ -45,11 +47,13 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0xc
+ Hash: 0x3
- BBEntries:
- ID: 1
AddressOffset: 0x0
Size: 0x1
Metadata: 0xd
+ Hash: 0x4
- Name: .rela.llvm_bb_addr_map
Type: SHT_RELA
Flags: [ SHF_INFO_LINK ]
@@ -59,15 +63,15 @@ Sections:
- Offset: 0x2
Symbol: .text
Type: R_X86_64_64
- - Offset: 0x11
+ - Offset: 0x12
Symbol: .text
Type: R_X86_64_64
Addend: 1
- - Offset: 0x21
+ - Offset: 0x23
Symbol: .text
Type: R_X86_64_64
Addend: 0x2
- - Offset: 0x2e
+ - Offset: 0x31
Symbol: .text
Type: R_X86_64_64
Addend: 0x3
diff --git a/llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml b/llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml
index 4d1e5408d86d4..073753ed880e7 100644
--- a/llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml
+++ b/llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml
@@ -33,6 +33,7 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x1
PGOAnalyses:
- FuncEntryCount: 1000
Symbols:
@@ -76,18 +77,22 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x1
- ID: 1
AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0x2
- ID: 2
AddressOffset: 0x1
Size: 0x4
Metadata: 0x0
+ Hash: 0x3
- ID: 5
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x4
PGOAnalyses:
- FuncEntryCount: 1000
PGOBBEntries:
@@ -148,18 +153,22 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0x1
+ Hash: 0x1
- ID: 1
AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0x2
- ID: 2
AddressOffset: 0x1
Size: 0x4
Metadata: 0x0
+ Hash: 0x3
- ID: 5
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x4
PGOAnalyses:
- FuncEntryCount: 1000
PGOBBEntries:
diff --git a/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test b/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test
index 5faafd4d83b2f..cbc1c2ca27c7a 100644
--- a/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test
+++ b/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test
@@ -14,8 +14,8 @@
# RUN: llvm-readelf %t1.x32.o --bb-addr-map | FileCheck %s --check-prefix=GNU
## Check that a malformed section can be handled.
-# RUN: yaml2obj %s -DBITS=32 -DSIZE=24 -o %t2.o
-# RUN: llvm-readobj %t2.o --bb-addr-map 2>&1 | FileCheck --match-full-lines %s -DOFFSET=0x00000018 -DFILE=%t2.o --check-prefix=TRUNCATED
+# RUN: yaml2obj %s -DBITS=32 -DSIZE=27 -o %t2.o
+# RUN: llvm-readobj %t2.o --bb-addr-map 2>&1 | FileCheck --match-full-lines %s -DOFFSET=0x0000001b -DFILE=%t2.o --check-prefix=TRUNCATED
## Check that missing features can be handled.
# RUN: yaml2obj %s -DBITS=32 -DFEATURE=0x2 -o %t3.o
@@ -39,6 +39,7 @@
# CHECK-NEXT: IsEHPad: No
# CHECK-NEXT: CanFallThrough: No
# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: Hash: 0x1
# CHECK-NEXT: }
# CHECK-NEXT: {
# CHECK-NEXT: ID: 2
@@ -49,6 +50,7 @@
# CHECK-NEXT: IsEHPad: Yes
# CHECK-NEXT: CanFallThrough: No
# CHECK-NEXT: HasIndirectBranch: Yes
+# CHECK-NEXT: Hash: 0x2
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -92,6 +94,7 @@
# CHECK-NEXT: IsEHPad: No
# CHECK-NEXT: CanFallThrough: Yes
# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: Hash: 0x3
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -133,6 +136,7 @@
# TRUNCATED-NEXT: IsEHPad: No
# TRUNCATED-NEXT: CanFallThrough: Yes
# TRUNCATED-NEXT: HasIndirectBranch: Yes
+# TRUNCATED-NEXT: Hash: 0x4
# TRUNCATED-NEXT: }
# TRUNCATED-NEXT: {
# TRUNCATED-NEXT: ID: 7
@@ -143,6 +147,7 @@
# TRUNCATED-NEXT: IsEHPad: Yes
# TRUNCATED-NEXT: CanFallThrough: Yes
# TRUNCATED-NEXT: HasIndirectBranch: No
+# TRUNCATED-NEXT: Hash: 0x5
# TRUNCATED-NEXT: }
# TRUNCATED-NEXT: ]
# TRUNCATED-NEXT: }
@@ -153,7 +158,7 @@
# TRUNCATED-NEXT: }
# TRUNCATED-NEXT: ]
-# INVALIDFT: warning: '[[FILE]]': unable to dump SHT_LLVM_BB_ADDR_MAP section with index 5: unable to decode LEB128 at offset 0x00000010: malformed uleb128, extends past end
+# INVALIDFT: warning: '[[FILE]]': unable to dump SHT_LLVM_BB_ADDR_MAP section with index 5: unable to decode LEB128 at offset 0x00000012: malformed uleb128, extends past end
--- !ELF
FileHeader:
@@ -181,10 +186,12 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
- ID: 2
AddressOffset: 0x3
Size: 0x4
Metadata: 0x15
+ Hash: 0x2
- Version: 2
Feature: 0x3
BBRanges:
@@ -194,6 +201,7 @@ Sections:
AddressOffset: 0x6
Size: 0x7
Metadata: 0x8
+ Hash: 0x3
PGOAnalyses:
- FuncEntryCount: 100
PGOBBEntries:
@@ -222,10 +230,12 @@ Sections:
AddressOffset: 0x9
Size: 0xa
Metadata: 0x1b
+ Hash: 0x4
- ID: 7
AddressOffset: 0xc
Size: 0xd
Metadata: 0xe
+ Hash: 0x5
PGOAnalyses:
- FuncEntryCount: 89
Symbols:
diff --git a/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test b/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
index 325a956e78591..e0847fd2de68d 100644
--- a/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
+++ b/llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
@@ -22,6 +22,7 @@
# CHECK-NEXT: IsEHPad: No
# CHECK-NEXT: CanFallThrough: No
# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: Hash: 0x1
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -43,6 +44,7 @@
# CHECK-NEXT: IsEHPad: No
# CHECK-NEXT: CanFallThrough: Yes
# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: Hash: 0x2
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -71,6 +73,7 @@ Sections:
AddressOffset: 0x0
Size: 0xF
Metadata: 0x1
+ Hash: 0x1
- Version: 2
BBRanges:
- BBEntries:
@@ -78,6 +81,7 @@ Sections:
AddressOffset: 0x0
Size: 0x11
Metadata: 0x8
+ Hash: 0x2
- Name: [[RELOCATION_SECTION_NAME]]
Type: [[RELOCATION_SECTION_TYPE]]
Flags: [ SHF_INFO_LINK ]
@@ -87,7 +91,7 @@ Sections:
- Offset: 0x2
Symbol: .text
Type: R_X86_64_64
- - Offset: 0x11
+ - Offset: 0x12
Symbol: .text
Type: R_X86_64_64
Addend: 16
@@ -147,6 +151,7 @@ Sections:
AddressOffset: 0x0
Size: 0xF
Metadata: 0x1
+ Hash: 0x1
- Name: .rela.llvm_bb_addr_map
Type: SHT_RELA
Flags: [ SHF_INFO_LINK ]
@@ -202,6 +207,7 @@ Sections:
AddressOffset: 0x0
Size: 0xF
Metadata: 0x1
+ Hash: 0x1
# RUN: yaml2obj %s --docnum=5 -o %t5.o
# RUN: llvm-readobj %t5.o --bb-addr-map 2>&1 | FileCheck %s --check-prefix=ET-DYN-NO-WARNING -DFILE=%t5.o
@@ -223,6 +229,7 @@ Sections:
# ET-DYN-NO-WARNING: IsEHPad: No
# ET-DYN-NO-WARNING: CanFallThrough: No
# ET-DYN-NO-WARNING: HasIndirectBranch: No
+# ET-DYN-NO-WARNING: Hash: 0x1
# ET-DYN-NO-WARNING: }
# ET-DYN-NO-WARNING: ]
# ET-DYN-NO-WARNING: }
@@ -254,6 +261,7 @@ Sections:
# CREL-NEXT: IsEHPad: No
# CREL-NEXT: CanFallThrough: No
# CREL-NEXT: HasIndirectBranch: No
+# CREL-NEXT: Hash: 0x1
# CREL-NEXT: }
# CREL-NEXT: ]
# CREL-NEXT: }
@@ -275,6 +283,7 @@ Sections:
# CREL-NEXT: IsEHPad: No
# CREL-NEXT: CanFallThrough: Yes
# CREL-NEXT: HasIndirectBranch: No
+# CREL-NEXT: Hash: 0x2
# CREL-NEXT: }
# CREL-NEXT: ]
# CREL-NEXT: }
diff --git a/llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test b/llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
index c5d071c11d1de..906c6877d5338 100644
--- a/llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
+++ b/llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
@@ -40,6 +40,7 @@
# CHECK-NEXT: IsEHPad: No
# CHECK-NEXT: CanFallThrough: No
# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: Hash: 0x1
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -55,6 +56,7 @@
# CHECK-NEXT: IsEHPad: Yes
# CHECK-NEXT: CanFallThrough: No
# CHECK-NEXT: HasIndirectBranch: Yes
+# CHECK-NEXT: Hash: 0x2
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -75,7 +77,8 @@
# CHECK-NEXT: HasTailCall: No
# CHECK-NEXT: IsEHPad: No
# CHECK-NEXT: CanFallThrough: Yes
-# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: HasIndirectBranch: No
+# CHECK-NEXT: Hash: 0x3
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK-NEXT: }
@@ -106,6 +109,7 @@
# TRUNCATED-NEXT: IsEHPad: No
# TRUNCATED-NEXT: CanFallThrough: Yes
# TRUNCATED-NEXT: HasIndirectBranch: Yes
+# TRUNCATED-NEXT: Hash: 0x4
# TRUNCATED-NEXT: }
# TRUNCATED-NEXT: {
# TRUNCATED-NEXT: ID: 7
@@ -116,6 +120,7 @@
# TRUNCATED-NEXT: IsEHPad: Yes
# TRUNCATED-NEXT: CanFallThrough: Yes
# TRUNCATED-NEXT: HasIndirectBranch: No
+# TRUNCATED-NEXT: Hash: 0x5
# TRUNCATED-NEXT: }
# TRUNCATED-NEXT: ]
# TRUNCATED-NEXT: }
@@ -152,12 +157,14 @@ Sections:
AddressOffset: 0x0
Size: 0x1
Metadata: [[METADATA=0x2]]
+ Hash: 0x1
- BaseAddress: 0x44444
BBEntries:
- ID: 2
AddressOffset: 0x3
Size: 0x4
Metadata: 0x15
+ Hash: 0x2
- Version: 2
BBRanges:
- BaseAddress: 0x22222
@@ -166,6 +173,7 @@ Sections:
AddressOffset: 0x6
Size: 0x7
Metadata: 0x8
+ Hash: 0x3
- Name: dummy_section
Type: SHT_PROGBITS
Size: 16
@@ -181,10 +189,12 @@ Sections:
AddressOffset: 0x9
Size: 0xa
Metadata: 0x1b
+ Hash: 0x4
- ID: 7
AddressOffset: 0xc
Size: 0xd
Metadata: 0xe
+ Hash: 0x5
Symbols:
- Name: foo
Section: .text
diff --git a/llvm/test/tools/obj2yaml/ELF/bb-addr-map-pgo-analysis-map.yaml b/llvm/test/tools/obj2yaml/ELF/bb-addr-map-pgo-analysis-map.yaml
index 299bf463cf4bc..7e2c8d49726c8 100644
--- a/llvm/test/tools/obj2yaml/ELF/bb-addr-map-pgo-analysis-map.yaml
+++ b/llvm/test/tools/obj2yaml/ELF/bb-addr-map-pgo-analysis-map.yaml
@@ -23,14 +23,17 @@
# VALID-NEXT: AddressOffset: 0x1
# VALID-NEXT: Size: 0x2
# VALID-NEXT: Metadata: 0x3
+# VALID-NEXT: Hash: 0x4
# VALID-NEXT: - ID: 2
# VALID-NEXT: AddressOffset: 0x4
# VALID-NEXT: Size: 0x5
# VALID-NEXT: Metadata: 0x6
+# VALID-NEXT: Hash: 0x7
# VALID-NEXT: - ID: 4
# VALID-NEXT: AddressOffset: 0xFFFFFFFFFFFFFFF7
# VALID-NEXT: Size: 0xFFFFFFFFFFFFFFF8
# VALID-NEXT: Metadata: 0xFFFFFFFFFFFFFFF9
+# VALID-NEXT: Hash: 0xFFFFFFFFFFFFFFFA
# VALID-NEXT: - Version: 2
# VALID-NEXT: Feature: 0xA
# VALID-NEXT: BBRanges:
@@ -40,6 +43,7 @@
# VALID-NEXT: AddressOffset: 0xA
# VALID-NEXT: Size: 0xB
# VALID-NEXT: Metadata: 0xC
+# VALID-NEXT: Hash: 0xD
# VALID-NEXT: PGOAnalyses:
# VALID-NEXT: - FuncEntryCount: 100
# VALID-NEXT: PGOBBEntries:
@@ -77,14 +81,17 @@ Sections:
AddressOffset: 0x1
Size: 0x2
Metadata: 0x3
+ Hash: 0x4
- ID: 2
AddressOffset: 0x4
Size: 0x5
Metadata: 0x6
+ Hash: 0x7
- ID: 4
AddressOffset: 0xFFFFFFFFFFFFFFF7
Size: 0xFFFFFFFFFFFFFFF8
Metadata: 0xFFFFFFFFFFFFFFF9
+ Hash: 0xFFFFFFFFFFFFFFFA
- Version: 2
Feature: 0xA
BBRanges:
@@ -94,6 +101,7 @@ Sections:
AddressOffset: 0xA
Size: 0xB
Metadata: 0xC
+ Hash: 0xD
PGOAnalyses:
- FuncEntryCount: 100
PGOBBEntries:
@@ -135,6 +143,7 @@ Sections:
# MULTI-NEXT: AddressOffset: 0x1
# MULTI-NEXT: Size: 0x2
# MULTI-NEXT: Metadata: 0x3
+# MULTI-NEXT: Hash: 0x4
# MULTI-NEXT: PGOAnalyses:
# MULTI-NEXT: - FuncEntryCount: 0
# MULTI-NEXT: PGOBBEntries:
@@ -169,6 +178,7 @@ Sections:
- AddressOffset: 0x1
Size: 0x2
Metadata: 0x3
+ Hash: 0x4
PGOAnalyses:
- FuncEntryCount: 0
PGOBBEntries:
diff --git a/llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml b/llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml
index 8dbf97ef2bc12..215e727949d14 100644
--- a/llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml
+++ b/llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml
@@ -22,14 +22,17 @@
# VALID-NEXT: AddressOffset: 0x1
# VALID-NEXT: Size: 0x2
# VALID-NEXT: Metadata: 0x3
+# VALID-NEXT: Hash: 0x4
# VALID-NEXT: - ID: 2
# VALID-NEXT: AddressOffset: 0x4
# VALID-NEXT: Size: 0x5
# VALID-NEXT: Metadata: 0x6
+# VALID-NEXT: Hash: 0x7
# VALID-NEXT: - ID: 4
# VALID-NEXT: AddressOffset: 0xFFFFFFFFFFFFFFF7
# VALID-NEXT: Size: 0xFFFFFFFFFFFFFFF8
# VALID-NEXT: Metadata: 0xFFFFFFFFFFFFFFF9
+# VALID-NEXT: Hash: 0xFFFFFFFFFFFFFFFA
# VALID-NEXT: - Version: 2
# VALID-NEXT: Feature: 0x8
# VALID-NEXT: BBRanges:
@@ -39,6 +42,7 @@
# VALID-NEXT: AddressOffset: 0xA
# VALID-NEXT: Size: 0xB
# VALID-NEXT: Metadata: 0xC
+# VALID-NEXT: Hash: 0xD
--- !ELF
FileHeader:
@@ -59,14 +63,17 @@ Sections:
AddressOffset: 0x1
Size: 0x2
Metadata: 0x3
+ Hash: 0x4
- ID: 2
AddressOffset: 0x4
Size: 0x5
Metadata: 0x6
+ Hash: 0x7
- ID: 4
AddressOffset: 0xFFFFFFFFFFFFFFF7
Size: 0xFFFFFFFFFFFFFFF8
Metadata: 0xFFFFFFFFFFFFFFF9
+ Hash: 0xFFFFFFFFFFFFFFFA
- Version: 2
Feature: 0x8
NumBBRanges: [[NUMBBRANGES=<none>]]
@@ -78,6 +85,7 @@ Sections:
AddressOffset: 0xA
Size: 0xB
Metadata: 0xC
+ Hash: 0xD
## Check obj2yaml can dump empty .llvm_bb_addr_map sections.
@@ -126,6 +134,7 @@ Sections:
# MULTI-NEXT: AddressOffset: 0x1
# MULTI-NEXT: Size: 0x2
# MULTI-NEXT: Metadata: 0x3
+# MULTI-NEXT: Hash: 0x4
# MULTI-NEXT: - Name: '.llvm_bb_addr_map (1)'
# MULTI-NEXT: Type: SHT_LLVM_BB_ADDR_MAP
# MULTI-NEXT: Entries:
@@ -153,6 +162,7 @@ Sections:
- AddressOffset: 0x1
Size: 0x2
Metadata: 0x3
+ Hash: 0x4
- Name: '.llvm_bb_addr_map (1)'
Type: SHT_LLVM_BB_ADDR_MAP
Entries:
diff --git a/llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml b/llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
index a4cb572e6d993..29e190ac03342 100644
--- a/llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
+++ b/llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
@@ -6,14 +6,15 @@
# Case 4: Specify Entries.
# CHECK: Name: .llvm_bb_addr_map (1)
# CHECK: SectionData (
-# CHECK-NEXT: 0000: 02072000 00000000 0000010B 010203E8
-# CHECK-NEXT: 0010: 07E80702 0CEEDDBB F70E0D91 A2C48801
+# CHECK-NEXT: 0000: 02072000 00000000 0000010B 01020304
+# CHECK-NEXT: 0010: E807E807 020CEEDD BBF70E0D 91A2C488
+# CHECK-NEXT: 0020: 01
# CHECK-NEXT: )
# Case 7: Not including a field which is enabled in feature doesn't emit value
# CHECK: Name: .llvm_bb_addr_map (1)
# CHECK: SectionData (
-# CHECK-NEXT: 0000: 02012000 00000000 0000020D 010203 |
+# CHECK-NEXT: 0000: 02012000 00000000 0000020D 01020304 |
# CHECK-NEXT: )
--- !ELF
@@ -39,6 +40,7 @@ Sections:
AddressOffset: 0x00000001
Size: 0x00000002
Metadata: 0x00000003
+ Hash: 0x00000004
PGOAnalyses:
- FuncEntryCount: 1000
PGOBBEntries:
@@ -63,6 +65,7 @@ Sections:
AddressOffset: 0x00000001
Size: 0x00000002
Metadata: 0x00000003
+ Hash: 0x00000004
## Check that yaml2obj generates a warning when we use unsupported feature.
# RUN: yaml2obj --docnum=2 %s 2>&1 | FileCheck %s --check-prefix=INVALID-FEATURE
diff --git a/llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml b/llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml
index 709938babffbf..bc18bc266de50 100644
--- a/llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml
+++ b/llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml
@@ -36,7 +36,7 @@
# Case 4: Specify Entries.
# CHECK: Name: .llvm_bb_addr_map (1)
# CHECK: SectionData (
-# CHECK-NEXT: 0000: 02002000 00000000 0000010B 010203
+# CHECK-NEXT: 0000: 02002000 00000000 0000010B 01020304
# CHECK-NEXT: )
# Case 5: Specify Entries and omit the Address field.
@@ -44,13 +44,13 @@
# CHECK: Address:
# CHECK-SAME: {{^ 0x0$}}
# CHECK: SectionData (
-# CHECK-NEXT: 0000: 02000000 00000000 0000010C 010203
+# CHECK-NEXT: 0000: 02000000 00000000 0000010C 01020304
# CHECK-NEXT: )
# Case 6: Override the NumBlocks field.
# CHECK: Name: .llvm_bb_addr_map (1)
# CHECK: SectionData (
-# CHECK-NEXT: 0000: 02002000 00000000 0000020D 010203
+# CHECK-NEXT: 0000: 02002000 00000000 0000020D 01020304
# CHECK-NEXT: )
# Case 7: Specify empty BBRanges.
@@ -108,6 +108,7 @@ Sections:
AddressOffset: 0x00000001
Size: 0x00000002
Metadata: 0x00000003
+ Hash: 0x00000004
## 5) When specifying the description with Entries, the 'Address' field will be
## zero when omitted.
@@ -121,6 +122,7 @@ Sections:
AddressOffset: 0x00000001
Size: 0x00000002
Metadata: 0x00000003
+ Hash: 0x00000004
## 6) We can override the NumBlocks field with a value different from the
## actual number of BB Entries.
@@ -136,6 +138,7 @@ Sections:
AddressOffset: 0x00000001
Size: 0x00000002
Metadata: 0x00000003
+ Hash: 0x00000004
## 7) We can produce a SHT_LLVM_BB_ADDR_MAP section from a description
## with one entry with empty BBRanges.
diff --git a/llvm/tools/llvm-readobj/ELFDumper.cpp b/llvm/tools/llvm-readobj/ELFDumper.cpp
index abaf6077ba9e7..ff25171825044 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -7884,6 +7884,7 @@ void LLVMELFDumper<ELFT>::printBBAddrMaps(bool PrettyPGOAnalysis) {
W.printBoolean("IsEHPad", BBE.isEHPad());
W.printBoolean("CanFallThrough", BBE.canFallThrough());
W.printBoolean("HasIndirectBranch", BBE.hasIndirectBranch());
+ W.printHex("Hash", BBE.Hash);
}
}
}
diff --git a/llvm/tools/obj2yaml/elf2yaml.cpp b/llvm/tools/obj2yaml/elf2yaml.cpp
index c56ed15501b40..e53721d63f120 100644
--- a/llvm/tools/obj2yaml/elf2yaml.cpp
+++ b/llvm/tools/obj2yaml/elf2yaml.cpp
@@ -936,7 +936,8 @@ ELFDumper<ELFT>::dumpBBAddrMapSection(const Elf_Shdr *Shdr) {
uint64_t Offset = Data.getULEB128(Cur);
uint64_t Size = Data.getULEB128(Cur);
uint64_t Metadata = Data.getULEB128(Cur);
- BBEntries.push_back({ID, Offset, Size, Metadata});
+ uint64_t Hash = Data.getULEB128(Cur);
+ BBEntries.push_back({ID, Offset, Size, Metadata, Hash});
}
TotalNumBlocks += BBEntries.size();
BBRanges.push_back({BaseAddress, /*NumBlocks=*/{}, BBEntries});
diff --git a/llvm/unittests/Object/ELFObjectFileTest.cpp b/llvm/unittests/Object/ELFObjectFileTest.cpp
index 493e673d6a07d..fa5611ed4174b 100644
--- a/llvm/unittests/Object/ELFObjectFileTest.cpp
+++ b/llvm/unittests/Object/ELFObjectFileTest.cpp
@@ -538,6 +538,7 @@ TEST(ELFObjectFileTest, InvalidDecodeBBAddrMap) {
- AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
)";
{
@@ -568,6 +569,7 @@ TEST(ELFObjectFileTest, InvalidDecodeBBAddrMap) {
- AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
)";
// Check that we can detect the malformed encoding when the section is
@@ -592,6 +594,7 @@ TEST(ELFObjectFileTest, InvalidDecodeBBAddrMap) {
AddressOffset: 0x100000000
Size: 0xFFFFFFFF
Metadata: 0xFFFFFFFF
+ Hash: 0xFFFFFFFF
)";
OverInt32LimitYamlStrings[1] += R"(
@@ -599,6 +602,7 @@ TEST(ELFObjectFileTest, InvalidDecodeBBAddrMap) {
AddressOffset: 0xFFFFFFFF
Size: 0x100000000
Metadata: 0xFFFFFFFF
+ Hash: 0xFFFFFFFF
)";
OverInt32LimitYamlStrings[2] += R"(
@@ -606,16 +610,17 @@ TEST(ELFObjectFileTest, InvalidDecodeBBAddrMap) {
AddressOffset: 0xFFFFFFFF
Size: 0xFFFFFFFF
Metadata: 0x100000000
+ Hash: 0xFFFFFFFF
)";
{
SCOPED_TRACE("overlimit fields");
DoCheck(OverInt32LimitYamlStrings[0],
- "ULEB128 value at offset 0x10 exceeds UINT32_MAX (0x100000000)");
+ "ULEB128 value at offset 0x11 exceeds UINT32_MAX (0x100000000)");
DoCheck(OverInt32LimitYamlStrings[1],
- "ULEB128 value at offset 0x15 exceeds UINT32_MAX (0x100000000)");
+ "ULEB128 value at offset 0x16 exceeds UINT32_MAX (0x100000000)");
DoCheck(OverInt32LimitYamlStrings[2],
- "ULEB128 value at offset 0x1a exceeds UINT32_MAX (0x100000000)");
+ "ULEB128 value at offset 0x1b exceeds UINT32_MAX (0x100000000)");
}
// Check the proper error handling when the section has fields exceeding
@@ -625,26 +630,26 @@ TEST(ELFObjectFileTest, InvalidDecodeBBAddrMap) {
3, OverInt32LimitYamlStrings[1]);
// Truncate before the end of the 5-byte field.
OverInt32LimitAndTruncated[0] += R"(
- ShSize: 0x19
+ ShSize: 0x1a
)";
// Truncate at the end of the 5-byte field.
OverInt32LimitAndTruncated[1] += R"(
- ShSize: 0x1a
+ ShSize: 0x1b
)";
// Truncate after the end of the 5-byte field.
OverInt32LimitAndTruncated[2] += R"(
- ShSize: 0x1b
+ ShSize: 0x1c
)";
{
SCOPED_TRACE("overlimit fields, truncated section");
DoCheck(OverInt32LimitAndTruncated[0],
- "unable to decode LEB128 at offset 0x00000015: malformed uleb128, "
+ "unable to decode LEB128 at offset 0x00000016: malformed uleb128, "
"extends past end");
DoCheck(OverInt32LimitAndTruncated[1],
- "ULEB128 value at offset 0x15 exceeds UINT32_MAX (0x100000000)");
+ "ULEB128 value at offset 0x16 exceeds UINT32_MAX (0x100000000)");
DoCheck(OverInt32LimitAndTruncated[2],
- "ULEB128 value at offset 0x15 exceeds UINT32_MAX (0x100000000)");
+ "ULEB128 value at offset 0x16 exceeds UINT32_MAX (0x100000000)");
}
// Check for proper error handling when the 'NumBlocks' field is overridden
@@ -692,6 +697,7 @@ TEST(ELFObjectFileTest, ReadBBAddrMap) {
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x4
- Name: .llvm_bb_addr_map_2
Type: SHT_LLVM_BB_ADDR_MAP
Link: 1
@@ -705,12 +711,14 @@ TEST(ELFObjectFileTest, ReadBBAddrMap) {
AddressOffset: 0x0
Size: 0x2
Metadata: 0x4
+ Hash: 0x5
- BaseAddress: 0xFFFFF
BBEntries:
- ID: 15
AddressOffset: 0xF0
Size: 0xF1
Metadata: 0x1F
+ Hash: 0x6
- Name: .llvm_bb_addr_map_3
Type: SHT_LLVM_BB_ADDR_MAP
Link: 2
@@ -723,6 +731,7 @@ TEST(ELFObjectFileTest, ReadBBAddrMap) {
AddressOffset: 0x0
Size: 0x3
Metadata: 0x6
+ Hash: 0x7
- Name: .llvm_bb_addr_map_4
Type: SHT_LLVM_BB_ADDR_MAP
# Link: 0 (by default, can be overriden)
@@ -735,17 +744,18 @@ TEST(ELFObjectFileTest, ReadBBAddrMap) {
AddressOffset: 0x0
Size: 0x4
Metadata: 0x18
+ Hash: 0x8
)");
BBAddrMap E1 = {
- {{0x11111, {{1, 0x0, 0x1, {false, true, false, false, false}}}}}};
+ {{0x11111, {{1, 0x0, 0x1, {false, true, false, false, false}, 0x4}}}}};
BBAddrMap E2 = {
- {{0x22222, {{2, 0x0, 0x2, {false, false, true, false, false}}}},
- {0xFFFFF, {{15, 0xF0, 0xF1, {true, true, true, true, true}}}}}};
+ {{0x22222, {{2, 0x0, 0x2, {false, false, true, false, false}, 0x5}}},
+ {0xFFFFF, {{15, 0xF0, 0xF1, {true, true, true, true, true}, 0x6}}}}};
BBAddrMap E3 = {
- {{0x33333, {{0, 0x0, 0x3, {false, true, true, false, false}}}}}};
+ {{0x33333, {{0, 0x0, 0x3, {false, true, true, false, false}, 0x7}}}}};
BBAddrMap E4 = {
- {{0x44444, {{0, 0x0, 0x4, {false, false, false, true, true}}}}}};
+ {{0x44444, {{0, 0x0, 0x4, {false, false, false, true, true}, 0x8}}}}};
std::vector<BBAddrMap> Section0BBAddrMaps = {E4};
std::vector<BBAddrMap> Section1BBAddrMaps = {E3};
@@ -887,6 +897,7 @@ TEST(ELFObjectFileTest, InvalidDecodePGOAnalysisMap) {
- AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
)";
{
@@ -905,6 +916,7 @@ TEST(ELFObjectFileTest, InvalidDecodePGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
)";
// Check that we fail when function entry count is enabled but not provided.
@@ -931,11 +943,12 @@ TEST(ELFObjectFileTest, InvalidDecodePGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
)";
{
SCOPED_TRACE("missing bb frequency");
- DoCheck(MissingBBFreq, "unable to decode LEB128 at offset 0x0000000f: "
+ DoCheck(MissingBBFreq, "unable to decode LEB128 at offset 0x00000010: "
"malformed uleb128, extends past end");
}
@@ -950,14 +963,17 @@ TEST(ELFObjectFileTest, InvalidDecodePGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x1
Metadata: 0x6
+ Hash: 0x1
- ID: 2
AddressOffset: 0x1
Size: 0x1
Metadata: 0x2
+ Hash: 0x2
- ID: 3
AddressOffset: 0x2
Size: 0x1
Metadata: 0x2
+ Hash: 0x3
PGOAnalyses:
- PGOBBEntries:
- Successors:
@@ -972,7 +988,7 @@ TEST(ELFObjectFileTest, InvalidDecodePGOAnalysisMap) {
{
SCOPED_TRACE("missing branch probability");
- DoCheck(MissingBrProb, "unable to decode LEB128 at offset 0x00000017: "
+ DoCheck(MissingBrProb, "unable to decode LEB128 at offset 0x0000001a: "
"malformed uleb128, extends past end");
}
}
@@ -999,6 +1015,7 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
+ Hash: 0x1
PGOAnalyses:
- FuncEntryCount: 892
- Name: .llvm_bb_addr_map_2
@@ -1014,6 +1031,7 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x2
Metadata: 0x4
+ Hash: 0x2
PGOAnalyses:
- PGOBBEntries:
- BBFreq: 343
@@ -1030,14 +1048,17 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x3
Metadata: 0x6
+ Hash: 0x3
- ID: 1
AddressOffset: 0x0
Size: 0x3
Metadata: 0x4
+ Hash: 0x4
- ID: 2
AddressOffset: 0x0
Size: 0x3
Metadata: 0x0
+ Hash: 0x5
PGOAnalyses:
- PGOBBEntries:
- Successors:
@@ -1062,18 +1083,22 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x4
Metadata: 0x18
+ Hash: 0x6
- ID: 1
AddressOffset: 0x0
Size: 0x4
Metadata: 0x0
+ Hash: 0x7
- ID: 2
AddressOffset: 0x0
Size: 0x4
Metadata: 0x0
+ Hash: 0x8
- ID: 3
AddressOffset: 0x0
Size: 0x4
Metadata: 0x0
+ Hash: 0x9
PGOAnalyses:
- FuncEntryCount: 1000
PGOBBEntries:
@@ -1110,6 +1135,7 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x2
Metadata: 0x4
+ Hash: 0xa
PGOAnalyses: [{}]
- Name: .llvm_bb_addr_map_6
Type: SHT_LLVM_BB_ADDR_MAP
@@ -1124,16 +1150,19 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
AddressOffset: 0x0
Size: 0x6
Metadata: 0x6
+ Hash: 0xb
- ID: 1
AddressOffset: 0x0
Size: 0x6
Metadata: 0x4
+ Hash: 0xc
- BaseAddress: 0x666661
BBEntries:
- ID: 2
AddressOffset: 0x0
Size: 0x6
Metadata: 0x0
+ Hash: 0xd
PGOAnalyses:
- PGOBBEntries:
- Successors:
@@ -1148,16 +1177,16 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
)");
BBAddrMap E1 = {
- {{0x11111, {{1, 0x0, 0x1, {false, true, false, false, false}}}}}};
+ {{0x11111, {{1, 0x0, 0x1, {false, true, false, false, false}, 0x1}}}}};
PGOAnalysisMap P1 = {892, {}, {true, false, false, false, false}};
BBAddrMap E2 = {
- {{0x22222, {{2, 0x0, 0x2, {false, false, true, false, false}}}}}};
+ {{0x22222, {{2, 0x0, 0x2, {false, false, true, false, false}, 0x2}}}}};
PGOAnalysisMap P2 = {
{}, {{BlockFrequency(343), {}}}, {false, true, false, false, false}};
BBAddrMap E3 = {{{0x33333,
- {{0, 0x0, 0x3, {false, true, true, false, false}},
- {1, 0x3, 0x3, {false, false, true, false, false}},
- {2, 0x6, 0x3, {false, false, false, false, false}}}}}};
+ {{0, 0x0, 0x3, {false, true, true, false, false}, 0x3},
+ {1, 0x3, 0x3, {false, false, true, false, false}, 0x4},
+ {2, 0x6, 0x3, {false, false, false, false, false}, 0x5}}}}};
PGOAnalysisMap P3 = {{},
{{{},
{{1, BranchProbability::getRaw(0x1111'1111)},
@@ -1166,10 +1195,10 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
{{}, {}}},
{false, false, true, false, false}};
BBAddrMap E4 = {{{0x44444,
- {{0, 0x0, 0x4, {false, false, false, true, true}},
- {1, 0x4, 0x4, {false, false, false, false, false}},
- {2, 0x8, 0x4, {false, false, false, false, false}},
- {3, 0xc, 0x4, {false, false, false, false, false}}}}}};
+ {{0, 0x0, 0x4, {false, false, false, true, true}, 0x6},
+ {1, 0x4, 0x4, {false, false, false, false, false}, 0x7},
+ {2, 0x8, 0x4, {false, false, false, false, false}, 0x8},
+ {3, 0xc, 0x4, {false, false, false, false, false}, 0x9}}}}};
PGOAnalysisMap P4 = {
1000,
{{BlockFrequency(1000),
@@ -1183,13 +1212,13 @@ TEST(ELFObjectFileTest, ReadPGOAnalysisMap) {
{BlockFrequency(1000), {}}},
{true, true, true, false, false}};
BBAddrMap E5 = {
- {{0x55555, {{2, 0x0, 0x2, {false, false, true, false, false}}}}}};
+ {{0x55555, {{2, 0x0, 0x2, {false, false, true, false, false}, 0xa}}}}};
PGOAnalysisMap P5 = {{}, {}, {false, false, false, false, false}};
BBAddrMap E6 = {
{{0x66666,
- {{0, 0x0, 0x6, {false, true, true, false, false}},
- {1, 0x6, 0x6, {false, false, true, false, false}}}},
- {0x666661, {{2, 0x0, 0x6, {false, false, false, false, false}}}}}};
+ {{0, 0x0, 0x6, {false, true, true, false, false}, 0xb},
+ {1, 0x6, 0x6, {false, false, true, false, false}, 0xc}}},
+ {0x666661, {{2, 0x0, 0x6, {false, false, false, false, false}, 0xd}}}}};
PGOAnalysisMap P6 = {{},
{{{},
{{1, BranchProbability::getRaw(0x2222'2222)},
>From 3bccd02671399f8fa5e5121cb62d2b9f8d0979e5 Mon Sep 17 00:00:00 2001
From: wudexin <wudexin at kuaishou.com>
Date: Wed, 21 May 2025 22:12:47 +0800
Subject: [PATCH 2/5] Fix the failed test cases.
---
llvm/test/CodeGen/AArch64/O0-pipeline.ll | 1 +
llvm/test/CodeGen/AArch64/O3-pipeline.ll | 1 +
llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll | 1 +
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 1 +
llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 +
llvm/test/CodeGen/LoongArch/O0-pipeline.ll | 1 +
llvm/test/CodeGen/LoongArch/opt-pipeline.ll | 1 +
llvm/test/CodeGen/PowerPC/O0-pipeline.ll | 1 +
llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 1 +
llvm/test/CodeGen/RISCV/O0-pipeline.ll | 1 +
llvm/test/CodeGen/RISCV/O3-pipeline.ll | 1 +
llvm/test/CodeGen/X86/O0-pipeline.ll | 1 +
llvm/test/CodeGen/X86/opt-pipeline.ll | 1 +
13 files changed, 13 insertions(+)
diff --git a/llvm/test/CodeGen/AArch64/O0-pipeline.ll b/llvm/test/CodeGen/AArch64/O0-pipeline.ll
index abc67eec32391..bf0abb42f386b 100644
--- a/llvm/test/CodeGen/AArch64/O0-pipeline.ll
+++ b/llvm/test/CodeGen/AArch64/O0-pipeline.ll
@@ -85,6 +85,7 @@
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: Stack Frame Layout Analysis
; CHECK-NEXT: Unpack machine instruction bundles
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: AArch64 Assembly Printer
diff --git a/llvm/test/CodeGen/AArch64/O3-pipeline.ll b/llvm/test/CodeGen/AArch64/O3-pipeline.ll
index e1481667a4ab7..ff4d4420de139 100644
--- a/llvm/test/CodeGen/AArch64/O3-pipeline.ll
+++ b/llvm/test/CodeGen/AArch64/O3-pipeline.ll
@@ -245,6 +245,7 @@
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: Stack Frame Layout Analysis
; CHECK-NEXT: Unpack machine instruction bundles
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: AArch64 Assembly Printer
diff --git a/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll b/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
index 08c314e538734..664a5c4b9f388 100644
--- a/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
@@ -62,6 +62,7 @@
; HOTNESS-NEXT: Freeing Pass 'Unpack machine instruction bundles'
; HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
; HOTNESS-NEXT: Freeing Pass 'Verify generated machine code'
+; HOTNESS-NEXT: Executing Pass 'Basic Block Hash Compute'
; HOTNESS-NEXT: Executing Pass 'Lazy Machine Block Frequency Analysis'
; HOTNESS-NEXT: Executing Pass 'Machine Optimization Remark Emitter'
; HOTNESS-NEXT: Building MachineBlockFrequencyInfo on the fly
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 29736b62f2c00..e718cd2b59d89 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -150,6 +150,7 @@
; GCN-O0-NEXT: Machine Optimization Remark Emitter
; GCN-O0-NEXT: Stack Frame Layout Analysis
; GCN-O0-NEXT: Function register usage analysis
+; GCN-O0-NEXT: Basic Block Hash Compute
; GCN-O0-NEXT: AMDGPU Assembly Printer
; GCN-O0-NEXT: Free MachineFunction
diff --git a/llvm/test/CodeGen/ARM/O3-pipeline.ll b/llvm/test/CodeGen/ARM/O3-pipeline.ll
index 960d7305e66f6..8564632cb5c68 100644
--- a/llvm/test/CodeGen/ARM/O3-pipeline.ll
+++ b/llvm/test/CodeGen/ARM/O3-pipeline.ll
@@ -213,6 +213,7 @@
; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: ReachingDefAnalysis
; CHECK-NEXT: ARM Low Overhead Loops pass
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: ARM Assembly Printer
diff --git a/llvm/test/CodeGen/LoongArch/O0-pipeline.ll b/llvm/test/CodeGen/LoongArch/O0-pipeline.ll
index d16cb1c15870b..fbc4033ee3df1 100644
--- a/llvm/test/CodeGen/LoongArch/O0-pipeline.ll
+++ b/llvm/test/CodeGen/LoongArch/O0-pipeline.ll
@@ -71,6 +71,7 @@
; CHECK-NEXT: Stack Frame Layout Analysis
; CHECK-NEXT: LoongArch pseudo instruction expansion pass
; CHECK-NEXT: LoongArch atomic pseudo instruction expansion pass
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: LoongArch Assembly Printer
diff --git a/llvm/test/CodeGen/LoongArch/opt-pipeline.ll b/llvm/test/CodeGen/LoongArch/opt-pipeline.ll
index 90d994909264a..63ea46aa3b40a 100644
--- a/llvm/test/CodeGen/LoongArch/opt-pipeline.ll
+++ b/llvm/test/CodeGen/LoongArch/opt-pipeline.ll
@@ -177,6 +177,7 @@
; LAXX-NEXT: Stack Frame Layout Analysis
; LAXX-NEXT: LoongArch pseudo instruction expansion pass
; LAXX-NEXT: LoongArch atomic pseudo instruction expansion pass
+; LAXX-NEXT: Basic Block Hash Compute
; LAXX-NEXT: Lazy Machine Block Frequency Analysis
; LAXX-NEXT: Machine Optimization Remark Emitter
; LAXX-NEXT: LoongArch Assembly Printer
diff --git a/llvm/test/CodeGen/PowerPC/O0-pipeline.ll b/llvm/test/CodeGen/PowerPC/O0-pipeline.ll
index 38b1074e55d22..e64a7db07ebef 100644
--- a/llvm/test/CodeGen/PowerPC/O0-pipeline.ll
+++ b/llvm/test/CodeGen/PowerPC/O0-pipeline.ll
@@ -69,6 +69,7 @@
; CHECK-NEXT: Stack Frame Layout Analysis
; CHECK-NEXT: PowerPC Expand Atomic
; CHECK-NEXT: PowerPC Branch Selector
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: Linux PPC Assembly Printer
diff --git a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
index 7cbb1a1c98873..c064494f44996 100644
--- a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
+++ b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
@@ -223,6 +223,7 @@
; CHECK-NEXT: Stack Frame Layout Analysis
; CHECK-NEXT: PowerPC Expand Atomic
; CHECK-NEXT: PowerPC Branch Selector
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: Linux PPC Assembly Printer
diff --git a/llvm/test/CodeGen/RISCV/O0-pipeline.ll b/llvm/test/CodeGen/RISCV/O0-pipeline.ll
index 694662eab1681..583537a0eaf48 100644
--- a/llvm/test/CodeGen/RISCV/O0-pipeline.ll
+++ b/llvm/test/CodeGen/RISCV/O0-pipeline.ll
@@ -77,6 +77,7 @@
; CHECK-NEXT: RISC-V pseudo instruction expansion pass
; CHECK-NEXT: RISC-V atomic pseudo instruction expansion pass
; CHECK-NEXT: Unpack machine instruction bundles
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: RISC-V Assembly Printer
diff --git a/llvm/test/CodeGen/RISCV/O3-pipeline.ll b/llvm/test/CodeGen/RISCV/O3-pipeline.ll
index 19de864422bc5..3d71a7c38cd9d 100644
--- a/llvm/test/CodeGen/RISCV/O3-pipeline.ll
+++ b/llvm/test/CodeGen/RISCV/O3-pipeline.ll
@@ -214,6 +214,7 @@
; CHECK-NEXT: RISC-V pseudo instruction expansion pass
; CHECK-NEXT: RISC-V atomic pseudo instruction expansion pass
; CHECK-NEXT: Unpack machine instruction bundles
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: RISC-V Assembly Printer
diff --git a/llvm/test/CodeGen/X86/O0-pipeline.ll b/llvm/test/CodeGen/X86/O0-pipeline.ll
index 0fbfb42d2a4dd..bf74f8a740d4b 100644
--- a/llvm/test/CodeGen/X86/O0-pipeline.ll
+++ b/llvm/test/CodeGen/X86/O0-pipeline.ll
@@ -86,6 +86,7 @@
; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening
; CHECK-NEXT: Pseudo Probe Inserter
; CHECK-NEXT: Unpack machine instruction bundles
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: X86 Assembly Printer
diff --git a/llvm/test/CodeGen/X86/opt-pipeline.ll b/llvm/test/CodeGen/X86/opt-pipeline.ll
index 540046e6a8638..f6ca625569cb9 100644
--- a/llvm/test/CodeGen/X86/opt-pipeline.ll
+++ b/llvm/test/CodeGen/X86/opt-pipeline.ll
@@ -227,6 +227,7 @@
; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening
; CHECK-NEXT: Pseudo Probe Inserter
; CHECK-NEXT: Unpack machine instruction bundles
+; CHECK-NEXT: Basic Block Hash Compute
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: X86 Assembly Printer
>From 5777e7461cfd4a9aa5c81c234944ae9c23eb0a9f Mon Sep 17 00:00:00 2001
From: wudexin <wudexin at kuaishou.com>
Date: Thu, 22 May 2025 10:07:52 +0800
Subject: [PATCH 3/5] Fix the failed test cases.
---
llvm/include/llvm/CodeGen/MachineBlockHashInfo.h | 2 +-
llvm/lib/CodeGen/MachineBlockHashInfo.cpp | 2 +-
llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll | 1 +
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 4 ++++
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h b/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
index a943f71357e6e..ebb555b4ee990 100644
--- a/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
@@ -105,4 +105,4 @@ class MachineBlockHashInfo : public MachineFunctionPass {
} // end namespace llvm
-#endif // LLVM_CODEGEN_MACHINEBLOCKHASHINFO_H
\ No newline at end of file
+#endif // LLVM_CODEGEN_MACHINEBLOCKHASHINFO_H
diff --git a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
index 1bf5466fae9b3..973ed3cd1958b 100644
--- a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
@@ -101,4 +101,4 @@ uint64_t MachineBlockHashInfo::getMBBHash(const MachineBasicBlock &MBB) {
return MBBHashInfo[MBB.getBBID()->BaseID];
}
return 0;
-}
\ No newline at end of file
+}
diff --git a/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll b/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
index 664a5c4b9f388..106ef26595eb5 100644
--- a/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
@@ -108,6 +108,7 @@
; NO_HOTNESS-NEXT: Freeing Pass 'Unpack machine instruction bundles'
; NO_HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
; NO_HOTNESS-NEXT: Freeing Pass 'Verify generated machine code'
+; NO_HOTNESS-NEXT: Executing Pass 'Basic Block Hash Compute'
; NO_HOTNESS-NEXT: Executing Pass 'Lazy Machine Block Frequency Analysis'
; NO_HOTNESS-NEXT: Executing Pass 'Machine Optimization Remark Emitter'
; NO_HOTNESS-NEXT: Executing Pass 'AArch64 Assembly Printer'
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index e718cd2b59d89..97017781dbb6f 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -434,6 +434,7 @@
; GCN-O1-NEXT: Machine Optimization Remark Emitter
; GCN-O1-NEXT: Stack Frame Layout Analysis
; GCN-O1-NEXT: Function register usage analysis
+; GCN-O1-NEXT: Basic Block Hash Compute
; GCN-O1-NEXT: AMDGPU Assembly Printer
; GCN-O1-NEXT: Free MachineFunction
@@ -745,6 +746,7 @@
; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter
; GCN-O1-OPTS-NEXT: Stack Frame Layout Analysis
; GCN-O1-OPTS-NEXT: Function register usage analysis
+; GCN-O1-OPTS-NEXT: Basic Block Hash Compute
; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer
; GCN-O1-OPTS-NEXT: Free MachineFunction
@@ -1062,6 +1064,7 @@
; GCN-O2-NEXT: Machine Optimization Remark Emitter
; GCN-O2-NEXT: Stack Frame Layout Analysis
; GCN-O2-NEXT: Function register usage analysis
+; GCN-O2-NEXT: Basic Block Hash Compute
; GCN-O2-NEXT: AMDGPU Assembly Printer
; GCN-O2-NEXT: Free MachineFunction
@@ -1392,6 +1395,7 @@
; GCN-O3-NEXT: Machine Optimization Remark Emitter
; GCN-O3-NEXT: Stack Frame Layout Analysis
; GCN-O3-NEXT: Function register usage analysis
+; GCN-O3-NEXT: Basic Block Hash Compute
; GCN-O3-NEXT: AMDGPU Assembly Printer
; GCN-O3-NEXT: Free MachineFunction
>From 1c467a05198536b0337cff88cbc5812eeb8fc12b Mon Sep 17 00:00:00 2001
From: wudexin <wudexin at kuaishou.com>
Date: Thu, 22 May 2025 19:10:07 +0800
Subject: [PATCH 4/5] Address review comments
---
llvm/lib/CodeGen/MachineBlockHashInfo.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
index 973ed3cd1958b..9bc483bfe1366 100644
--- a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
@@ -10,7 +10,7 @@ using OperandHashFuncTy = function_ref<uint64_t(uint64_t &, const MachineOperand
uint64_t hashBlock(const MachineBasicBlock &MBB, OperandHashFuncTy OperandHashFunc) {
uint64_t Hash = 0;
for (const MachineInstr &MI : MBB) {
- if (MI.isPseudo())
+ if (MI.isMetaInstruction())
continue;
// Ignore unconditional jumps
if (MI.isUnconditionalBranch())
>From f31fdc45d5aba1cebd8258560a60f206efb5de76 Mon Sep 17 00:00:00 2001
From: wudexin <wudexin at kuaishou.com>
Date: Thu, 22 May 2025 21:46:00 +0800
Subject: [PATCH 5/5] Solve the problem of test case failure.
---
llvm/lib/CodeGen/MachineBlockHashInfo.cpp | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
index 9bc483bfe1366..6dbfccf0019e9 100644
--- a/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBlockHashInfo.cpp
@@ -16,8 +16,10 @@ uint64_t hashBlock(const MachineBasicBlock &MBB, OperandHashFuncTy OperandHashFu
if (MI.isUnconditionalBranch())
continue;
Hash = hashing::detail::hash_16_bytes(Hash, MI.getOpcode());
- for (unsigned i = 0; i < MI.getNumOperands(); i++) {
- Hash = OperandHashFunc(Hash, MI.getOperand(i));
+ for (const MachineOperand &MO : MI.operands()) {
+ if (MO.isReg() && MO.isDef() && MO.getReg().isVirtual())
+ continue; // Skip virtual register defs.
+ Hash = OperandHashFunc(Hash, MO);
}
}
return Hash;
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