[llvm] [AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (PR #140946)

[Jay Foad via llvm-commits]

================
@@ -16062,7 +16062,8 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
     case 'v':
       switch (BitWidth) {
----------------
jayfoad wrote:

`switch` seems overkill here. Could just handle it with:
```
  if (BitWidth == 16 && !Subtarget->useRealTrue16Insts())
    BitWidth = 32;
```

https://github.com/llvm/llvm-project/pull/140946