[llvm] [VectorCombine][AMDGPU] Narrow Phi of Shuffles. (PR #140188)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon May 19 09:28:00 PDT 2025


================
@@ -3483,6 +3484,100 @@ bool VectorCombine::foldInterleaveIntrinsics(Instruction &I) {
   return true;
 }
 
+// Attempt to narrow a phi of shufflevector instructions where the two incoming
+// values have the same operands but different masks. If the two shuffle masks
+// are offsets of one another we can use one branch to rotate the incoming
+// vector and perform one larger shuffle after the phi.
+bool VectorCombine::shrinkPhiOfShuffles(Instruction &I) {
+  auto *Phi = dyn_cast<PHINode>(&I);
+  if (!Phi || Phi->getNumIncomingValues() != 2u)
+    return false;
+
+  auto *Shuf0 = dyn_cast<ShuffleVectorInst>(Phi->getOperand(0u));
+  auto *Shuf1 = dyn_cast<ShuffleVectorInst>(Phi->getOperand(1u));
+  if (!Shuf0 || !Shuf1)
+    return false;
+
+  Value *Op0 = nullptr;
+  Value *Op1 = nullptr;
+
+  if (!match(Shuf0, m_OneUse(m_Shuffle(m_Value(Op0), m_Poison()))) ||
+      !match(Shuf1, m_OneUse(m_Shuffle(m_Value(Op1), m_Poison()))) ||
+      Op0 != Op1)
+    return false;
----------------
RKSimon wrote:

Use m_Shuffle to grab the masks and m_Specific to match a specific Value:
```
ArrayRef Mask0, Mask1;
if (!match(Phi->getOperand(0u), m_OneUse(m_Shuffle(m_Value(Op0), m_Poison(), m_Mask(Mask0)))) ||
    !match(Phi->getOperand(1u)m_OneUse(m_Shuffle(m_Specific(Op0), m_Poison(), m_Mask(Mask1)))))
    return false;
```

https://github.com/llvm/llvm-project/pull/140188


More information about the llvm-commits mailing list