[llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)

[Fabian Ritter via llvm-commits]

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@@ -2617,6 +2620,100 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc &DL) {
   return SDValue();
 }
 
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+/// This function was adapted from DAGCombiner::visitPTRADD() from the Morello
+/// project, which is based on CHERI.
+SDValue DAGCombiner::visitPTRADD(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
+  EVT PtrVT = N0.getValueType();
+  EVT IntVT = N1.getValueType();
+  SDLoc DL(N);
+
+  // fold (ptradd undef, y) -> undef
+  if (N0.isUndef())
+    return N0;
+
+  // fold (ptradd x, undef) -> undef
+  if (N1.isUndef())
+    return DAG.getUNDEF(PtrVT);
+
+  // fold (ptradd x, 0) -> x
+  if (isNullConstant(N1))
+    return N0;
+
+  if (N0.getOpcode() == ISD::PTRADD &&
+      !reassociationCanBreakAddressingModePattern(ISD::PTRADD, DL, N, N0, N1)) {
+    SDValue X = N0.getOperand(0);
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ritter-x2a wrote:

+1 to landing a basic version first and tweaking it in follow-ups, if that's okay for you, @jrtc27. There are other things that I'd like to adjust in follow-ups, for instance `isNullConstant(X)` is not a very meaningful check in general (and for AMDGPU specifically) since there are address spaces where `0` is a perfectly valid base address.
For now, I've added the case where `y` and `z` are both constants in 3a38633e7782afa0f3336cd0ee2f0614346e801a (the generated ADD node should be folded into a constant once it is processed in the next step of the worklist algorithm).

https://github.com/llvm/llvm-project/pull/140017