[llvm] [GlobalISel] Add a update_givaluetracking_test_checks.py script (PR #140296)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,28 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name:            Cst
+body:             |
+  bb.1:
+    %0:_(s8) = G_CONSTANT i8 1
+    %1:_(s8) = COPY %0
+...
+---
+name:            CstWithClass
+body:             |
+  bb.1:
+  ; Note: This comment should not be removed, the check lines below should be updated
+  ; CHECK-LABEL: name: @CstWithClass
+  ; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
+  ; CHECK-NEXT: %named:_ KnownBits:00000000000000000000000000000000???????????????????????????????? SignBits:32
+  ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:1
+  ; CHECK-NEXT: %4:_ KnownBits:00000000000000000000000000000000 SignBits:32
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arsenm wrote:

This might be the usual quirk with how named vs. anonymous registers are printed, but why is this "%3" and "%4" instead of the original source "%2" and "%3"

https://github.com/llvm/llvm-project/pull/140296