[llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)

Sam Tebbs via llvm-commits llvm-commits at lists.llvm.org
Wed May 21 07:22:16 PDT 2025


================
@@ -8237,6 +8237,18 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
     visitVectorExtractLastActive(I, Intrinsic);
     return;
   }
+  case Intrinsic::experimental_loop_dependence_war_mask:
+  case Intrinsic::experimental_loop_dependence_raw_mask: {
+    auto IntrinsicVT = EVT::getEVT(I.getType());
+    SmallVector<SDValue, 4> Ops;
+    for (auto &Op : I.operands())
+      Ops.push_back(getValue(Op));
+    unsigned ID = Intrinsic == Intrinsic::experimental_loop_dependence_war_mask
+                      ? ISD::EXPERIMENTAL_LOOP_DEPENDENCE_WAR_MASK
+                      : ISD::EXPERIMENTAL_LOOP_DEPENDENCE_RAW_MASK;
+    SDValue Mask = DAG.getNode(ID, sdl, IntrinsicVT, Ops);
+    setValue(&I, Mask);
+  }
----------------
SamTebbs33 wrote:

Done.

https://github.com/llvm/llvm-project/pull/117007


More information about the llvm-commits mailing list