[llvm] [CodeGen] Add assertion to MachineBasicBlock::addLiveIn and friends (PR #140527)

[Craig Topper via llvm-commits]

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@@ -503,7 +503,8 @@ bool RegAllocFastImpl::mayBeSpillFromInlineAsmBr(const MachineInstr &MI) const {
   if (MBB->isInlineAsmBrIndirectTarget() && TII->isStoreToStackSlot(MI, FI) &&
       MFI->isSpillSlotObjectIndex(FI))
     for (const auto &Op : MI.operands())
-      if (Op.isReg() && MBB->isLiveIn(Op.getReg()))
+      if (Op.isReg() && Op.getReg() != MCRegister::NoRegister &&
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topperc wrote:

`Op.getReg()` or `Op.getReg().isValid()`

https://github.com/llvm/llvm-project/pull/140527