[llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)

[via llvm-commits]

https://github.com/QiYueFeiXue created https://github.com/llvm/llvm-project/pull/141045

None

>From 4175c7d0aecfe82fd0cc716a031f15924900dcf6 Mon Sep 17 00:00:00 2001
From: Zhenhao Yang <zhenhao.yang at nio.com>
Date: Thu, 22 May 2025 19:06:00 +0800
Subject: [PATCH] [InferAddressSpaces] Handle llvm.lifetime

---
 .../Transforms/Scalar/InferAddressSpaces.cpp  | 14 +++++++++++
 .../InferAddressSpaces/AMDGPU/lifetime.ll     | 23 ++++++++++++++++++
 .../InferAddressSpaces/NVPTX/lifetime.ll      | 24 +++++++++++++++++++
 3 files changed, 61 insertions(+)
 create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
 create mode 100644 llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll

diff --git a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
index 1b7cecc7ceb6a..66836ef05d5db 100644
--- a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+++ b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
@@ -428,6 +428,14 @@ bool InferAddressSpacesImpl::rewriteIntrinsicOperands(IntrinsicInst *II,
     II->replaceUsesOfWith(OldV, NewV);
     return true;
   }
+  case Intrinsic::lifetime_start:
+  case Intrinsic::lifetime_end: {
+    Function *NewDecl = Intrinsic::getOrInsertDeclaration(
+        M, II->getIntrinsicID(), {NewV->getType()});
+    II->setArgOperand(1, NewV);
+    II->setCalledFunction(NewDecl);
+    return true;
+  }
   default: {
     Value *Rewrite = TTI->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
     if (!Rewrite)
@@ -479,6 +487,12 @@ void InferAddressSpacesImpl::collectRewritableIntrinsicOperands(
 
     break;
   }
+  case Intrinsic::lifetime_start:
+  case Intrinsic::lifetime_end: {
+    appendsFlatAddressExpressionToPostorderStack(II->getArgOperand(1),
+                                                 PostorderStack, Visited);
+    break;
+  }
   default:
     SmallVector<int, 2> OpIndexes;
     if (TTI->collectFlatAddressOperands(OpIndexes, IID)) {
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
new file mode 100644
index 0000000000000..291faa7ea9ef4
--- /dev/null
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
@@ -0,0 +1,23 @@
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
+
+
+define i32 @lifetime_flat_pointer() {
+; CHECK-LABEL: define i32 @lifetime_flat_pointer() {
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    store i32 1, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    %ret = load i32, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    ret i32 %ret
+;
+  %alloca = alloca i32, align 4, addrspace(5)
+  %flat = addrspacecast ptr addrspace(5) %alloca to ptr
+  call void @llvm.lifetime.start.p0(i64 4 , ptr %flat)
+  store i32 1, ptr %flat, align 4
+  %ret = load i32, ptr %flat, align 4
+  call void @llvm.lifetime.end.p0(i64 4 , ptr %flat)
+  ret i32 %ret
+}
+
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
\ No newline at end of file
diff --git a/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
new file mode 100644
index 0000000000000..05e46456c8bf9
--- /dev/null
+++ b/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
@@ -0,0 +1,24 @@
+; RUN: opt -S -passes=infer-address-spaces %s | FileCheck %s
+
+target triple = "nvptx64-nvidia-cuda"
+
+define i32 @lifetime_flat_pointer() {
+; CHECK-LABEL: define i32 @lifetime_flat_pointer() {
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    store i32 1, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    %ret = load i32, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    ret i32 %ret
+;
+  %alloca = alloca i32, align 4, addrspace(5)
+  %flat = addrspacecast ptr addrspace(5) %alloca to ptr
+  call void @llvm.lifetime.start.p0(i64 4 , ptr %flat)
+  store i32 1, ptr %flat, align 4
+  %ret = load i32, ptr %flat, align 4
+  call void @llvm.lifetime.end.p0(i64 4 , ptr %flat)
+  ret i32 %ret
+}
+
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)