[llvm] [IR] Add llvm `clmul` intrinsic (PR #140301)

[Craig Topper via llvm-commits]

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@@ -10348,6 +10348,7 @@ SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
     return DAG.getNode(RISCVISD::MOPRR, DL, XLenVT, Op.getOperand(1),
                        Op.getOperand(2), Op.getOperand(3));
   }
+  case Intrinsic::clmul:
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topperc wrote:

It's a class defined in RISCVInstrInfo.td. It's an isel pattern that takes 2 register inputs and produces 1 register result.

https://github.com/llvm/llvm-project/pull/140301