[llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Tue May 20 09:26:22 PDT 2025


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `llvm-clang-x86_64-gcc-ubuntu` running on `sie-linux-worker3` while building `llvm` at step 5 "build-unified-tree".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/174/builds/18058

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (build-unified-tree) failure: build (failure)
...
2.655 [280/16/26] Building RISCVGenAsmMatcher.inc...
2.742 [280/15/27] Building RISCVGenExegesis.inc...
2.819 [280/14/28] Building RISCVGenSDNodeInfo.inc...
2.820 [279/13/29] Building RISCVGenMCPseudoLowering.inc...
2.822 [279/12/30] Building RISCVGenRegisterInfo.inc...
2.867 [279/11/31] Building RISCVGenCompressInstEmitter.inc...
2.868 [279/10/32] Building CXX object tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Version.cpp.o
2.942 [279/9/33] Building RISCVGenPreLegalizeGICombiner.inc...
3.110 [279/8/34] Building RISCVGenSearchableTables.inc...
4.157 [279/7/35] Building RISCVGenSubtargetInfo.inc...
FAILED: lib/Target/RISCV/RISCVGenSubtargetInfo.inc /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/lib/Target/RISCV/RISCVGenSubtargetInfo.inc 
cd /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/lib/Target/RISCV && /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llvm-tblgen -gen-subtarget -I /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/lib/Target/RISCV -I/home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/include -I/home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/include -I /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/lib/Target /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o RISCVGenSubtargetInfo.inc -d RISCVGenSubtargetInfo.inc.d && /usr/bin/cmake/bin/cmake -E cmake_transform_depfile Ninja gccdepfile /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/lib/Target/RISCV /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/lib/Target/RISCV /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/lib/Target/RISCV/RISCVGenSubtargetInfo.inc.d /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/CMakeFiles/d/cec4ab641d907eeac08f5609bd906c7df1fb11f277566153a80ca3d00bef6df1.d
Included from /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/lib/Target/RISCV/RISCV.td:61:
/home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td:61:5: error: Processor does not define resources for WriteFAdd128
def SiFiveP800Model : SchedMachineModel {
    ^
4.868 [279/6/36] Building CXX object lib/Object/CMakeFiles/LLVMObject.dir/IRSymtab.cpp.o
8.436 [279/5/37] Building RISCVGenInstrInfo.inc...
10.128 [279/4/38] Building RISCVGenGlobalISel.inc...
12.781 [279/3/39] Building RISCVGenDAGISel.inc...
15.281 [279/2/40] Building CXX object lib/CodeGen/AsmPrinter/CMakeFiles/LLVMAsmPrinter.dir/AsmPrinter.cpp.o
16.112 [279/1/41] Building CXX object lib/LTO/CMakeFiles/LLVMLTO.dir/LTO.cpp.o
ninja: build stopped: subcommand failed.

```

</details>

https://github.com/llvm/llvm-project/pull/139316


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