[llvm] [AArch64] Extend usage of `XAR` instruction for fixed-length operations (PR #139460)

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index f7ce3af95..2311b83e0 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -4640,15 +4640,18 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
     SDNode *MOV = CurDAG->getMachineNode(AArch64::MOVIv2d_ns, DL, VT, Zero);
     SDValue MOVIV = SDValue(MOV, 0);
 
-    SDValue Undef = SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, VT), 0);
-    R1 = CurDAG->getTargetInsertSubreg(AArch64::zsub, DL, VT, Undef, N1->getOperand(0));
+    SDValue Undef =
+        SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, VT), 0);
+    R1 = CurDAG->getTargetInsertSubreg(AArch64::zsub, DL, VT, Undef,
+                                       N1->getOperand(0));
 
     // R1 = N1->getOperand(0);
     R2 = MOVIV;
   }
 
   SDValue Ops[] = {R1, R2, Imm};
-  SDValue Xar = SDValue(CurDAG->SelectNodeTo(N, AArch64::XAR, N0.getValueType(), Ops), 0);
+  SDValue Xar =
+      SDValue(CurDAG->SelectNodeTo(N, AArch64::XAR, N0.getValueType(), Ops), 0);
 
   SDValue ExtractSubReg =
       CurDAG->getTargetExtractSubreg(AArch64::zsub, DL, VT, Xar);

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https://github.com/llvm/llvm-project/pull/139460