[llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)

[Jay Foad via llvm-commits]

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@@ -174,8 +176,7 @@ class MachineBasicBlock
   std::optional<uint64_t> IrrLoopHeaderWeight;
 
   /// Keep track of the physical registers that are livein of the basicblock.
-  using LiveInVector = std::vector<RegisterMaskPair>;
-  LiveInVector LiveIns;
+  DenseSet<MCRegister> LiveIns;
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jayfoad wrote:

> It makes sense so aliasing registers (or tuples) will have common regunits (or their roots) to track them uniquely

Right, but the existing code already did that by calling `sortUniqueLiveIns` after adding all the individual livein registers. Changing to a set _might_ be better, but it should be done as an orthogonal change (either before or after this patch) and it should be benchmarked.

https://github.com/llvm/llvm-project/pull/129847