[llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)

[Nicholas Guy via llvm-commits]

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@@ -948,3 +1159,5 @@ end:
   %2 = add <4 x i32> %psum2, %psum1
   ret <4 x i32> %2
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-I8MM: {{.*}}
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NickGuy-Arm wrote:

Not sure if it was regressions, or them being masked by other prefixes being fed to FileCheck. I've separated the relevant run line out with the prefix `CHECK-DOT-I8MM`, and we're at least seeing the output from it again.
As far as I could tell, running llc with the +i8mm attribute produced the correct asm (i.e. a `usdot` instruction), so it doesn't appear to have been a functional regression at least.

https://github.com/llvm/llvm-project/pull/140075