[llvm] 050e49a - [RISCV] Fix copy/paste mistake in test comments. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon May 19 15:51:02 PDT 2025


Author: Craig Topper
Date: 2025-05-19T15:49:41-07:00
New Revision: 050e49a93a41909e1f80d6e1d66917f53e4ba016

URL: https://github.com/llvm/llvm-project/commit/050e49a93a41909e1f80d6e1d66917f53e4ba016
DIFF: https://github.com/llvm/llvm-project/commit/050e49a93a41909e1f80d6e1d66917f53e4ba016.diff

LOG: [RISCV] Fix copy/paste mistake in test comments. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
    llvm/test/CodeGen/RISCV/rv64zba.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll b/llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
index 736bb8fea599e..9c9c014e3c172 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
@@ -371,7 +371,7 @@ define i64 @sh3adduw_3(i64 %0, i64 %1) {
   ret i64 %5
 }
 
-; Make sure we use sext.h+slli+srli for Zba+Zbb.
+; Make sure we use sext.b+slli+srli for Zba+Zbb.
 ; FIXME: The RV64I and Zba only cases can be done with only 3 shifts.
 define zeroext i32 @sext_ashr_zext_i8(i8 %a) nounwind {
 ; RV64I-LABEL: sext_ashr_zext_i8:

diff  --git a/llvm/test/CodeGen/RISCV/rv64zba.ll b/llvm/test/CodeGen/RISCV/rv64zba.ll
index 6b64144406375..6bd808ca9e126 100644
--- a/llvm/test/CodeGen/RISCV/rv64zba.ll
+++ b/llvm/test/CodeGen/RISCV/rv64zba.ll
@@ -2298,7 +2298,7 @@ define i64 @addshl64_5_8(i64 %a, i64 %b) {
   ret i64 %e
 }
 
-; Make sure we use sext.h+slli+srli for Zba+Zbb.
+; Make sure we use sext.b+slli+srli for Zba+Zbb.
 define zeroext i32 @sext_ashr_zext_i8(i8 %a) nounwind {
 ; RV64I-LABEL: sext_ashr_zext_i8:
 ; RV64I:       # %bb.0:


        


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