[llvm] 1695e8b - [RISCV] Fix typo '==' instead of '='. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri May 23 14:31:05 PDT 2025


Author: Craig Topper
Date: 2025-05-23T14:26:21-07:00
New Revision: 1695e8b3d1080cea089baa74b2c3c7fd469c62c8

URL: https://github.com/llvm/llvm-project/commit/1695e8b3d1080cea089baa74b2c3c7fd469c62c8
DIFF: https://github.com/llvm/llvm-project/commit/1695e8b3d1080cea089baa74b2c3c7fd469c62c8.diff

LOG: [RISCV] Fix typo '==' instead of '='. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 6367c8c6d04a0..818dedac08dde 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -547,7 +547,7 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
     MCRegister OddReg = TRI->getSubReg(SrcReg, RISCV::sub_gpr_odd);
     // We need to correct the odd register of X0_Pair.
     if (OddReg == RISCV::DUMMY_REG_PAIR_WITH_X0)
-      OddReg == RISCV::X0;
+      OddReg = RISCV::X0;
     assert(DstReg != RISCV::X0_Pair && "Cannot write to X0_Pair");
 
     // Emit an ADDI for both parts of GPRPair.


        


More information about the llvm-commits mailing list